From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
<matthias.bgg@gmail.com>, <airlied@linux.ie>,
<mark.rutland@arm.com>, <dri-devel@lists.freedesktop.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>, <Bibby.Hsieh@mediatek.com>,
<yt.shen@mediatek.com>
Subject: Re: [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase
Date: Tue, 16 Apr 2019 16:20:20 +0800 [thread overview]
Message-ID: <1555402820.11519.6.camel@mtksdaap41> (raw)
In-Reply-To: <1553667561-25447-21-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> This patch add ovl0/ovl0_2l usecase
> in ovl->ovl0_2l direct link usecase:
> 1. the crtc support layer number will 4+2
> 2. ovl0_2l background color input select ovl0 when crtc init
> and disable it when crtc finish
> 3. config ovl0_2l layer, if crtc config layer number is
> bigger than ovl0 support layers(max is 4)
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++--
> 1 file changed, 36 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 11e3404..0f97ee3 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -283,6 +283,13 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
>
> for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
> struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];
> + enum mtk_ddp_comp_id prev;
> +
> + if (i > 0)
> + prev = mtk_crtc->ddp_comp[i - 1]->id;
> + else
> + prev = DDP_COMPONENT_ID_MAX;
> + mtk_ddp_comp_bgclr_in_on(comp, prev);
>
> mtk_ddp_comp_config(comp, width, height, vrefresh, bpc);
> mtk_ddp_comp_start(comp);
> @@ -292,9 +299,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
> for (i = 0; i < mtk_crtc->layer_nr; i++) {
> struct drm_plane *plane = &mtk_crtc->planes[i];
> struct mtk_plane_state *plane_state;
> + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
> + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp);
> + unsigned int local_layer;
>
> plane_state = to_mtk_plane_state(plane->state);
> - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i,
> +
> + if (i >= comp_layer_nr) {
> + comp = mtk_crtc->ddp_comp[1];
> + local_layer = i - comp_layer_nr;
> + } else
> + local_layer = i;
> + mtk_ddp_comp_layer_config(comp , local_layer,
> plane_state);
> }
>
> @@ -320,6 +336,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)
> mtk_crtc->ddp_comp[i]->id);
> mtk_disp_mutex_disable(mtk_crtc->mutex);
> for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
> + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);
> mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs,
> mtk_crtc->mmsys_reg_data,
> mtk_crtc->ddp_comp[i]->id,
> @@ -340,6 +357,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
> struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);
> struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
> unsigned int i;
> + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp);
> + unsigned int local_layer;
>
> /*
> * TODO: instead of updating the registers here, we should prepare
> @@ -362,7 +381,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
> plane_state = to_mtk_plane_state(plane->state);
>
> if (plane_state->pending.config) {
> - mtk_ddp_comp_layer_config(comp, i, plane_state);
> + if (i >= comp_layer_nr) {
> + comp = mtk_crtc->ddp_comp[1];
> + local_layer = i - comp_layer_nr;
> + } else
> + local_layer = i;
> +
> + mtk_ddp_comp_layer_config(comp, local_layer,
> + plane_state);
> plane_state->pending.config = false;
> }
> }
> @@ -604,6 +630,14 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
> }
>
> mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]);
> + if (mtk_crtc->ddp_comp_nr > 1) {
> + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1];
> + enum mtk_ddp_comp_type comp_type;
> +
> + comp_type = mtk_ddp_comp_get_type(comp->id);
> + if (comp_type == MTK_DISP_OVL || comp_type == MTK_DISP_OVL_2L)
I think you need not to invent the function mtk_ddp_comp_get_type() to
get the type. Only the component implementing bgclr_in_on() has the
ability to the extend the ovl layer, so you could judge bgclr_in_on()
exist or not to extend the ovl layer.
Regards,
CK
> + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp);
> + }
> mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr,
> sizeof(struct drm_plane),
> GFP_KERNEL);
next prev parent reply other threads:[~2019-04-16 8:20 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 6:18 [PATCH v2 00/25] add drm support for MT8183 yongqiang.niu
2019-03-27 6:18 ` [PATCH v2 01/25] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-03-28 3:18 ` CK Hu
2019-03-27 6:18 ` [PATCH v2 02/25] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-03-27 9:39 ` CK Hu
2019-03-31 6:42 ` Rob Herring
2019-03-27 6:18 ` [PATCH v2 03/25] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-03-28 1:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 04/25] drm/mediatek: add mutex sof " yongqiang.niu
2019-03-28 3:02 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 05/25] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-03-28 3:37 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 06/25] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-04-11 6:09 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 07/25] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-04-11 5:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 08/25] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-04-11 5:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 09/25] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-04-11 10:42 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 10/25] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-04-11 6:14 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 11/25] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 12/25] drm/mediatek: add component DITHER yongqiang.niu
2019-04-11 6:28 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-04-11 6:48 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 14/25] drm/medaitek: add layer_nr " yongqiang.niu
2019-04-11 10:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 15/25] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-04-11 11:01 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 16/25] drm/mediatek: add ddp write register common api yongqiang.niu
2019-04-11 11:15 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-04-16 7:38 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle yongqiang.niu
2019-04-16 8:00 ` CK Hu
2019-04-16 8:37 ` Yongqiang Niu
2019-04-16 11:31 ` YT Shen
2019-03-27 6:19 ` [PATCH v2 19/25] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-04-16 8:20 ` CK Hu [this message]
2019-03-27 6:19 ` [PATCH v2 21/25] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-04-11 10:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow yongqiang.niu
2019-04-16 8:24 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 23/25] drm/mediatek: add vmap support for mediatek drm yongqiang.niu
2019-04-16 8:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls yongqiang.niu
2019-04-16 8:33 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 25/25] drm/mediatek: enable allow_fb_modifiers for mediatek drm yongqiang.niu
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