From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
<matthias.bgg@gmail.com>, <airlied@linux.ie>,
<mark.rutland@arm.com>, <dri-devel@lists.freedesktop.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>, <Bibby.Hsieh@mediatek.com>,
<yt.shen@mediatek.com>
Subject: Re: [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle
Date: Tue, 16 Apr 2019 16:37:17 +0800 [thread overview]
Message-ID: <1555403837.31200.31.camel@mhfsdcap03> (raw)
In-Reply-To: <1555401647.11519.2.camel@mtksdaap41>
On Tue, 2019-04-16 at 16:00 +0800, CK Hu wrote:
> Hi, Yongqiang:
>
> On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> > From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> >
> > This patch add RDMA fifo size error handle
> > rdma fifo size will not always bigger than the calculated threshold
> > if that case happened, we need set fifo size as the threshold
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 9 ++++++++-
> > 1 file changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > index b0a5cff..ead38ba 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > @@ -137,11 +137,14 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
> > {
> > unsigned int threshold;
> > unsigned int reg;
> > + unsigned int rdma_fifo_size;
> > struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> >
> > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
> > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height);
> >
> > + rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
> > +
> > /*
> > * Enable FIFO underflow since DSI and DPI can't be blocked.
> > * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> > @@ -149,8 +152,12 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,
> > * account for blanking, and with a pixel depth of 4 bytes:
> > */
> > threshold = width * height * vrefresh * 4 * 7 / 1000000;
> > +
> > + if (threshold > rdma_fifo_size)
> > + threshold = rdma_fifo_size;
>
> I think this is a work around not a correct solution. Why MT8173 has no
> this problem but MT8183 has? Is the formula of threshold different in
> MT8173 and MT8183?
>
> Regards,
> CK
>
fifo size of RDMA0 and RDMA1 in MT8173 are same, which is SZ_8K.
this formula calculate result will not overflow if the screen size is
not big enough.
but fifo size of RDMA1 in MT8183 only SZ_2K, if RDMA1 display with
solution 1080p60hz, this formula calculate result 3483 will overflow
SZ_2K.
> > +
> > reg = RDMA_FIFO_UNDERFLOW_EN |
> > - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
> > + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> > writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON);
> > }
>
>
next prev parent reply other threads:[~2019-04-16 8:37 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 6:18 [PATCH v2 00/25] add drm support for MT8183 yongqiang.niu
2019-03-27 6:18 ` [PATCH v2 01/25] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-03-28 3:18 ` CK Hu
2019-03-27 6:18 ` [PATCH v2 02/25] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-03-27 9:39 ` CK Hu
2019-03-31 6:42 ` Rob Herring
2019-03-27 6:18 ` [PATCH v2 03/25] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-03-28 1:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 04/25] drm/mediatek: add mutex sof " yongqiang.niu
2019-03-28 3:02 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 05/25] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-03-28 3:37 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 06/25] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-04-11 6:09 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 07/25] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-04-11 5:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 08/25] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-04-11 5:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 09/25] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-04-11 10:42 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 10/25] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-04-11 6:14 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 11/25] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 12/25] drm/mediatek: add component DITHER yongqiang.niu
2019-04-11 6:28 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-04-11 6:48 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 14/25] drm/medaitek: add layer_nr " yongqiang.niu
2019-04-11 10:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 15/25] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-04-11 11:01 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 16/25] drm/mediatek: add ddp write register common api yongqiang.niu
2019-04-11 11:15 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-04-16 7:38 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle yongqiang.niu
2019-04-16 8:00 ` CK Hu
2019-04-16 8:37 ` Yongqiang Niu [this message]
2019-04-16 11:31 ` YT Shen
2019-03-27 6:19 ` [PATCH v2 19/25] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-04-16 8:20 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 21/25] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-04-11 10:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow yongqiang.niu
2019-04-16 8:24 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 23/25] drm/mediatek: add vmap support for mediatek drm yongqiang.niu
2019-04-16 8:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls yongqiang.niu
2019-04-16 8:33 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 25/25] drm/mediatek: enable allow_fb_modifiers for mediatek drm yongqiang.niu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1555403837.31200.31.camel@mhfsdcap03 \
--to=yongqiang.niu@mediatek.com \
--cc=Bibby.Hsieh@mediatek.com \
--cc=airlied@linux.ie \
--cc=ck.hu@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=matthias.bgg@gmail.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=yt.shen@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).