From: Krishna Reddy <vdumpa@nvidia.com>
To: unlisted-recipients:; (no To-header on input)
Cc: <linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>,
<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<treding@nvidia.com>, <yhsu@nvidia.com>, <snikam@nvidia.com>,
<praithatha@nvidia.com>, <talho@nvidia.com>,
<avanbrunt@nvidia.com>, <thomasz@nvidia.com>, <olof@lixom.net>,
<jtukkinen@nvidia.com>, <mperttunen@nvidia.com>,
Krishna Reddy <vdumpa@nvidia.com>
Subject: [PATCH 7/7] arm64: tegra: enable SMMU for SDHCI and EQOS
Date: Thu, 29 Aug 2019 15:47:07 -0700 [thread overview]
Message-ID: <1567118827-26358-8-git-send-email-vdumpa@nvidia.com> (raw)
In-Reply-To: <1567118827-26358-1-git-send-email-vdumpa@nvidia.com>
Enable SMMU translations for SDHCI and EQOS transactions.
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index ad509bb..0496a87 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -51,6 +51,7 @@
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA194_RESET_EQOS>;
reset-names = "eqos";
+ iommus = <&smmu TEGRA186_SID_EQOS>;
status = "disabled";
snps,write-requests = <1>;
@@ -381,6 +382,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC1>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout =
<0x07>;
nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@@ -403,6 +405,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC3>;
nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@@ -430,6 +433,7 @@
<&bpmp TEGRA194_CLK_PLLC4>;
resets = <&bpmp TEGRA194_RESET_SDMMC4>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC4>;
nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
--
2.1.4
prev parent reply other threads:[~2019-08-29 22:46 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 22:47 [PATCH 0/7] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2019-08-29 22:47 ` [PATCH 1/7] iommu/arm-smmu: add Nvidia SMMUv2 implementation Krishna Reddy
2019-08-30 15:02 ` Robin Murphy
2019-08-30 18:16 ` Krishna Reddy
2019-09-02 13:39 ` Robin Murphy
2019-09-03 1:07 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 Krishna Reddy
2019-08-30 12:07 ` Mikko Perttunen
2019-08-30 15:13 ` Robin Murphy
2019-08-30 18:12 ` Krishna Reddy
2019-09-02 7:38 ` Thierry Reding
2019-08-29 22:47 ` [PATCH 3/7] iommu/arm-smmu: Add tlb_sync implementation hook Krishna Reddy
2019-08-30 11:14 ` Thierry Reding
2019-08-30 19:00 ` Krishna Reddy
2019-08-30 15:23 ` Robin Murphy
2019-08-30 18:05 ` Krishna Reddy
2019-08-30 22:49 ` Krishna Reddy
2019-09-02 13:00 ` Robin Murphy
2019-08-29 22:47 ` [PATCH 4/7] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2019-08-30 11:17 ` Thierry Reding
2019-08-30 19:16 ` Krishna Reddy
2019-08-30 15:43 ` Robin Murphy
2019-08-30 17:43 ` Krishna Reddy
2019-08-29 22:47 ` [PATCH 5/7] arm64: tegra: Add Memory controller DT node on T194 Krishna Reddy
2019-08-30 11:18 ` Thierry Reding
2019-08-29 22:47 ` [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU Krishna Reddy
2019-08-30 12:09 ` Mikko Perttunen
2019-08-30 18:39 ` Krishna Reddy
2019-08-30 15:44 ` Robin Murphy
2019-08-30 17:25 ` Krishna Reddy
2019-08-30 17:45 ` Robin Murphy
2019-08-30 18:35 ` Krishna Reddy
2019-08-29 22:47 ` Krishna Reddy [this message]
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