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From: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
To: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
	"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"vkuznets@redhat.com" <vkuznets@redhat.com>,
	"rkagan@virtuozzo.com" <rkagan@virtuozzo.com>,
	"graf@amazon.com" <graf@amazon.com>,
	"jschoenh@amazon.de" <jschoenh@amazon.de>,
	"karahmed@amazon.de" <karahmed@amazon.de>,
	"rimasluk@amazon.com" <rimasluk@amazon.com>,
	"Grimm, Jon" <Jon.Grimm@amd.com>,
	"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
Subject: [PATCH v4 03/17] kvm: x86: Introduce APICv deactivate bits
Date: Fri, 1 Nov 2019 22:41:25 +0000	[thread overview]
Message-ID: <1572648072-84536-4-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com>

Currently, after a VM boots with APICv enabled, it could be deactivated
due to various reasons (e.g. Hyper-v synic).

Introduce KVM APICv deactivate bits along with a new variable
struct kvm_arch.apicv_deact_msk to help keep track of why APICv is
deactivated for each VM.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 arch/x86/include/asm/kvm_host.h |  5 +++++
 arch/x86/kvm/svm.c              |  3 +++
 arch/x86/kvm/vmx/vmx.c          |  4 ++++
 arch/x86/kvm/x86.c              | 22 +++++++++++++++++++++-
 4 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 843799b..1c05363 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -852,6 +852,8 @@ enum kvm_irqchip_mode {
 	KVM_IRQCHIP_SPLIT,        /* created with KVM_CAP_SPLIT_IRQCHIP */
 };
 
+#define APICV_DEACT_BIT_DISABLE    0
+
 struct kvm_arch {
 	unsigned long n_used_mmu_pages;
 	unsigned long n_requested_mmu_pages;
@@ -881,6 +883,7 @@ struct kvm_arch {
 	struct kvm_apic_map *apic_map;
 
 	bool apic_access_page_done;
+	unsigned long apicv_deact_msk;
 
 	gpa_t wall_clock;
 
@@ -1416,6 +1419,8 @@ gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
 				struct x86_exception *exception);
 
 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
+bool kvm_apicv_activated(struct kvm *kvm);
+void kvm_apicv_init(struct kvm *kvm, bool enable);
 
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 7090306..a0caf66 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1985,6 +1985,9 @@ static int avic_vm_init(struct kvm *kvm)
 	hash_add(svm_vm_data_hash, &kvm_svm->hnode, kvm_svm->avic_vm_id);
 	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
 
+	/* Enable KVM APICv support */
+	kvm_apicv_init(kvm, true);
+
 	return 0;
 
 free_avic:
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index e4faa00..28b97fb 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6775,6 +6775,10 @@ static int vmx_vm_init(struct kvm *kvm)
 			break;
 		}
 	}
+
+	/* Enable KVM APICv support */
+	kvm_apicv_init(kvm, vmx_get_enable_apicv(kvm));
+
 	return 0;
 }
 
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 2341f48..70a70a1 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7201,6 +7201,21 @@ void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
 	kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
 }
 
+bool kvm_apicv_activated(struct kvm *kvm)
+{
+	return (READ_ONCE(kvm->arch.apicv_deact_msk) == 0);
+}
+EXPORT_SYMBOL_GPL(kvm_apicv_activated);
+
+void kvm_apicv_init(struct kvm *kvm, bool enable)
+{
+	if (enable)
+		clear_bit(APICV_DEACT_BIT_DISABLE, &kvm->arch.apicv_deact_msk);
+	else
+		set_bit(APICV_DEACT_BIT_DISABLE, &kvm->arch.apicv_deact_msk);
+}
+EXPORT_SYMBOL_GPL(kvm_apicv_init);
+
 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
 {
 	struct kvm_vcpu *target = NULL;
@@ -9217,13 +9232,15 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 		goto fail_free_pio_data;
 
 	if (irqchip_in_kernel(vcpu->kvm)) {
-		vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu->kvm);
 		r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
 		if (r < 0)
 			goto fail_mmu_destroy;
 	} else
 		static_key_slow_inc(&kvm_no_apic_vcpu);
 
+	if (irqchip_in_kernel(vcpu->kvm) && kvm_apicv_activated(vcpu->kvm))
+		vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu->kvm);
+
 	vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
 				       GFP_KERNEL_ACCOUNT);
 	if (!vcpu->arch.mce_banks) {
@@ -9322,6 +9339,9 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
 	kvm_page_track_init(kvm);
 	kvm_mmu_init_vm(kvm);
 
+	/* Default to APICv disable */
+	kvm_apicv_init(kvm, false);
+
 	if (kvm_x86_ops->vm_init)
 		return kvm_x86_ops->vm_init(kvm);
 
-- 
1.8.3.1


  parent reply	other threads:[~2019-11-01 22:41 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-01 22:41 [PATCH v4 00/17] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 01/17] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 02/17] kvm: lapic: Introduce APICv update helper function Suthikulpanit, Suravee
2019-11-01 22:41 ` Suthikulpanit, Suravee [this message]
2019-11-02  9:51   ` [PATCH v4 03/17] kvm: x86: Introduce APICv deactivate bits Paolo Bonzini
2019-11-01 22:41 ` [PATCH v4 04/17] kvm: x86: Add support for activate/de-activate APICv at runtime Suthikulpanit, Suravee
2019-11-02  9:52   ` Paolo Bonzini
2019-11-04 19:22     ` Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 05/17] kvm: x86: Add APICv activate/deactivate request trace points Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 06/17] kvm: x86: svm: Add support to activate/deactivate posted interrupts Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 07/17] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suthikulpanit, Suravee
2019-11-04 21:53   ` Roman Kagan
2019-11-12  0:05     ` Suravee Suthikulpanit
2019-11-01 22:41 ` [PATCH v4 08/17] kvm: x86: Introduce APICv pre-update hook Suthikulpanit, Suravee
2019-11-04 22:05   ` Roman Kagan
2019-11-12  0:08     ` Suravee Suthikulpanit
2019-11-12 11:12       ` Roman Kagan
2019-11-01 22:41 ` [PATCH v4 09/17] svm: Add support for activate/deactivate AVIC at runtime Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 10/17] kvm: x86: hyperv: Use APICv update request interface Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 11/17] svm: Deactivate AVIC when launching guest with nested SVM support Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 12/17] svm: Temporary deactivate AVIC during ExtINT handling Suthikulpanit, Suravee
2019-11-02 10:01   ` Paolo Bonzini
2019-11-01 22:41 ` [PATCH v4 13/17] kvm: i8254: Deactivate APICv when using in-kernel PIT re-injection mode Suthikulpanit, Suravee
2019-11-02  9:57   ` Paolo Bonzini
2019-11-04 18:54     ` Suthikulpanit, Suravee
2019-11-04 21:49       ` Paolo Bonzini
2019-11-05  7:05         ` Graf (AWS), Alexander
2019-11-05  8:40           ` Roman Kagan
2019-11-04 23:17     ` Roman Kagan
2019-11-05 22:47       ` Paolo Bonzini
2019-11-11 17:37         ` Suravee Suthikulpanit
2019-11-12 12:22           ` Roman Kagan
2019-11-01 22:41 ` [PATCH v4 14/17] kvm: lapic: Clean up APIC predefined macros Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 15/17] kvm: ioapic: Refactor kvm_ioapic_update_eoi() Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 16/17] kvm: ioapic: Lazy update IOAPIC EOI Suthikulpanit, Suravee
2019-11-01 22:41 ` [PATCH v4 17/17] svm: Allow AVIC with in-kernel irqchip mode Suthikulpanit, Suravee

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