* [PATCH 0/2] spi CS customization support @ 2019-11-18 4:57 Luhua Xu 2019-11-18 4:57 ` [PATCH 1/2] spi: mediatek: add SPI_CS_HIGH support Luhua Xu 2019-11-18 4:57 ` [PATCH 2/2] spi: mediatek: add cs timing configuration support Luhua Xu 0 siblings, 2 replies; 6+ messages in thread From: Luhua Xu @ 2019-11-18 4:57 UTC (permalink / raw) To: Mark Brown, Matthias Brugger, Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, Thomas Gleixner Cc: linux-spi, linux-arm-kernel, linux-mediatek, linux-kernel These patch series add SPI CS polarity and CS setup/hold/idle time customization support. Luhua Xu (2): spi: mediatek: add SPI_CS_HIGH support spi: mediatek: add cs timing configuration support drivers/spi/spi-mt65xx.c | 53 +++++++++++++++++++++++++------- include/linux/platform_data/spi-mt65xx.h | 6 +++- 2 files changed, 47 insertions(+), 12 deletions(-) ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] spi: mediatek: add SPI_CS_HIGH support 2019-11-18 4:57 [PATCH 0/2] spi CS customization support Luhua Xu @ 2019-11-18 4:57 ` Luhua Xu 2019-11-18 17:49 ` Applied "spi: mediatek: add SPI_CS_HIGH support" to the spi tree Mark Brown 2019-11-18 4:57 ` [PATCH 2/2] spi: mediatek: add cs timing configuration support Luhua Xu 1 sibling, 1 reply; 6+ messages in thread From: Luhua Xu @ 2019-11-18 4:57 UTC (permalink / raw) To: Mark Brown, Matthias Brugger, Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, Thomas Gleixner Cc: linux-spi, linux-arm-kernel, linux-mediatek, linux-kernel, Luhua Xu Change to use SPI_CS_HIGH to support spi CS polarity setting for chips support enhance_timing. Signed-off-by: Luhua Xu <luhua.xu@mediatek.com> --- drivers/spi/spi-mt65xx.c | 12 ++++++++++-- include/linux/platform_data/spi-mt65xx.h | 1 - 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index 6888a4d..f599cce 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -139,7 +139,6 @@ static const struct mtk_spi_compatible mt8183_compat = { * supplies it. */ static const struct mtk_chip_config mtk_default_chip_info = { - .cs_pol = 0, .sample_sel = 0, }; @@ -230,10 +229,12 @@ static int mtk_spi_prepare_message(struct spi_master *master, #endif if (mdata->dev_comp->enhance_timing) { - if (chip_config->cs_pol) + /* set CS polarity */ + if (spi->mode & SPI_CS_HIGH) reg_val |= SPI_CMD_CS_POL; else reg_val &= ~SPI_CMD_CS_POL; + if (chip_config->sample_sel) reg_val |= SPI_CMD_SAMPLE_SEL; else @@ -264,6 +265,9 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) u32 reg_val; struct mtk_spi *mdata = spi_master_get_devdata(spi->master); + if (spi->mode & SPI_CS_HIGH) + enable = !enable; + reg_val = readl(mdata->base + SPI_CMD_REG); if (!enable) { reg_val |= SPI_CMD_PAUSE_EN; @@ -647,6 +651,10 @@ static int mtk_spi_probe(struct platform_device *pdev) mdata = spi_master_get_devdata(master); mdata->dev_comp = of_id->data; + + if (mdata->dev_comp->enhance_timing) + master->mode_bits |= SPI_CS_HIGH; + if (mdata->dev_comp->must_tx) master->flags = SPI_MASTER_MUST_TX; diff --git a/include/linux/platform_data/spi-mt65xx.h b/include/linux/platform_data/spi-mt65xx.h index f0e6d64..65fd5ffd2 100644 --- a/include/linux/platform_data/spi-mt65xx.h +++ b/include/linux/platform_data/spi-mt65xx.h @@ -11,7 +11,6 @@ /* Board specific platform_data */ struct mtk_chip_config { - u32 cs_pol; u32 sample_sel; }; #endif -- 2.6.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Applied "spi: mediatek: add SPI_CS_HIGH support" to the spi tree 2019-11-18 4:57 ` [PATCH 1/2] spi: mediatek: add SPI_CS_HIGH support Luhua Xu @ 2019-11-18 17:49 ` Mark Brown 0 siblings, 0 replies; 6+ messages in thread From: Mark Brown @ 2019-11-18 17:49 UTC (permalink / raw) To: Luhua Xu Cc: Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, linux-arm-kernel, linux-kernel, linux-mediatek, linux-spi, Mark Brown, Matthias Brugger, Thomas Gleixner The patch spi: mediatek: add SPI_CS_HIGH support has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From ae7c2d342a10dbef1e054482f46498b6282a1df0 Mon Sep 17 00:00:00 2001 From: Luhua Xu <luhua.xu@mediatek.com> Date: Mon, 18 Nov 2019 12:57:16 +0800 Subject: [PATCH] spi: mediatek: add SPI_CS_HIGH support Change to use SPI_CS_HIGH to support spi CS polarity setting for chips support enhance_timing. Signed-off-by: Luhua Xu <luhua.xu@mediatek.com> Link: https://lore.kernel.org/r/1574053037-26721-2-git-send-email-luhua.xu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-mt65xx.c | 12 ++++++++++-- include/linux/platform_data/spi-mt65xx.h | 1 - 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index 25fe149a8d9a..6783e12c40c2 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -139,7 +139,6 @@ static const struct mtk_spi_compatible mt8183_compat = { * supplies it. */ static const struct mtk_chip_config mtk_default_chip_info = { - .cs_pol = 0, .sample_sel = 0, }; @@ -230,10 +229,12 @@ static int mtk_spi_prepare_message(struct spi_master *master, #endif if (mdata->dev_comp->enhance_timing) { - if (chip_config->cs_pol) + /* set CS polarity */ + if (spi->mode & SPI_CS_HIGH) reg_val |= SPI_CMD_CS_POL; else reg_val &= ~SPI_CMD_CS_POL; + if (chip_config->sample_sel) reg_val |= SPI_CMD_SAMPLE_SEL; else @@ -264,6 +265,9 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) u32 reg_val; struct mtk_spi *mdata = spi_master_get_devdata(spi->master); + if (spi->mode & SPI_CS_HIGH) + enable = !enable; + reg_val = readl(mdata->base + SPI_CMD_REG); if (!enable) { reg_val |= SPI_CMD_PAUSE_EN; @@ -646,6 +650,10 @@ static int mtk_spi_probe(struct platform_device *pdev) mdata = spi_master_get_devdata(master); mdata->dev_comp = of_id->data; + + if (mdata->dev_comp->enhance_timing) + master->mode_bits |= SPI_CS_HIGH; + if (mdata->dev_comp->must_tx) master->flags = SPI_MASTER_MUST_TX; diff --git a/include/linux/platform_data/spi-mt65xx.h b/include/linux/platform_data/spi-mt65xx.h index f0e6d6483e62..65fd5ffd257c 100644 --- a/include/linux/platform_data/spi-mt65xx.h +++ b/include/linux/platform_data/spi-mt65xx.h @@ -11,7 +11,6 @@ /* Board specific platform_data */ struct mtk_chip_config { - u32 cs_pol; u32 sample_sel; }; #endif -- 2.20.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] spi: mediatek: add cs timing configuration support 2019-11-18 4:57 [PATCH 0/2] spi CS customization support Luhua Xu 2019-11-18 4:57 ` [PATCH 1/2] spi: mediatek: add SPI_CS_HIGH support Luhua Xu @ 2019-11-18 4:57 ` Luhua Xu 2019-11-19 18:19 ` Mark Brown 1 sibling, 1 reply; 6+ messages in thread From: Luhua Xu @ 2019-11-18 4:57 UTC (permalink / raw) To: Mark Brown, Matthias Brugger, Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, Thomas Gleixner Cc: linux-spi, linux-arm-kernel, linux-mediatek, linux-kernel, Luhua Xu Add configure SPI CS setup/hold/idle delays in terms of clk count support, and use one period of current spi speed as default if setup/hold/idle not indicated. Signed-off-by: Luhua Xu <luhua.xu@mediatek.com> --- drivers/spi/spi-mt65xx.c | 41 +++++++++++++++++++++++++------- include/linux/platform_data/spi-mt65xx.h | 5 ++++ 2 files changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index f599cce..98df9d1 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -140,6 +140,9 @@ static const struct mtk_spi_compatible mt8183_compat = { */ static const struct mtk_chip_config mtk_default_chip_info = { .sample_sel = 0, + .setup_cnt = 0, + .hold_cnt = 0, + .idle_cnt = 0, }; static const struct of_device_id mtk_spi_of_match[] = { @@ -281,10 +284,13 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) } static void mtk_spi_prepare_transfer(struct spi_master *master, - struct spi_transfer *xfer) + struct spi_transfer *xfer, + struct spi_device *spi) { u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0; struct mtk_spi *mdata = spi_master_get_devdata(master); + struct mtk_chip_config *chip_config = spi->controller_data; + u32 cs_setup, cs_hold, cs_idle; spi_clk_hz = clk_get_rate(mdata->spi_clk); if (xfer->speed_hz < spi_clk_hz / 2) @@ -295,29 +301,46 @@ static void mtk_spi_prepare_transfer(struct spi_master *master, sck_time = (div + 1) / 2; cs_time = sck_time * 2; + if (chip_config->setup_cnt) + cs_setup = chip_config->setup_cnt; + else + cs_setup = cs_time; + + if (chip_config->hold_cnt) + cs_hold = chip_config->hold_cnt; + else + cs_hold = cs_time; + + if (chip_config->idle_cnt) + cs_idle = chip_config->idle_cnt; + else + cs_idle = cs_time; + if (mdata->dev_comp->enhance_timing) { - reg_val |= (((sck_time - 1) & 0xffff) + reg_val = (((sck_time - 1) & 0xffff) << SPI_CFG0_SCK_HIGH_OFFSET); reg_val |= (((sck_time - 1) & 0xffff) << SPI_ADJUST_CFG0_SCK_LOW_OFFSET); writel(reg_val, mdata->base + SPI_CFG2_REG); - reg_val |= (((cs_time - 1) & 0xffff) + + reg_val = (((cs_hold - 1) & 0xffff) << SPI_ADJUST_CFG0_CS_HOLD_OFFSET); - reg_val |= (((cs_time - 1) & 0xffff) + reg_val |= (((cs_setup - 1) & 0xffff) << SPI_ADJUST_CFG0_CS_SETUP_OFFSET); writel(reg_val, mdata->base + SPI_CFG0_REG); } else { reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET); reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET); - reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET); - reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET); + reg_val |= (((cs_hold - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET); + reg_val |= (((cs_setup - 1) & 0xff) + << SPI_CFG0_CS_SETUP_OFFSET); writel(reg_val, mdata->base + SPI_CFG0_REG); } reg_val = readl(mdata->base + SPI_CFG1_REG); reg_val &= ~SPI_CFG1_CS_IDLE_MASK; - reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET); + reg_val |= (((cs_idle - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET); writel(reg_val, mdata->base + SPI_CFG1_REG); } @@ -426,7 +449,7 @@ static int mtk_spi_fifo_transfer(struct spi_master *master, mdata->cur_transfer = xfer; mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, xfer->len); mdata->num_xfered = 0; - mtk_spi_prepare_transfer(master, xfer); + mtk_spi_prepare_transfer(master, xfer, spi); mtk_spi_setup_packet(master); cnt = xfer->len / 4; @@ -458,7 +481,7 @@ static int mtk_spi_dma_transfer(struct spi_master *master, mdata->cur_transfer = xfer; mdata->num_xfered = 0; - mtk_spi_prepare_transfer(master, xfer); + mtk_spi_prepare_transfer(master, xfer, spi); cmd = readl(mdata->base + SPI_CMD_REG); if (xfer->tx_buf) diff --git a/include/linux/platform_data/spi-mt65xx.h b/include/linux/platform_data/spi-mt65xx.h index 65fd5ffd2..80d280e 100644 --- a/include/linux/platform_data/spi-mt65xx.h +++ b/include/linux/platform_data/spi-mt65xx.h @@ -12,5 +12,10 @@ /* Board specific platform_data */ struct mtk_chip_config { u32 sample_sel; + + /* CS timing configuration in terms of clock count */ + u16 setup_cnt; + u16 hold_cnt; + u8 idle_cnt; }; #endif -- 2.6.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] spi: mediatek: add cs timing configuration support 2019-11-18 4:57 ` [PATCH 2/2] spi: mediatek: add cs timing configuration support Luhua Xu @ 2019-11-19 18:19 ` Mark Brown 2019-11-20 9:31 ` luhua xu 0 siblings, 1 reply; 6+ messages in thread From: Mark Brown @ 2019-11-19 18:19 UTC (permalink / raw) To: Luhua Xu Cc: Matthias Brugger, Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, Thomas Gleixner, linux-spi, linux-arm-kernel, linux-mediatek, linux-kernel [-- Attachment #1: Type: text/plain, Size: 612 bytes --] On Mon, Nov 18, 2019 at 12:57:17PM +0800, Luhua Xu wrote: > Add configure SPI CS setup/hold/idle delays in terms > of clk count support, and use one period of current > spi speed as default if setup/hold/idle not indicated. We have added a generic way to specify delays like this via the set_cs_timing() operation and related fields in the spi_device struct which operate in terms of spi_delay - Alexandru Ardelean added them recently. This supports both times and clock cycles as units so should fit with what your hardware can do, the interface is new though so there may be soem rough edges to worry about. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] spi: mediatek: add cs timing configuration support 2019-11-19 18:19 ` Mark Brown @ 2019-11-20 9:31 ` luhua xu 0 siblings, 0 replies; 6+ messages in thread From: luhua xu @ 2019-11-20 9:31 UTC (permalink / raw) To: Mark Brown Cc: Matthias Brugger, Allison Randal, Enrico Weigelt, Kate Stewart, Leilk Liu, Thomas Gleixner, linux-spi, linux-arm-kernel, linux-mediatek, linux-kernel, wsd_upstream On Tue, 2019-11-19 at 18:19 +0000, Mark Brown wrote: > On Mon, Nov 18, 2019 at 12:57:17PM +0800, Luhua Xu wrote: > > Add configure SPI CS setup/hold/idle delays in terms > > of clk count support, and use one period of current > > spi speed as default if setup/hold/idle not indicated. > > We have added a generic way to specify delays like this via the > set_cs_timing() operation and related fields in the spi_device struct > which operate in terms of spi_delay - Alexandru Ardelean added them > recently. This supports both times and clock cycles as units so should > fit with what your hardware can do, the interface is new though so there > may be soem rough edges to worry about. I find the patch today. It's really a better idear. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-11-20 9:31 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-11-18 4:57 [PATCH 0/2] spi CS customization support Luhua Xu 2019-11-18 4:57 ` [PATCH 1/2] spi: mediatek: add SPI_CS_HIGH support Luhua Xu 2019-11-18 17:49 ` Applied "spi: mediatek: add SPI_CS_HIGH support" to the spi tree Mark Brown 2019-11-18 4:57 ` [PATCH 2/2] spi: mediatek: add cs timing configuration support Luhua Xu 2019-11-19 18:19 ` Mark Brown 2019-11-20 9:31 ` luhua xu
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