From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, will@kernel.org,
robin.murphy@arm.com, joro@8bytes.org,
iommu@lists.linux-foundation.org, jcrouse@codeaurora.org,
saiprakash.ranjan@codeaurora.org,
Vivek Gautam <vivek.gautam@codeaurora.org>
Subject: [PATCH v2 2/7] iommu/arm-smmu: Add domain attribute for QCOM system cache
Date: Thu, 2 Jan 2020 16:32:08 +0530 [thread overview]
Message-ID: <1577962933-13577-3-git-send-email-smasetty@codeaurora.org> (raw)
In-Reply-To: <1577962933-13577-1-git-send-email-smasetty@codeaurora.org>
From: Vivek Gautam <vivek.gautam@codeaurora.org>
Add iommu domain attribute for using system cache aka last level
cache on QCOM SoCs by client drivers like GPU to set right
attributes for caching the hardware pagetables into the system cache.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
drivers/iommu/arm-smmu-qcom.c | 10 ++++++++++
drivers/iommu/arm-smmu.c | 14 ++++++++++++++
drivers/iommu/arm-smmu.h | 1 +
include/linux/iommu.h | 1 +
4 files changed, 26 insertions(+)
diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c
index 24c071c..d1d22df 100644
--- a/drivers/iommu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm-smmu-qcom.c
@@ -30,7 +30,17 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu)
return ret;
}
+static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain,
+ struct io_pgtable_cfg *pgtbl_cfg)
+{
+ if (smmu_domain->sys_cache)
+ pgtbl_cfg->coherent_walk = false;
+
+ return 0;
+}
+
static const struct arm_smmu_impl qcom_smmu_impl = {
+ .init_context = qcom_smmu_init_context,
.reset = qcom_sdm845_smmu500_reset,
};
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 4f7e0c0..055b548 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1466,6 +1466,9 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain,
case DOMAIN_ATTR_NESTING:
*(int *)data = (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED);
return 0;
+ case DOMAIN_ATTR_QCOM_SYS_CACHE:
+ *((int *)data) = smmu_domain->sys_cache;
+ return 0;
default:
return -ENODEV;
}
@@ -1506,6 +1509,17 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
else
smmu_domain->stage = ARM_SMMU_DOMAIN_S1;
break;
+ case DOMAIN_ATTR_QCOM_SYS_CACHE:
+ if (smmu_domain->smmu) {
+ ret = -EPERM;
+ goto out_unlock;
+ }
+
+ if (*((int *)data))
+ smmu_domain->sys_cache = true;
+ else
+ smmu_domain->sys_cache = false;
+ break;
default:
ret = -ENODEV;
}
diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
index f57cdbe..8aeaaf0 100644
--- a/drivers/iommu/arm-smmu.h
+++ b/drivers/iommu/arm-smmu.h
@@ -322,6 +322,7 @@ struct arm_smmu_domain {
struct mutex init_mutex; /* Protects smmu pointer */
spinlock_t cb_lock; /* Serialises ATS1* ops and TLB syncs */
struct iommu_domain domain;
+ bool sys_cache;
};
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 0c60e75..bd61c60 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -127,6 +127,7 @@ enum iommu_attr {
DOMAIN_ATTR_FSL_PAMUV1,
DOMAIN_ATTR_NESTING, /* two stages of translation */
DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
+ DOMAIN_ATTR_QCOM_SYS_CACHE,
DOMAIN_ATTR_MAX,
};
--
1.9.1
next prev parent reply other threads:[~2020-01-02 11:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-02 11:02 [PATCH v2 0/7] drm/msm/a6xx: System Cache Support Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 1/7] iommu/arm-smmu: Pass io_pgtable_cfg to impl specific init_context Sharat Masetty
2020-01-31 22:00 ` Matthias Kaehlcke
2020-01-02 11:02 ` Sharat Masetty [this message]
2020-01-03 19:02 ` [Freedreno] [PATCH v2 2/7] iommu/arm-smmu: Add domain attribute for QCOM system cache Rob Clark
2020-01-02 11:02 ` [PATCH v2 3/7] drm/msm: Attach the IOMMU device during initialization Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 4/7] drm/msm: Refactor address space initialization Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 5/7] drm: msm: a6xx: Properly free up the iommu objects Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 6/7] drm/msm: rearrange the gpu_rmw() function Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 7/7] drm/msm/a6xx: Add support for using system cache(LLC) Sharat Masetty
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