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From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, will@kernel.org,
	robin.murphy@arm.com, joro@8bytes.org,
	iommu@lists.linux-foundation.org, jcrouse@codeaurora.org,
	saiprakash.ranjan@codeaurora.org,
	Sharat Masetty <smasetty@codeaurora.org>
Subject: [PATCH v2 6/7] drm/msm: rearrange the gpu_rmw() function
Date: Thu,  2 Jan 2020 16:32:12 +0530	[thread overview]
Message-ID: <1577962933-13577-7-git-send-email-smasetty@codeaurora.org> (raw)
In-Reply-To: <1577962933-13577-1-git-send-email-smasetty@codeaurora.org>

The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/drm/msm/msm_drv.c | 8 ++++++++
 drivers/gpu/drm/msm/msm_drv.h | 1 +
 drivers/gpu/drm/msm/msm_gpu.h | 5 +----
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index f50fefb..4c4559f 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -165,6 +165,14 @@ u32 msm_readl(const void __iomem *addr)
 	return val;
 }
 
+void msm_rmw(void __iomem *addr, u32 mask, u32 or)
+{
+	u32 val = msm_readl(addr);
+
+	val &= ~mask;
+	msm_writel(val | or, addr);
+}
+
 struct msm_vblank_work {
 	struct work_struct work;
 	int crtc_id;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 2203729..1bc778b 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -405,6 +405,7 @@ void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
 		const char *dbgname);
 void msm_writel(u32 data, void __iomem *addr);
 u32 msm_readl(const void __iomem *addr);
+void msm_rmw(void __iomem *addr, u32 mask, u32 or);
 
 struct msm_gpu_submitqueue;
 int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 41d86c2..935a12f 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -223,10 +223,7 @@ static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg)
 
 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)
 {
-	uint32_t val = gpu_read(gpu, reg);
-
-	val &= ~mask;
-	gpu_write(gpu, reg, val | or);
+	msm_rmw(gpu->mmio + (reg << 2), mask, or);
 }
 
 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 lo, u32 hi)
-- 
1.9.1

  parent reply	other threads:[~2020-01-02 11:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-02 11:02 [PATCH v2 0/7] drm/msm/a6xx: System Cache Support Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 1/7] iommu/arm-smmu: Pass io_pgtable_cfg to impl specific init_context Sharat Masetty
2020-01-31 22:00   ` Matthias Kaehlcke
2020-01-02 11:02 ` [PATCH v2 2/7] iommu/arm-smmu: Add domain attribute for QCOM system cache Sharat Masetty
2020-01-03 19:02   ` [Freedreno] " Rob Clark
2020-01-02 11:02 ` [PATCH v2 3/7] drm/msm: Attach the IOMMU device during initialization Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 4/7] drm/msm: Refactor address space initialization Sharat Masetty
2020-01-02 11:02 ` [PATCH v2 5/7] drm: msm: a6xx: Properly free up the iommu objects Sharat Masetty
2020-01-02 11:02 ` Sharat Masetty [this message]
2020-01-02 11:02 ` [PATCH v2 7/7] drm/msm/a6xx: Add support for using system cache(LLC) Sharat Masetty

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