* [PATCH v1 0/2] x86/bugs: Exclude Zhaoxin family 7 CPUs
@ 2020-01-17 2:24 Tony W Wang-oc
2020-01-17 2:24 ` [PATCH v1 1/2] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2 Tony W Wang-oc
2020-01-17 2:24 ` [PATCH v1 2/2] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS Tony W Wang-oc
0 siblings, 2 replies; 5+ messages in thread
From: Tony W Wang-oc @ 2020-01-17 2:24 UTC (permalink / raw)
To: tglx, mingo, bp, hpa, x86, luto, pawan.kumar.gupta, peterz,
fenghua.yu, vineela.tummalapalli, linux-kernel
Cc: DavidWang, CooperYan, QiyuanWang, HerryYang
New Zhaoxin family 7 CPUs are not affected by SPECTRE_V2, SWAPGS.
Extend cpu_vuln_whitelist flag with a NO_SPECTRE_V2 bit. And add
these CPUs to the cpu vulnerability whitelist.
Tony W Wang-oc (2):
x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2
x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS
arch/x86/kernel/cpu/common.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
--
2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 1/2] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2
2020-01-17 2:24 [PATCH v1 0/2] x86/bugs: Exclude Zhaoxin family 7 CPUs Tony W Wang-oc
@ 2020-01-17 2:24 ` Tony W Wang-oc
2020-01-17 18:19 ` [tip: x86/pti] " tip-bot2 for Tony W Wang-oc
2020-01-17 2:24 ` [PATCH v1 2/2] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS Tony W Wang-oc
1 sibling, 1 reply; 5+ messages in thread
From: Tony W Wang-oc @ 2020-01-17 2:24 UTC (permalink / raw)
To: tglx, mingo, bp, hpa, x86, luto, pawan.kumar.gupta, peterz,
fenghua.yu, vineela.tummalapalli, linux-kernel
Cc: DavidWang, CooperYan, QiyuanWang, HerryYang
New Zhaoxin family 7 CPUs are not affected by SPECTRE_V2. So create
a separate cpu_vuln_whitelist flag bit NO_SPECTRE_V2 and add these
CPUs to the cpu vulnerability whitelist.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
arch/x86/kernel/cpu/common.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2e4d902..6048bd3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1023,6 +1023,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
#define MSBDS_ONLY BIT(5)
#define NO_SWAPGS BIT(6)
#define NO_ITLB_MULTIHIT BIT(7)
+#define NO_SPECTRE_V2 BIT(8)
#define VULNWL(_vendor, _family, _model, _whitelist) \
{ X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
@@ -1084,6 +1085,10 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
/* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
+
+ /* Zhaoxin Family 7 */
+ VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
+ VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
{}
};
@@ -1116,7 +1121,9 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
return;
setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
- setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+
+ if (!cpu_matches(NO_SPECTRE_V2))
+ setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) &&
!cpu_has(c, X86_FEATURE_AMD_SSB_NO))
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 2/2] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS
2020-01-17 2:24 [PATCH v1 0/2] x86/bugs: Exclude Zhaoxin family 7 CPUs Tony W Wang-oc
2020-01-17 2:24 ` [PATCH v1 1/2] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2 Tony W Wang-oc
@ 2020-01-17 2:24 ` Tony W Wang-oc
2020-01-17 18:19 ` [tip: x86/pti] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability tip-bot2 for Tony W Wang-oc
1 sibling, 1 reply; 5+ messages in thread
From: Tony W Wang-oc @ 2020-01-17 2:24 UTC (permalink / raw)
To: tglx, mingo, bp, hpa, x86, luto, pawan.kumar.gupta, peterz,
fenghua.yu, vineela.tummalapalli, linux-kernel
Cc: DavidWang, CooperYan, QiyuanWang, HerryYang
New Zhaoxin family 7 CPUs are not affected by SWAPGS. So add these
CPUs to the cpu vulnerability whitelist.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
arch/x86/kernel/cpu/common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6048bd3..ca4a0d2 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1087,8 +1087,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
/* Zhaoxin Family 7 */
- VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
- VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
+ VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS),
+ VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS),
{}
};
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [tip: x86/pti] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability
2020-01-17 2:24 ` [PATCH v1 2/2] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS Tony W Wang-oc
@ 2020-01-17 18:19 ` tip-bot2 for Tony W Wang-oc
0 siblings, 0 replies; 5+ messages in thread
From: tip-bot2 for Tony W Wang-oc @ 2020-01-17 18:19 UTC (permalink / raw)
To: linux-tip-commits; +Cc: Tony W Wang-oc, Thomas Gleixner, x86, LKML
The following commit has been merged into the x86/pti branch of tip:
Commit-ID: a84de2fa962c1b0551653fe245d6cb5f6129179c
Gitweb: https://git.kernel.org/tip/a84de2fa962c1b0551653fe245d6cb5f6129179c
Author: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
AuthorDate: Fri, 17 Jan 2020 10:24:32 +08:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Fri, 17 Jan 2020 19:13:47 +01:00
x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability
New Zhaoxin family 7 CPUs are not affected by the SWAPGS vulnerability. So
mark these CPUs in the cpu vulnerability whitelist accordingly.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/1579227872-26972-3-git-send-email-TonyWWang-oc@zhaoxin.com
---
arch/x86/kernel/cpu/common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6048bd3..ca4a0d2 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1087,8 +1087,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
/* Zhaoxin Family 7 */
- VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
- VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
+ VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS),
+ VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS),
{}
};
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [tip: x86/pti] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2
2020-01-17 2:24 ` [PATCH v1 1/2] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2 Tony W Wang-oc
@ 2020-01-17 18:19 ` tip-bot2 for Tony W Wang-oc
0 siblings, 0 replies; 5+ messages in thread
From: tip-bot2 for Tony W Wang-oc @ 2020-01-17 18:19 UTC (permalink / raw)
To: linux-tip-commits; +Cc: Tony W Wang-oc, Thomas Gleixner, x86, LKML
The following commit has been merged into the x86/pti branch of tip:
Commit-ID: 1e41a766c98b481400ab8c5a7aa8ea63a1bb03de
Gitweb: https://git.kernel.org/tip/1e41a766c98b481400ab8c5a7aa8ea63a1bb03de
Author: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
AuthorDate: Fri, 17 Jan 2020 10:24:31 +08:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Fri, 17 Jan 2020 19:13:47 +01:00
x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2
New Zhaoxin family 7 CPUs are not affected by SPECTRE_V2. So define a
separate cpu_vuln_whitelist bit NO_SPECTRE_V2 and add these CPUs to the cpu
vulnerability whitelist.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/1579227872-26972-2-git-send-email-TonyWWang-oc@zhaoxin.com
---
arch/x86/kernel/cpu/common.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2e4d902..6048bd3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1023,6 +1023,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
#define MSBDS_ONLY BIT(5)
#define NO_SWAPGS BIT(6)
#define NO_ITLB_MULTIHIT BIT(7)
+#define NO_SPECTRE_V2 BIT(8)
#define VULNWL(_vendor, _family, _model, _whitelist) \
{ X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
@@ -1084,6 +1085,10 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
/* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
+
+ /* Zhaoxin Family 7 */
+ VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
+ VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2),
{}
};
@@ -1116,7 +1121,9 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
return;
setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
- setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+
+ if (!cpu_matches(NO_SPECTRE_V2))
+ setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) &&
!cpu_has(c, X86_FEATURE_AMD_SSB_NO))
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-01-17 18:19 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-17 2:24 [PATCH v1 0/2] x86/bugs: Exclude Zhaoxin family 7 CPUs Tony W Wang-oc
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2020-01-17 18:19 ` [tip: x86/pti] " tip-bot2 for Tony W Wang-oc
2020-01-17 2:24 ` [PATCH v1 2/2] x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS Tony W Wang-oc
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