From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org
Cc: acme@kernel.org, tglx@linutronix.de, bp@alien8.de,
namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com,
yao.jin@linux.intel.com, alexander.shishkin@linux.intel.com,
adrian.hunter@intel.com, ricardo.neri-calderon@linux.intel.com,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V5 19/25] perf/x86: Support filter_match callback
Date: Mon, 5 Apr 2021 08:11:01 -0700 [thread overview]
Message-ID: <1617635467-181510-20-git-send-email-kan.liang@linux.intel.com> (raw)
In-Reply-To: <1617635467-181510-1-git-send-email-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
Implement filter_match callback for X86, which check whether an event is
schedulable on the current CPU.
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/core.c | 10 ++++++++++
arch/x86/events/perf_event.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 16b4f6f..09922ee 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2650,6 +2650,14 @@ static int x86_pmu_aux_output_match(struct perf_event *event)
return 0;
}
+static int x86_pmu_filter_match(struct perf_event *event)
+{
+ if (x86_pmu.filter_match)
+ return x86_pmu.filter_match(event);
+
+ return 1;
+}
+
static struct pmu pmu = {
.pmu_enable = x86_pmu_enable,
.pmu_disable = x86_pmu_disable,
@@ -2677,6 +2685,8 @@ static struct pmu pmu = {
.check_period = x86_pmu_check_period,
.aux_output_match = x86_pmu_aux_output_match,
+
+ .filter_match = x86_pmu_filter_match,
};
void arch_perf_update_userpage(struct perf_event *event,
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index c1c90c3..f996686 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -870,6 +870,7 @@ struct x86_pmu {
int (*aux_output_match) (struct perf_event *event);
+ int (*filter_match)(struct perf_event *event);
/*
* Hybrid support
*
--
2.7.4
next prev parent reply other threads:[~2021-04-05 15:18 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-05 15:10 [PATCH V5 00/25] Add Alder Lake support for perf (kernel) kan.liang
2021-04-05 15:10 ` [PATCH V5 01/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang
2021-04-05 15:10 ` [PATCH V5 02/25] x86/cpu: Add helper function to get the type of the current hybrid CPU kan.liang
2021-04-05 15:10 ` [PATCH V5 03/25] perf/x86: Track pmu in per-CPU cpu_hw_events kan.liang
2021-04-05 15:10 ` [PATCH V5 04/25] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang
2021-04-08 13:40 ` Peter Zijlstra
2021-04-08 14:19 ` Peter Zijlstra
2021-04-08 18:24 ` Liang, Kan
2021-04-08 17:00 ` Peter Zijlstra
2021-04-08 17:40 ` Liang, Kan
2021-04-05 15:10 ` [PATCH V5 05/25] perf/x86: Hybrid PMU support for intel_ctrl kan.liang
2021-04-05 15:10 ` [PATCH V5 06/25] perf/x86: Hybrid PMU support for counters kan.liang
2021-04-05 15:10 ` [PATCH V5 07/25] perf/x86: Hybrid PMU support for unconstrained kan.liang
2021-04-05 15:10 ` [PATCH V5 08/25] perf/x86: Hybrid PMU support for hardware cache event kan.liang
2021-04-08 14:22 ` Peter Zijlstra
2021-04-05 15:10 ` [PATCH V5 09/25] perf/x86: Hybrid PMU support for event constraints kan.liang
2021-04-05 15:10 ` [PATCH V5 10/25] perf/x86: Hybrid PMU support for extra_regs kan.liang
2021-04-05 15:10 ` [PATCH V5 11/25] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang
2021-04-05 15:10 ` [PATCH V5 12/25] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang
2021-04-05 15:10 ` [PATCH V5 13/25] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang
2021-04-05 15:10 ` [PATCH V5 14/25] perf/x86: Remove temporary pmu assignment in event_init kan.liang
2021-04-05 15:10 ` [PATCH V5 15/25] perf/x86: Factor out x86_pmu_show_pmu_cap kan.liang
2021-04-05 15:10 ` [PATCH V5 16/25] perf/x86: Register hybrid PMUs kan.liang
2021-04-09 6:58 ` Peter Zijlstra
2021-04-09 13:50 ` Liang, Kan
2021-04-09 15:45 ` Peter Zijlstra
2021-04-09 15:47 ` Liang, Kan
2021-04-05 15:10 ` [PATCH V5 17/25] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang
2021-04-05 15:11 ` [PATCH V5 18/25] perf/x86/intel: Add attr_update for " kan.liang
2021-04-05 15:11 ` kan.liang [this message]
2021-04-05 15:11 ` [PATCH V5 20/25] perf/x86/intel: Add Alder Lake Hybrid support kan.liang
2021-04-05 15:11 ` [PATCH V5 21/25] perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU kan.liang
2021-04-09 9:21 ` Peter Zijlstra
2021-04-09 15:24 ` Liang, Kan
2021-04-09 15:51 ` Peter Zijlstra
2021-04-05 15:11 ` [PATCH V5 22/25] perf/x86/intel/uncore: Add Alder Lake support kan.liang
2021-04-05 15:11 ` [PATCH V5 23/25] perf/x86/msr: Add Alder Lake CPU support kan.liang
2021-04-09 9:24 ` Peter Zijlstra
2021-04-09 14:35 ` Liang, Kan
2021-04-05 15:11 ` [PATCH V5 24/25] perf/x86/cstate: " kan.liang
2021-04-05 15:11 ` [PATCH V5 25/25] perf/x86/rapl: Add support for Intel Alder Lake kan.liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1617635467-181510-20-git-send-email-kan.liang@linux.intel.com \
--to=kan.liang@linux.intel.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=bp@alien8.de \
--cc=jolsa@redhat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=ricardo.neri-calderon@linux.intel.com \
--cc=tglx@linutronix.de \
--cc=yao.jin@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).