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From: Yong Wu <yong.wu@mediatek.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	<chao.hao@mediatek.com>
Subject: Re: [PATCH 01/24] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU
Date: Wed, 30 Jun 2021 15:30:57 +0800	[thread overview]
Message-ID: <1625038257.25647.5.camel@mhfsdcap03> (raw)
In-Reply-To: <41809d87-0f1b-13fd-b565-26a17626aad9@canonical.com>

On Wed, 2021-06-30 at 08:26 +0200, Krzysztof Kozlowski wrote:
> On 30/06/2021 04:34, Yong Wu wrote:
> > This patch adds descriptions for mt8195 IOMMU which also use ARM
> > Short-Descriptor translation table format.
> > 
> > In mt8195, there are two smi-common HW and IOMMU, one is for vdo(video
> > output), the other is for vpp(video processing pipe). They connects
> > with different smi-larbs, then some setting(larbid_remap) is different.
> > Differentiate them with the compatible string.
> > 
> > Something like this:
> > 
> >     IOMMU(VDO)          IOMMU(VPP)
> >        |                   |
> >   SMI_COMMON_VDO      SMI_COMMON_VPP
> >   ---------------     ----------------
> >   |      |   ...      |      |     ...
> > larb0 larb2  ...    larb1 larb3    ...
> > 
> > Another change is that we have a new IOMMU that is for infra master like
> > PCIe and USB. The infra master don't have the larb and ports, thus we
> > rename the port header file to mt8195-memory-port.h rather than
> > mt8195-larb-port.h.
> > 
> > Also, the IOMMU is not only for MM, thus, we don't call it "m4u" which
> > means "MultiMedia Memory Management UNIT". thus, use the "iommu" as the
> > compatiable string.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > ---
> >  .../bindings/iommu/mediatek,iommu.yaml        |   7 +
> >  .../dt-bindings/memory/mt8195-memory-port.h   | 390 ++++++++++++++++++
> >  2 files changed, 397 insertions(+)
> >  create mode 100644 include/dt-bindings/memory/mt8195-memory-port.h
> > 
> 
> I understand this will go through IOMMU tree. Do you know about any
> further patches for memory controllers which will need the header?

This header file will only be used in dtsi file. the iommu masters will
use these port definitions in the dtsi.

The SMI driver no need include this header file.

By the way, the mt8195 SMI patches is at:

https://lore.kernel.org/linux-mediatek/20210616114346.18812-1-yong.wu@mediatek.com/ 

> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

Thanks very much for your quick review.

> 
> 
> Best regards,
> Krzysztof
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek


  reply	other threads:[~2021-06-30  7:31 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-30  2:34 [PATCH 00/24] MT8195 IOMMU SUPPORT Yong Wu
2021-06-30  2:34 ` [PATCH 01/24] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-06-30  6:26   ` Krzysztof Kozlowski
2021-06-30  7:30     ` Yong Wu [this message]
2021-07-14 21:11   ` Rob Herring
2021-06-30  2:34 ` [PATCH 02/24] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-06-30  6:27   ` Krzysztof Kozlowski
2021-07-14 21:14   ` Rob Herring
2021-06-30  2:34 ` [PATCH 03/24] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-06-30  2:34 ` [PATCH 04/24] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2021-06-30  2:34 ` [PATCH 05/24] iommu/mediatek: Add 12G~16G support for mult domain Yong Wu
2021-06-30  2:34 ` [PATCH 06/24] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2021-06-30  2:34 ` [PATCH 07/24] iommu/mediatek: Add flag NON_STD_AXI Yong Wu
2021-06-30  2:34 ` [PATCH 08/24] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2021-06-30  2:34 ` [PATCH 09/24] iommu/mediatek: Always pm_runtime_get while tlb flush Yong Wu
2021-06-30  2:34 ` [PATCH 10/24] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2021-06-30  2:34 ` [PATCH 11/24] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2021-06-30  2:34 ` [PATCH 12/24] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2021-06-30  2:34 ` [PATCH 13/24] iommu/mediatek: Add infra iommu support Yong Wu
2021-06-30  2:34 ` [PATCH 14/24] iommu/mediatek: Add PCIe support Yong Wu
2021-06-30  2:34 ` [PATCH 15/24] iommu/mediatek: Add mt8195 support Yong Wu
2021-06-30  2:34 ` [PATCH 16/24] iommu/mediatek: Only adjust code about register base Yong Wu
2021-06-30  2:34 ` [PATCH 17/24] iommu/mediatek: Just move code position in hw_init Yong Wu
2021-06-30  2:34 ` [PATCH 18/24] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2021-06-30  2:34 ` [PATCH 19/24] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2021-06-30  2:35 ` [PATCH 20/24] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2021-06-30  2:35 ` [PATCH 21/24] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2021-06-30  2:35 ` [PATCH 22/24] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2021-06-30  2:35 ` [PATCH 23/24] iommu/mediatek: Add multi bank support Yong Wu
2021-06-30  2:35 ` [PATCH 24/24] iommu/mediatek: mt8195: Enable multi-bank for infra iommu Yong Wu

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