From: CK Hu <ck.hu@mediatek.com>
To: Bo-Chen Chen <rex-bc.chen@mediatek.com>,
<chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>,
<daniel@ffwll.ch>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <mripard@kernel.org>,
<tzimmermann@suse.de>, <matthias.bgg@gmail.com>, <deller@gmx.de>,
<airlied@linux.ie>
Cc: <msp@baylibre.com>, <granquet@baylibre.com>,
<jitao.shi@mediatek.com>, <wenst@chromium.org>,
<angelogioacchino.delregno@collabora.com>,
<liangxu.xu@mediatek.com>, <dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-fbdev@vger.kernel.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH v14 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver
Date: Wed, 13 Jul 2022 17:45:41 +0800 [thread overview]
Message-ID: <1dc880e7b5b6a28911a0c7acb29fa423ddb10da0.camel@mediatek.com> (raw)
In-Reply-To: <20220712111223.13080-6-rex-bc.chen@mediatek.com>
Hi, Bo-Chen:
On Tue, 2022-07-12 at 19:12 +0800, Bo-Chen Chen wrote:
> From: Markus Schneider-Pargmann <msp@baylibre.com>
>
> This patch adds a embedded displayport driver for the MediaTek mt8195
> SoC.
>
> It supports the MT8195, the embedded DisplayPort units. It offers
> DisplayPort 1.4 with up to 4 lanes.
>
> The driver creates a child device for the phy. The child device will
> never exist without the parent being active. As they are sharing a
> register range, the parent passes a regmap pointer to the child so
> that
> both can work with the same register range. The phy driver sets
> device
> data that is read by the parent to get the phy device that can be
> used
> to control the phy properties.
>
> This driver is based on an initial version by
> Jitao shi <jitao.shi@mediatek.com>
>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> ---
[snip]
> +
> +static void mtk_dp_set_msa(struct mtk_dp *mtk_dp)
> +{
> + struct drm_display_mode mode;
> + struct mtk_dp_timings *timings = &mtk_dp->info.timings;
> +
> + drm_display_mode_from_videomode(&timings->vm, &mode);
> +
> + /* horizontal */
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3010,
> + mode.htotal, HTOTAL_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3018,
> + timings->vm.hsync_len + timings-
> >vm.hback_porch,
> + HSTART_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3028,
> + timings->vm.hsync_len <<
> HSW_SW_DP_ENC0_P0_SHIFT,
Directly use a number for shift because we know it's a shift, so it's
not necessary to define a symbol for shift.
> + HSW_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3028,
> + 0, HSP_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3020,
> + timings->vm.hactive,
> HWIDTH_SW_DP_ENC0_P0_MASK);
> +
> + /* vertical */
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3014,
> + mode.vtotal, VTOTAL_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_301C,
> + timings->vm.vsync_len + timings-
> >vm.vback_porch,
> + VSTART_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_302C,
> + timings->vm.vsync_len <<
> VSW_SW_DP_ENC0_P0_SHIFT,
Ditto.
Regards,
CK
> + VSW_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_302C,
> + 0, VSP_SW_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3024,
> + timings->vm.vactive,
> VHEIGHT_SW_DP_ENC0_P0_MASK);
> +
> + /* horizontal */
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3064,
> + timings->vm.hactive,
> HDE_NUM_LAST_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3154,
> + mode.htotal, PGEN_HTOTAL_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3158,
> + timings->vm.hfront_porch,
> + PGEN_HSYNC_RISING_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_315C,
> + timings->vm.hsync_len,
> + PGEN_HSYNC_PULSE_WIDTH_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3160,
> + timings->vm.hback_porch + timings-
> >vm.hsync_len,
> + PGEN_HFDE_START_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3164,
> + timings->vm.hactive,
> + PGEN_HFDE_ACTIVE_WIDTH_DP_ENC0_P0_MASK);
> +
> + /* vertical */
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3168,
> + mode.vtotal,
> + PGEN_VTOTAL_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_316C,
> + timings->vm.vfront_porch,
> + PGEN_VSYNC_RISING_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3170,
> + timings->vm.vsync_len,
> + PGEN_VSYNC_PULSE_WIDTH_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3174,
> + timings->vm.vback_porch + timings-
> >vm.vsync_len,
> + PGEN_VFDE_START_DP_ENC0_P0_MASK);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3178,
> + timings->vm.vactive,
> + PGEN_VFDE_ACTIVE_WIDTH_DP_ENC0_P0_MASK);
> +}
> +
next prev parent reply other threads:[~2022-07-13 9:46 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 11:12 [PATCH v14 00/10] drm/mediatek: Add MT8195 DisplayPort driver Bo-Chen Chen
2022-07-12 11:12 ` [PATCH v14 01/10] dt-bindings: mediatek,dp: Add Display Port binding Bo-Chen Chen
2022-07-13 7:56 ` CK Hu
2022-07-26 6:18 ` Rex-BC Chen
2022-07-26 8:46 ` CK Hu
2022-07-18 20:21 ` Rob Herring
2022-07-12 11:12 ` [PATCH v14 02/10] drm/edid: Convert cea_sad helper struct to kernelDoc Bo-Chen Chen
2022-07-12 11:12 ` [PATCH v14 03/10] drm/edid: Add cea_sad helpers for freq/length Bo-Chen Chen
2022-07-14 11:12 ` AngeloGioacchino Del Regno
2022-07-14 11:19 ` Rex-BC Chen
2022-07-12 11:12 ` [PATCH v14 04/10] video/hdmi: Add audio_infoframe packing for DP Bo-Chen Chen
2022-07-14 11:26 ` AngeloGioacchino Del Regno
2022-07-12 11:12 ` [PATCH v14 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver Bo-Chen Chen
2022-07-13 8:03 ` CK Hu
2022-07-13 8:10 ` CK Hu
2022-07-14 8:24 ` Rex-BC Chen
2022-07-14 10:21 ` CK Hu
2022-07-13 8:22 ` CK Hu
2022-07-13 8:30 ` CK Hu
2022-07-13 9:12 ` CK Hu
2022-07-13 9:31 ` CK Hu
2022-07-14 8:52 ` Rex-BC Chen
2022-07-13 9:33 ` CK Hu
2022-07-14 8:57 ` Rex-BC Chen
2022-07-13 9:45 ` CK Hu [this message]
2022-07-14 6:51 ` CK Hu
2022-07-14 9:09 ` Rex-BC Chen
2022-07-14 10:34 ` CK Hu
2022-07-14 7:06 ` CK Hu
2022-07-15 8:51 ` CK Hu
2022-07-21 2:38 ` Rex-BC Chen
2022-07-21 6:24 ` CK Hu
2022-07-15 9:13 ` CK Hu
2022-07-15 9:14 ` CK Hu
2022-07-15 9:37 ` CK Hu
2022-07-15 18:01 ` kernel test robot
2022-07-25 9:16 ` CK Hu
2022-07-26 6:42 ` Rex-BC Chen
2022-07-26 9:34 ` CK Hu
2022-07-26 10:06 ` Rex-BC Chen
2022-07-25 9:23 ` CK Hu
2022-07-26 3:30 ` Rex-BC Chen
2022-07-26 8:37 ` CK Hu
2022-07-12 11:12 ` [PATCH v14 06/10] drm/mediatek: Add MT8195 External DisplayPort support Bo-Chen Chen
2022-07-25 9:51 ` CK Hu
2022-07-12 11:12 ` [PATCH v14 07/10] drm/mediatek: add hpd debounce Bo-Chen Chen
2022-07-12 11:12 ` [PATCH v14 08/10] drm/mediatek: set monitor to DP_SET_POWER_D3 to avoid garbage Bo-Chen Chen
2022-07-12 11:12 ` [PATCH v14 09/10] drm/mediatek: DP audio support for MT8195 Bo-Chen Chen
2022-07-14 11:43 ` AngeloGioacchino Del Regno
2022-07-12 11:12 ` [PATCH v14 10/10] drm/mediatek: Use cached audio config when changing resolution Bo-Chen Chen
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