From: Karsten Wiese <annabellesgarden@yahoo.de>
To: Ingo Molnar <mingo@elte.hu>
Cc: William Weston <weston@sysex.net>, linux-kernel@vger.kernel.org
Subject: Re: Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24
Date: Wed, 29 Jun 2005 16:48:16 +0200 [thread overview]
Message-ID: <200506291648.16601.annabellesgarden@yahoo.de> (raw)
In-Reply-To: <Pine.LNX.4.58.0506290159050.12101@echo.lysdexia.org>
[-- Attachment #1: Type: text/plain, Size: 937 bytes --]
Am Mittwoch, 29. Juni 2005 11:15 schrieb William Weston:
> On Wed, 29 Jun 2005, Ingo Molnar wrote:
>
> > > [...] but i think i'm going to revert that, it's causing too many
> > > problems all around.
> >
> > reverted it and this enabled the removal of the extra ->disable() you
> > noticed - this should further speed up the IOAPIC code. These changes
> > are in the -50-34 kernel i just uploaded.
>
> -50-34 fixed the wakeup latency regression I was seeing on my Athlon box
> with -50-33, and seems a bit more responsive than -50-25. Max wakeup
> latency is back down to 14us (from 39us), even while running JACK (xrun
> free) and two instances of burnK7. Overall system response is probably
> the best I've seen with the RT kernels ;-}
>
attached patch for io_apic.c lets
1. gcc 3.4.3 optimize io_apic access a little better.
2. CONFIG_X86_UP_IOAPIC_FAST work here.
Didn't check, if it really speeds up things.
Karsten
[-- Attachment #2: io_apic-RT-50-35.diff --]
[-- Type: text/x-diff, Size: 3593 bytes --]
--- arch/i386/kernel/io_apic.c-50-33 2005-06-29 16:27:40.000000000 +0200
+++ arch/i386/kernel/io_apic.c 2005-06-29 16:27:40.000000000 +0200
@@ -138,14 +138,22 @@
/*
* Cache register values:
*/
-static unsigned int io_apic_cache[MAX_IO_APICS][MAX_IOAPIC_CACHE]
+static struct {
+ unsigned int reg;
+ unsigned int val[MAX_IOAPIC_CACHE];
+} io_apic_cache[MAX_IO_APICS]
____cacheline_aligned_in_smp;
#endif
inline unsigned int __raw_io_apic_read(unsigned int apic, unsigned int reg)
{
- *IO_APIC_BASE(apic) = reg;
- return *(IO_APIC_BASE(apic)+4);
+ volatile unsigned int *io_apic;
+ io_apic = IO_APIC_BASE(apic);
+#ifdef IOAPIC_CACHE
+ io_apic_cache[apic].reg = reg;
+#endif
+ io_apic[0] = reg;
+ return io_apic[4];
}
unsigned int raw_io_apic_read(unsigned int apic, unsigned int reg)
@@ -153,7 +161,7 @@
unsigned int val = __raw_io_apic_read(apic, reg);
#ifdef IOAPIC_CACHE
- io_apic_cache[apic][reg] = val;
+ io_apic_cache[apic].val[reg] = val;
#endif
return val;
}
@@ -172,14 +180,17 @@
}
return __raw_io_apic_read(apic, reg);
}
- if (io_apic_cache[apic][reg] && !sis_apic_bug)
- return io_apic_cache[apic][reg];
+ if (io_apic_cache[apic].val[reg] && !sis_apic_bug) {
+ io_apic_cache[apic].reg = -1;
+ return io_apic_cache[apic].val[reg];
+ }
#endif
return raw_io_apic_read(apic, reg);
}
void io_apic_write(unsigned int apic, unsigned int reg, unsigned int val)
{
+ volatile unsigned int *io_apic;
#ifdef IOAPIC_CACHE
if (unlikely(reg >= MAX_IOAPIC_CACHE)) {
static int once = 1;
@@ -191,10 +202,14 @@
dump_stack();
}
} else
- io_apic_cache[apic][reg] = val;
+ io_apic_cache[apic].val[reg] = val;
#endif
- *IO_APIC_BASE(apic) = reg;
- *(IO_APIC_BASE(apic)+4) = val;
+ io_apic = IO_APIC_BASE(apic);
+#ifdef IOAPIC_CACHE
+ io_apic_cache[apic].reg = reg;
+#endif
+ io_apic[0] = reg;
+ io_apic[4] = val;
}
/*
@@ -214,34 +229,42 @@
*/
void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val)
{
+ volatile unsigned int *io_apic;
#ifdef IOAPIC_CACHE
- io_apic_cache[apic][reg] = val;
+ io_apic_cache[apic].val[reg] = val;
#endif
- if (unlikely(sis_apic_bug))
- *IO_APIC_BASE(apic) = reg;
- *(IO_APIC_BASE(apic)+4) = val;
+ io_apic = IO_APIC_BASE(apic);
+#ifdef IOAPIC_CACHE
+ if (io_apic_cache[apic].reg != reg || sis_apic_bug) {
+ io_apic_cache[apic].reg = reg;
+#else
+ if (unlikely(sis_apic_bug)) {
+#endif
+ io_apic[0] = reg;
+ }
+ io_apic[4] = val;
#ifndef IOAPIC_POSTFLUSH
if (unlikely(sis_apic_bug))
#endif
/*
* Force POST flush by reading:
*/
- val = *(IO_APIC_BASE(apic)+4);
+ val = io_apic[4];
}
static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsigned long disable)
{
struct irq_pin_list *entry = irq_2_pin + irq;
- unsigned int pin, reg;
+ unsigned int pin, val;
for (;;) {
pin = entry->pin;
if (pin == -1)
break;
- reg = io_apic_read(entry->apic, 0x10 + pin*2);
- reg &= ~disable;
- reg |= enable;
- io_apic_modify(entry->apic, 0x10 + pin*2, reg);
+ val = io_apic_read(entry->apic, 0x10 + pin*2);
+ val &= ~disable;
+ val |= enable;
+ io_apic_modify(entry->apic, 0x10 + pin*2, val);
if (!entry->next)
break;
entry = irq_2_pin + entry->next;
@@ -306,9 +329,13 @@
{
int apic, pin;
- for (apic = 0; apic < nr_ioapics; apic++)
+ for (apic = 0; apic < nr_ioapics; apic++) {
+#ifdef IOAPIC_CACHE
+ io_apic_cache[apic].reg = -1;
+#endif
for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
clear_IO_APIC_pin(apic, pin);
+ }
}
static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
next prev parent reply other threads:[~2005-06-29 14:47 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-06-28 17:27 Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 Karsten Wiese
2005-06-28 20:21 ` Ingo Molnar
2005-06-28 20:30 ` Ingo Molnar
2005-06-28 23:51 ` Karsten Wiese
2005-06-29 6:34 ` Ingo Molnar
2005-06-29 7:00 ` Ingo Molnar
2005-06-29 9:15 ` William Weston
2005-06-29 12:56 ` Ingo Molnar
2005-06-30 1:50 ` William Weston
2005-06-29 14:48 ` Karsten Wiese [this message]
2005-06-29 19:38 ` Ingo Molnar
2005-06-29 23:36 ` Karsten Wiese
2005-06-30 17:52 ` Karsten Wiese
2005-06-30 19:46 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-37 William Weston
2005-06-30 19:52 ` Ingo Molnar
2005-06-30 20:48 ` Ingo Molnar
2005-06-30 22:17 ` Gene Heskett
2005-06-30 22:15 ` Gene Heskett
2005-06-30 20:38 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-38 Michal Schmidt
2005-06-30 20:47 ` Ingo Molnar
2005-06-30 20:50 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 Ingo Molnar
2005-06-30 22:27 ` Karsten Wiese
2005-06-30 22:59 ` William Weston
2005-07-01 1:00 ` William Weston
2005-07-01 0:15 ` Karsten Wiese
2005-07-01 7:18 ` Ingo Molnar
2005-07-01 19:34 ` Chuck Harding
2005-07-02 1:46 ` William Weston
2005-07-02 2:02 ` Lee Revell
2005-07-04 8:53 ` William Weston
2005-07-04 11:16 ` Ingo Molnar
2005-07-13 1:18 ` Lee Revell
2005-07-13 1:28 ` Lee Revell
2005-07-13 6:35 ` Ingo Molnar
2005-07-13 17:20 ` Lee Revell
2005-07-03 14:04 ` Ingo Molnar
2005-07-03 18:12 ` Ingo Molnar
2005-07-05 20:43 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-45 William Weston
2005-07-06 10:04 ` Ingo Molnar
2005-07-06 21:12 ` William Weston
2005-07-07 14:56 ` Steven Rostedt
2005-07-07 15:31 ` Ingo Molnar
2005-07-07 15:42 ` Steven Rostedt
2005-07-07 16:10 ` Steven Rostedt
2005-07-07 16:48 ` Ingo Molnar
2005-07-08 7:02 ` Steven Rostedt
2005-07-08 9:54 ` Steven Rostedt
2005-07-08 10:00 ` Ingo Molnar
2005-07-08 20:55 ` Bill Davidsen
2005-07-07 17:51 ` Ingo Molnar
2005-07-07 21:18 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-12 Chuck Harding
2005-07-08 5:41 ` Ingo Molnar
2005-07-08 8:00 ` Ingo Molnar
2005-07-08 18:06 ` Chuck Harding
2005-07-07 19:05 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-08 William Weston
2005-07-07 19:18 ` Ingo Molnar
2005-07-07 19:46 ` William Weston
2005-07-07 19:52 ` Ingo Molnar
2005-07-08 9:23 ` Ingo Molnar
2005-07-08 9:29 ` Ingo Molnar
2005-07-08 9:45 ` Ingo Molnar
2005-07-08 20:30 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-17 William Weston
2005-07-07 1:26 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 William Weston
2005-07-07 10:48 ` Ingo Molnar
2005-07-07 18:49 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-06 William Weston
2005-07-07 20:02 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-12 William Weston
2005-07-08 8:03 ` Ingo Molnar
2005-07-08 20:12 ` William Weston
2005-07-09 21:24 ` Peter Zijlstra
2005-07-10 11:18 ` Peter Zijlstra
2005-07-10 15:10 ` Ingo Molnar
2005-07-10 15:43 ` Peter Zijlstra
2005-07-10 16:12 ` Peter Zijlstra
2005-07-10 18:26 ` Ingo Molnar
2005-07-11 18:49 ` William Weston
2005-07-08 22:33 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.51-17 William Weston
-- strict thread matches above, loose matches on Subject: below --
2005-07-12 10:23 Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 Karsten Wiese
2005-07-12 14:02 ` Ingo Molnar
2005-07-12 14:25 ` Daniel Walker
2005-07-12 14:28 ` Ingo Molnar
2005-07-12 14:31 ` Daniel Walker
2005-07-12 14:46 ` Ingo Molnar
2005-07-12 14:56 ` Daniel Walker
2005-07-16 2:11 ` Daniel Walker
2005-07-16 17:11 ` Ingo Molnar
2005-07-12 14:47 ` K.R. Foley
2005-07-12 16:01 ` Ingo Molnar
2005-07-12 16:16 ` K.R. Foley
2005-07-13 0:02 ` William Weston
2005-07-13 0:04 ` Karsten Wiese
2005-07-13 0:08 ` William Weston
2005-07-15 12:05 ` Karsten Wiese
2005-07-16 19:32 ` Ingo Molnar
2005-06-08 11:28 [patch] Real-Time Preemption, -RT-2.6.12-rc6-V0.7.48-00 Ingo Molnar
2005-06-25 9:12 ` Ingo Molnar
2005-06-25 13:19 ` Gene Heskett
2005-06-25 14:39 ` Gene Heskett
2005-06-27 19:01 ` Real-Time Preemption, -RT-2.6.12-final-V0.7.50-24 Chuck Harding
2005-06-27 19:42 ` Chuck Harding
2005-06-27 21:08 ` Gene Heskett
2005-06-27 20:09 ` Daniel Walker
2005-06-27 20:28 ` Chuck Harding
2005-06-28 0:50 ` Daniel Walker
2005-06-28 7:53 ` Steven Rostedt
2005-06-28 8:18 ` Ingo Molnar
2005-06-28 8:34 ` Steven Rostedt
2005-06-28 9:12 ` Ingo Molnar
2005-06-28 15:26 ` Michal Schmidt
2005-06-28 15:31 ` Ingo Molnar
2005-06-28 18:50 ` Chuck Harding
2005-06-28 22:16 ` Chuck Harding
2005-06-29 0:32 ` Chuck Harding
2005-06-28 15:54 ` Daniel Walker
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