Re: [Regression, bisected] Transmit failure in et131x.

[Alan Cox <alan@lxorguk.ukuu.org.uk>]

Please test the following if you would.

If it doesn't work see if you can tell from the other end and tcpdump if the receiver or sender side dies, and let me know if you are using 10, 100 or Gbit and if you have the mtu set over 1500.


et131x: Correct WRAP bit handling

From: Alan Cox <alan@linux.intel.com>

add_10bit loses the existing wrap value

Signed-off-by: Alan Cox <alan@linux.intel.com>
---

 drivers/staging/et131x/et1310_rx.c |   20 ++++++++++++++------
 1 files changed, 14 insertions(+), 6 deletions(-)


diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 5356d0f..4c4555d 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -1074,12 +1074,20 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
 
 static inline u32 bump_fbr(u32 *fbr, u32 limit)
 {
-	u32 v = *fbr;
-	add_10bit(&v, 1);
-	if (v > limit)
-		v = (*fbr & ~ET_DMA10_MASK) ^ ET_DMA10_WRAP;
-	*fbr = v;
-	return v;
+        u32 v = *fbr;
+        v++;
+        /* This works for all cases where limit < 1024. The 1023 case
+           works because 1023++ is 1024 which means the if condition is not
+           taken but the carry of the bit into the wrap bit toggles the wrap
+           value correctly */
+        if ((v & ET_DMA10_MASK) > limit) {
+                v &= ~ET_DMA10_MASK;
+                v ^= ET_DMA10_WRAP;
+        }
+        /* For the 1023 case */
+        v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
+        *fbr = v;
+        return v;
 }
 
 /**