linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Paul Burton <paul.burton@imgtec.com>
To: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	<linux-kernel@vger.kernel.org>,
	James Hogan <james.hogan@imgtec.com>,
	Anna-Maria Gleixner <anna-maria@linutronix.de>
Subject: [PATCH 14/26] MIPS: CDMM: Allow CDMM base address to be specified via DT
Date: Fri, 26 Aug 2016 16:37:13 +0100	[thread overview]
Message-ID: <20160826153725.11629-15-paul.burton@imgtec.com> (raw)
In-Reply-To: <20160826153725.11629-1-paul.burton@imgtec.com>

Allow systems to specify the base address for the CDMM using device
tree. This removes the need for it to be specified by platform specific
code, preparing for generic kernels which can run without any.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 drivers/bus/mips_cdmm.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/bus/mips_cdmm.c b/drivers/bus/mips_cdmm.c
index cad49bc..311ce54 100644
--- a/drivers/bus/mips_cdmm.c
+++ b/drivers/bus/mips_cdmm.c
@@ -13,6 +13,8 @@
 #include <linux/cpu.h>
 #include <linux/cpumask.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/smp.h>
@@ -340,6 +342,17 @@ static phys_addr_t mips_cdmm_cur_base(void)
  */
 phys_addr_t __weak mips_cdmm_phys_base(void)
 {
+	struct device_node *cdmm_node;
+	struct resource res;
+	int err;
+
+	cdmm_node = of_find_compatible_node(of_root, NULL, "mti,mips-cdmm");
+	if (cdmm_node) {
+		err = of_address_to_resource(cdmm_node, 0, &res);
+		if (!err)
+			return res.start;
+	}
+
 	return 0;
 }
 
-- 
2.9.3

  parent reply	other threads:[~2016-08-26 15:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-26 15:36 [PATCH 00/26] MIPS generic kernels, SEAD-3 & Boston support Paul Burton
2016-08-26 15:37 ` [PATCH 01/26] MIPS: PCI: Support for CONFIG_PCI_DOMAINS_GENERIC Paul Burton
2016-08-26 15:37 ` [PATCH 02/26] MIPS: PCI: Make pcibios_set_cache_line_size an initcall Paul Burton
2016-08-26 15:37 ` [PATCH 03/26] MIPS: PCI: Inline pcibios_assign_all_busses Paul Burton
2016-08-26 15:37 ` [PATCH 04/26] MIPS: PCI: Split pci.c into pci.c & pci-legacy.c Paul Burton
2016-08-26 15:37 ` [PATCH 05/26] MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY Paul Burton
2016-08-26 15:37 ` [PATCH 06/26] MIPS: PCI: Support generic drivers Paul Burton
2016-08-26 15:37 ` [PATCH 07/26] MIPS: Sanitise coherentio semantics Paul Burton
2016-08-26 15:37 ` [PATCH 08/26] MIPS: dma-default: Don't check hw_coherentio if device is non-coherent Paul Burton
2016-08-26 15:37 ` [PATCH 09/26] MIPS: Support per-device DMA coherence Paul Burton
2016-08-26 15:37 ` [PATCH 10/26] MIPS: Print CM error reports upon bus errors Paul Burton
2016-08-26 15:37 ` [PATCH 11/26] dt-bindings: Document mti,mips-cpc binding Paul Burton
2016-09-02 12:34   ` Rob Herring
2016-09-02 13:59     ` Paul Burton
2016-08-26 15:37 ` [PATCH 12/26] MIPS: CPC: Provide a default mips_cpc_default_phys_base Paul Burton
2016-08-26 15:37 ` [PATCH 13/26] dt-bindings: Document mti,mips-cdmm binding Paul Burton
2016-09-02 12:38   ` Rob Herring
2016-08-26 15:37 ` Paul Burton [this message]
2016-08-26 15:37 ` [PATCH 15/26] irqchip: mips-cpu: Replace magic 0x100 with IE_SW0 Paul Burton
2016-08-26 15:37 ` [PATCH 16/26] irqchip: mips-cpu: Prepare for non-legacy IRQ domains Paul Burton
2016-08-26 15:37 ` [PATCH 17/26] irqchip: mips-cpu: Introduce IPI IRQ domain support Paul Burton
2016-08-26 15:37 ` [PATCH 18/26] MIPS: smp-mt: Use CPU interrupt controller " Paul Burton
2016-08-26 15:37 ` [PATCH 19/26] MIPS: Stengthen IPI IRQ domain sanity check Paul Burton
2016-08-26 15:37 ` [PATCH 20/26] MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0 Paul Burton
2016-08-26 15:37 ` [PATCH 21/26] MIPS: Support generating Flattened Image Trees (.itb) Paul Burton
2016-08-26 15:37 ` [PATCH 22/26] MIPS: generic: Introduce generic DT-based board support Paul Burton
2017-11-19  3:43   ` [22/26] " Guenter Roeck
2017-11-20 10:25     ` James Hogan
2017-11-20 14:03       ` Guenter Roeck
2017-11-21  0:02         ` [PATCH] MIPS: Fix CPS SMP NS16550 UART defaults James Hogan
2017-11-21  3:32           ` Guenter Roeck
2017-12-25 17:43           ` Guenter Roeck
2016-08-26 15:37 ` [PATCH 23/26] MIPS: generic: Convert SEAD-3 to a generic board Paul Burton
2016-08-26 15:37 ` [PATCH 24/26] dt-bindings: Document img,boston-clock binding Paul Burton
2016-08-26 17:44   ` Stephen Boyd
2016-08-30 15:53     ` Paul Burton
2016-09-02 12:54       ` Rob Herring
2016-09-02 13:33         ` Paul Burton
2016-08-26 15:37 ` [PATCH 25/26] clk: boston: Add a driver for MIPS Boston board clocks Paul Burton
2016-08-26 17:41   ` Stephen Boyd
2016-08-30 15:06     ` Paul Burton
2016-08-26 15:37 ` [PATCH 26/26] MIPS: generic: Support MIPS Boston development boards Paul Burton

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160826153725.11629-15-paul.burton@imgtec.com \
    --to=paul.burton@imgtec.com \
    --cc=anna-maria@linutronix.de \
    --cc=bhelgaas@google.com \
    --cc=james.hogan@imgtec.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).