From: Stephen Boyd <sboyd@codeaurora.org>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 25/26] clk: boston: Add a driver for MIPS Boston board clocks
Date: Fri, 26 Aug 2016 10:41:44 -0700 [thread overview]
Message-ID: <20160826174144.GW19826@codeaurora.org> (raw)
In-Reply-To: <20160826153725.11629-26-paul.burton@imgtec.com>
On 08/26, Paul Burton wrote:
>
> drivers/clk/Kconfig | 9 ++++
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-boston.c | 131 +++++++++++++++++++++++++++++++++++++++++++++++
Maybe a vendor subdirectory is appropriate? imgtec?
> +
> +struct clk_boston_state {
> + struct clk *clk[BOSTON_CLK_COUNT];
> + struct clk_boston clk_boston[BOSTON_CLK_COUNT];
> + struct clk_onecell_data onecell_data[BOSTON_CLK_COUNT];
> +};
> +
> +static const char *clk_names[BOSTON_CLK_COUNT] = {
const char * const?
> + [BOSTON_CLK_SYS] = "sys",
> + [BOSTON_CLK_CPU] = "cpu",
> +};
> +
> +#define BOSTON_PLAT_MMCMDIV 0x30
> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0)
> +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8)
> +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16)
> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24)
> +
> +static struct clk_boston *to_clk_boston(struct clk_hw *hw)
> +{
> + return container_of(hw, struct clk_boston, hw);
> +}
> +
> +static uint32_t ext_field(uint32_t val, uint32_t mask)
Please use u32 instead of uint32_t in drivers.
> +{
> + return (val & mask) >> (ffs(mask) - 1);
> +}
> +
> +static unsigned long clk_boston_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct clk_boston *state = to_clk_boston(hw);
> + uint32_t in_rate, mul, div;
> + uint mmcmdiv;
unsigned int?
> + int err;
> +
> + err = regmap_read(state->regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
> + if (err)
> + return 0;
> +
> + in_rate = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT);
This sounds like a parent rate? Should there be another clk
created for that so that parent_rate in this function is useful?
> + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
> +
> + switch (state->id) {
> + case BOSTON_CLK_SYS:
> + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
> + break;
> + case BOSTON_CLK_CPU:
> + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
Why not put the CLK0DIV or CLK1DIV offset in state->id instead?
That way this function just read in_rate, mul, and div and then
does the math?
> + break;
> + default:
> + return 0;
> + }
> +
> + return (in_rate * mul * 1000000) / div;
Is this always fixed at boot? It may be easier to populate fixed
rate clks during probe with the rate calculated there. Then there
aren't any clk_ops to implement.
> +}
> +
> +static const struct clk_ops clk_boston_ops = {
> + .recalc_rate = clk_boston_recalc_rate,
> +};
> +
> +static void __init clk_boston_setup(struct device_node *np)
> +{
> + struct clk_boston_state *state;
> + struct clk_init_data init;
> + struct regmap *regmap;
> + int i, err;
> +
> + state = kzalloc(sizeof(*state), GFP_KERNEL);
> + if (!state)
> + return;
> +
> + regmap = syscon_regmap_lookup_by_phandle(np, "regmap");
> + if (IS_ERR(regmap)) {
> + pr_err("failed to find regmap\n");
> + return;
> + }
> +
> + for (i = 0; i < BOSTON_CLK_COUNT; i++) {
> + memset(&init, 0, sizeof(init));
> + init.flags = CLK_IS_BASIC;
Please drop this flag unless you really need it for something. As
far as I know CLK_IS_BASIC is just for OMAP code.
> + init.name = clk_names[i];
> + init.ops = &clk_boston_ops;
> +
> + state->clk_boston[i].hw.init = &init;
> + state->clk_boston[i].id = i;
> + state->clk_boston[i].regmap = regmap;
> +
> + state->clk[i] = clk_register(NULL, &state->clk_boston[i].hw);
Please use clk_hw_register() instead.
> + if (IS_ERR(state->clk[i])) {
> + pr_err("failed to register clock: %ld\n",
> + PTR_ERR(state->clk[i]));
> + return;
> + }
> + }
> +
> + state->onecell_data->clks = state->clk;
> + state->onecell_data->clk_num = BOSTON_CLK_COUNT;
> +
> + err = of_clk_add_provider(np, of_clk_src_onecell_get,
> + state->onecell_data);
Please use of_clk_add_hw_provider() instead.
> + if (err)
> + pr_err("failed to add DT provider: %d\n", err);
> +}
> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
Please make this into a platform driver.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-08-26 17:42 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-26 15:36 [PATCH 00/26] MIPS generic kernels, SEAD-3 & Boston support Paul Burton
2016-08-26 15:37 ` [PATCH 01/26] MIPS: PCI: Support for CONFIG_PCI_DOMAINS_GENERIC Paul Burton
2016-08-26 15:37 ` [PATCH 02/26] MIPS: PCI: Make pcibios_set_cache_line_size an initcall Paul Burton
2016-08-26 15:37 ` [PATCH 03/26] MIPS: PCI: Inline pcibios_assign_all_busses Paul Burton
2016-08-26 15:37 ` [PATCH 04/26] MIPS: PCI: Split pci.c into pci.c & pci-legacy.c Paul Burton
2016-08-26 15:37 ` [PATCH 05/26] MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY Paul Burton
2016-08-26 15:37 ` [PATCH 06/26] MIPS: PCI: Support generic drivers Paul Burton
2016-08-26 15:37 ` [PATCH 07/26] MIPS: Sanitise coherentio semantics Paul Burton
2016-08-26 15:37 ` [PATCH 08/26] MIPS: dma-default: Don't check hw_coherentio if device is non-coherent Paul Burton
2016-08-26 15:37 ` [PATCH 09/26] MIPS: Support per-device DMA coherence Paul Burton
2016-08-26 15:37 ` [PATCH 10/26] MIPS: Print CM error reports upon bus errors Paul Burton
2016-08-26 15:37 ` [PATCH 11/26] dt-bindings: Document mti,mips-cpc binding Paul Burton
2016-09-02 12:34 ` Rob Herring
2016-09-02 13:59 ` Paul Burton
2016-08-26 15:37 ` [PATCH 12/26] MIPS: CPC: Provide a default mips_cpc_default_phys_base Paul Burton
2016-08-26 15:37 ` [PATCH 13/26] dt-bindings: Document mti,mips-cdmm binding Paul Burton
2016-09-02 12:38 ` Rob Herring
2016-08-26 15:37 ` [PATCH 14/26] MIPS: CDMM: Allow CDMM base address to be specified via DT Paul Burton
2016-08-26 15:37 ` [PATCH 15/26] irqchip: mips-cpu: Replace magic 0x100 with IE_SW0 Paul Burton
2016-08-26 15:37 ` [PATCH 16/26] irqchip: mips-cpu: Prepare for non-legacy IRQ domains Paul Burton
2016-08-26 15:37 ` [PATCH 17/26] irqchip: mips-cpu: Introduce IPI IRQ domain support Paul Burton
2016-08-26 15:37 ` [PATCH 18/26] MIPS: smp-mt: Use CPU interrupt controller " Paul Burton
2016-08-26 15:37 ` [PATCH 19/26] MIPS: Stengthen IPI IRQ domain sanity check Paul Burton
2016-08-26 15:37 ` [PATCH 20/26] MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0 Paul Burton
2016-08-26 15:37 ` [PATCH 21/26] MIPS: Support generating Flattened Image Trees (.itb) Paul Burton
2016-08-26 15:37 ` [PATCH 22/26] MIPS: generic: Introduce generic DT-based board support Paul Burton
2017-11-19 3:43 ` [22/26] " Guenter Roeck
2017-11-20 10:25 ` James Hogan
2017-11-20 14:03 ` Guenter Roeck
2017-11-21 0:02 ` [PATCH] MIPS: Fix CPS SMP NS16550 UART defaults James Hogan
2017-11-21 3:32 ` Guenter Roeck
2017-12-25 17:43 ` Guenter Roeck
2016-08-26 15:37 ` [PATCH 23/26] MIPS: generic: Convert SEAD-3 to a generic board Paul Burton
2016-08-26 15:37 ` [PATCH 24/26] dt-bindings: Document img,boston-clock binding Paul Burton
2016-08-26 17:44 ` Stephen Boyd
2016-08-30 15:53 ` Paul Burton
2016-09-02 12:54 ` Rob Herring
2016-09-02 13:33 ` Paul Burton
2016-08-26 15:37 ` [PATCH 25/26] clk: boston: Add a driver for MIPS Boston board clocks Paul Burton
2016-08-26 17:41 ` Stephen Boyd [this message]
2016-08-30 15:06 ` Paul Burton
2016-08-26 15:37 ` [PATCH 26/26] MIPS: generic: Support MIPS Boston development boards Paul Burton
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