From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Lee Jones <lee.jones@linaro.org>,
linux-kernel@vger.kernel.org,
Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v2 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate
Date: Tue, 15 Nov 2016 12:37:04 +0200 [thread overview]
Message-ID: <20161115103704.93476-1-andriy.shevchenko@linux.intel.com> (raw)
Enable MWI mechanism if PCI bus master supports it.
It might be potential benefit in some cases. Documentation [1] says that
standard Memory Write might supply more current data than in the CPU modified
cache line and "trashing a line in the cache may trash some data that is more
current that in the memory line". This allows to avoid potential retries and
other performance degradation issues on the bus.
[1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
In v2:
- extend commit message
drivers/mfd/intel-lpss-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index 50e78db..4756153 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -41,6 +41,7 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev,
/* Probably it is enough to set this for iDMA capable devices only */
pci_set_master(pdev);
+ pci_try_set_mwi(pdev);
ret = intel_lpss_probe(&pdev->dev, info);
if (ret)
--
2.9.3
next reply other threads:[~2016-11-15 10:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-15 10:37 Andy Shevchenko [this message]
2016-11-17 9:05 ` [PATCH v2 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate Mika Westerberg
2016-11-21 13:13 ` Lee Jones
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