From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Lee Jones <lee.jones@linaro.org>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate
Date: Thu, 17 Nov 2016 11:05:14 +0200 [thread overview]
Message-ID: <20161117090514.GM1446@lahna.fi.intel.com> (raw)
In-Reply-To: <20161115103704.93476-1-andriy.shevchenko@linux.intel.com>
On Tue, Nov 15, 2016 at 12:37:04PM +0200, Andy Shevchenko wrote:
> Enable MWI mechanism if PCI bus master supports it.
>
> It might be potential benefit in some cases. Documentation [1] says that
> standard Memory Write might supply more current data than in the CPU modified
> cache line and "trashing a line in the cache may trash some data that is more
> current that in the memory line". This allows to avoid potential retries and
> other performance degradation issues on the bus.
>
> [1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
next prev parent reply other threads:[~2016-11-17 9:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-15 10:37 [PATCH v2 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate Andy Shevchenko
2016-11-17 9:05 ` Mika Westerberg [this message]
2016-11-21 13:13 ` Lee Jones
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