Re: [PATCH v3 1/6] dt-bindings: add device tree binding for Allwinner V3s pinctrl

Re: [PATCH v3 1/6] dt-bindings: add device tree binding for Allwinner V3s pinctrl

[Maxime Ripard]

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On Fri, Jan 20, 2017 at 01:54:43AM +0800, Icenowy Zheng wrote:
> Allwinner V3s SoC has a pin controller like other Allwinner SoCs and got
> supported by the sunxi-pinctrl driver now.
> 
> Add a device tree binding for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v3 4/6] dt-bindings: add device binding for the CCU of Allwinner V3s

[Maxime Ripard]

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On Fri, Jan 20, 2017 at 01:54:46AM +0800, Icenowy Zheng wrote:
> Allwinner V3s is now driven by sunxi-ng CCU driver.
> 
> Add devicetree binding for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Applied. Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v3 3/6] clk: sunxi-ng: add support for V3s CCU

[Maxime Ripard]

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On Fri, Jan 20, 2017 at 01:54:45AM +0800, Icenowy Zheng wrote:
> V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
> about CSI, are different, which makes it to need a new CCU driver.
> 
> Add such a new driver for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---

Having a changelog somewhere would help. Why did you drop your cover
letter?

> +static const char * const mbus_parents[] = { "osc24M", "pll-periph0-2x", "pll-ddr" };

This is more that 80 characters and triggers a warning in
checkpatch...

Anyway, fixed and applied.
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v3 5/6] ARM: dts: sunxi: add dtsi file for V3s SoC

[Maxime Ripard]

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On Fri, Jan 20, 2017 at 01:54:47AM +0800, Icenowy Zheng wrote:
> As we have the pinctrl and clock support for the V3s SoC, it's now to
> run a mainline Linux on it.
> 
> So add a .dtsi file for it.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Next time, please provide a description of what that SoC in your
commit log.

> +		rtc: rtc@01c20400 {
> +			compatible = "allwinner,sun6i-a31-rtc";
> +			reg = <0x01c20400 0x54>;
> +			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> +		};

Did you have the chance to actually test how the RTC was behaving?

Other RTC have been pretty bad at keeping time, this is probably
something you want to check.

Applied, 
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v3 6/6] ARM: dts: sunxi: add support for Lichee Pi Zero board

[Maxime Ripard]

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On Fri, Jan 20, 2017 at 01:54:48AM +0800, Icenowy Zheng wrote:
> Lichee Pi Zero is a small-sized V3s board, which is
> breadboard-compatible, and with a MicroUSB port with both OTG function
> and power function.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Applied, thanks
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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