From: Borislav Petkov <bp@suse.de>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
Brian Gerst <brgerst@gmail.com>,
Chris Metcalf <cmetcalf@mellanox.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Liang Z Li <liang.z.li@intel.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
Jonathan Corbet <corbet@lwn.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
Alexandre Julliard <julliard@winehq.org>,
Stas Sergeev <stsp@list.ru>, Fenghua Yu <fenghua.yu@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kernel.org, x86@kernel.org,
linux-msdos@vger.kernel.org, wine-devel@winehq.org,
Adam Buchbinder <adam.buchbinder@gmail.com>,
Colin Ian King <colin.king@canonical.com>,
Lorenzo Stoakes <lstoakes@gmail.com>,
Qiaowei Ren <qiaowei.ren@intel.com>,
Nathan Howard <liverlint@gmail.com>,
Adan Hawthorn <adanhawthorn@gmail.com>,
Joe Perches <joe@perches.com>
Subject: Re: [PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b
Date: Wed, 24 May 2017 15:37:37 +0200 [thread overview]
Message-ID: <20170524133737.GC7275@nazgul.tnic> (raw)
In-Reply-To: <20170505181724.55000-5-ricardo.neri-calderon@linux.intel.com>
On Fri, May 05, 2017 at 11:17:02AM -0700, Ricardo Neri wrote:
> Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software
> Developer's Manual volume 2A states that when ModRM.mod !=11b and
> ModRM.rm = 100b indexed register-indirect addressing is used. In other
> words, a SIB byte follows the ModRM byte. In the specific case of
> SIB.index = 100b, the scale*index portion of the computation of the
> effective address is null. To signal callers of this particular situation,
> get_reg_offset() can return -EDOM (-EINVAL continues to indicate that an
> error when decoding the SIB byte).
>
> An example of this situation can be the following instruction:
>
> 8b 4c 23 80 mov -0x80(%rbx,%riz,1),%rcx
> ModRM: 0x4c [mod:1b][reg:1b][rm:100b]
> SIB: 0x23 [scale:0b][index:100b][base:11b]
> Displacement: 0x80 (1-byte, as per ModRM.mod = 1b)
>
> The %riz 'register' indicates a null index.
>
> In long mode, a REX prefix may be used. When a REX prefix is present,
> REX.X adds a fourth bit to the register selection of SIB.index. This gives
> the ability to refer to all the 16 general purpose registers. When REX.X is
> 1b and SIB.index is 100b, the index is indicated in %r12. In our example,
> this would look like:
>
> 42 8b 4c 23 80 mov -0x80(%rbx,%r12,1),%rcx
> REX: 0x42 [W:0b][R:0b][X:1b][B:0b]
> ModRM: 0x4c [mod:1b][reg:1b][rm:100b]
> SIB: 0x23 [scale:0b][.X: 1b, index:100b][.B:0b, base:11b]
> Displacement: 0x80 (1-byte, as per ModRM.mod = 1b)
>
> Cc: Borislav Petkov <bp@suse.de>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
> Cc: Colin Ian King <colin.king@canonical.com>
> Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> Cc: Qiaowei Ren <qiaowei.ren@intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Nathan Howard <liverlint@gmail.com>
> Cc: Adan Hawthorn <adanhawthorn@gmail.com>
> Cc: Joe Perches <joe@perches.com>
> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
> Cc: x86@kernel.org
> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> ---
> arch/x86/mm/mpx.c | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
> index ebdead8..7397b81 100644
> --- a/arch/x86/mm/mpx.c
> +++ b/arch/x86/mm/mpx.c
> @@ -110,6 +110,14 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
> regno = X86_SIB_INDEX(insn->sib.value);
> if (X86_REX_X(insn->rex_prefix.value))
> regno += 8;
<--- newline.
> + /*
> + * If ModRM.mod !=3 and SIB.index (regno=4) the scale*index
> + * portion of the address computation is null. This is
> + * true only if REX.X is 0. In such a case, the SIB index
> + * is used in the address computation.
> + */
> + if (X86_MODRM_MOD(insn->modrm.value) != 3 && regno == 4)
> + return -EDOM;
> break;
>
> case REG_TYPE_BASE:
> @@ -159,11 +167,19 @@ static void __user *mpx_get_addr_ref(struct insn *insn, struct pt_regs *regs)
> goto out_err;
>
> indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
> - if (indx_offset < 0)
<--- newline.
> + /*
> + * A negative offset generally means a error, except
an
> + * -EDOM, which means that the contents of the register
> + * should not be used as index.
> + */
> + if (indx_offset == -EDOM)
> + indx = 0;
> + else if (indx_offset < 0)
> goto out_err;
> + else
> + indx = regs_get_register(regs, indx_offset);
>
> base = regs_get_register(regs, base_offset);
> - indx = regs_get_register(regs, indx_offset);
> eff_addr = base + indx * (1 << X86_SIB_SCALE(sib));
> } else {
> addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM);
> --
> 2.9.3
>
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
next prev parent reply other threads:[~2017-05-24 13:37 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-05 18:16 [PATCH v7 00/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-05-05 18:16 ` [PATCH v7 01/26] ptrace,x86: Make user_64bit_mode() available to 32-bit builds Ricardo Neri
2017-05-21 14:19 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 02/26] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-05-21 14:23 ` Borislav Petkov
2017-05-27 3:40 ` Ricardo Neri
2017-05-27 10:13 ` Borislav Petkov
2017-06-01 3:09 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 03/26] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri
2017-05-24 13:37 ` Borislav Petkov [this message]
2017-05-27 3:36 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 05/26] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri
2017-05-29 13:07 ` Borislav Petkov
2017-06-06 6:08 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 06/26] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 07/26] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri
2017-05-29 16:37 ` Borislav Petkov
2017-06-06 6:06 ` Ricardo Neri
2017-06-06 11:58 ` Borislav Petkov
2017-06-07 0:28 ` Ricardo Neri
2017-06-07 12:21 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 08/26] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri
2017-05-29 17:16 ` Borislav Petkov
2017-06-06 6:02 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 09/26] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri
2017-05-29 21:48 ` Borislav Petkov
2017-06-06 6:01 ` Ricardo Neri
2017-06-06 12:04 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 10/26] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-05-30 10:35 ` Borislav Petkov
2017-06-15 18:37 ` Ricardo Neri
2017-06-15 19:04 ` Ricardo Neri
2017-06-19 15:29 ` Borislav Petkov
2017-06-19 15:37 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 11/26] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 12/26] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Ricardo Neri
2017-05-31 16:58 ` Borislav Petkov
2017-06-03 17:23 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment Ricardo Neri
2017-06-07 12:59 ` Borislav Petkov
2017-06-15 19:24 ` Ricardo Neri
2017-06-19 17:11 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5 Ricardo Neri
2017-06-07 13:15 ` Borislav Petkov
2017-06-15 19:36 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 15/26] x86/insn-eval: Incorporate segment base and limit in linear address computation Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 16/26] x86/insn-eval: Support both signed 32-bit and 64-bit effective addresses Ricardo Neri
2017-06-07 15:48 ` Borislav Petkov
2017-07-25 23:48 ` Ricardo Neri
2017-07-27 13:26 ` Borislav Petkov
2017-07-28 2:04 ` Ricardo Neri
2017-07-28 6:50 ` Borislav Petkov
2017-06-07 15:49 ` Borislav Petkov
2017-06-15 19:58 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 17/26] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 18/26] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-06-07 16:28 ` Borislav Petkov
2017-06-15 21:50 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 19/26] x86/insn-eval: Add wrapper function for 16-bit and 32-bit address encodings Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-05-06 9:04 ` Paolo Bonzini
2017-05-11 3:23 ` Ricardo Neri
2017-06-07 18:24 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 21/26] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-06-08 18:38 ` Borislav Petkov
2017-06-17 1:34 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 22/26] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-06-09 11:02 ` Borislav Petkov
2017-07-25 23:50 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 23/26] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-06-09 13:02 ` Borislav Petkov
2017-07-25 23:51 ` Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 24/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-06-09 16:10 ` Borislav Petkov
2017-07-26 0:44 ` Ricardo Neri
2017-07-27 13:57 ` Borislav Petkov
2017-05-05 18:17 ` [PATCH v7 25/26] selftests/x86: Add tests for " Ricardo Neri
2017-05-05 18:17 ` [PATCH v7 26/26] selftests/x86: Add tests for instruction str and sldt Ricardo Neri
2017-05-17 18:42 ` [PATCH v7 00/26] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-05-27 3:49 ` Neri, Ricardo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170524133737.GC7275@nazgul.tnic \
--to=bp@suse.de \
--cc=adam.buchbinder@gmail.com \
--cc=adanhawthorn@gmail.com \
--cc=akpm@linux-foundation.org \
--cc=brgerst@gmail.com \
--cc=cmetcalf@mellanox.com \
--cc=colin.king@canonical.com \
--cc=corbet@lwn.net \
--cc=dave.hansen@linux.intel.com \
--cc=fenghua.yu@intel.com \
--cc=hpa@zytor.com \
--cc=joe@perches.com \
--cc=jslaby@suse.cz \
--cc=julliard@winehq.org \
--cc=liang.z.li@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-msdos@vger.kernel.org \
--cc=liverlint@gmail.com \
--cc=lstoakes@gmail.com \
--cc=luto@kernel.org \
--cc=mhiramat@kernel.org \
--cc=mingo@redhat.com \
--cc=mst@redhat.com \
--cc=paul.gortmaker@windriver.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=qiaowei.ren@intel.com \
--cc=ravi.v.shankar@intel.com \
--cc=ray.huang@amd.com \
--cc=ricardo.neri-calderon@linux.intel.com \
--cc=shuah@kernel.org \
--cc=slaoub@gmail.com \
--cc=stsp@list.ru \
--cc=tglx@linutronix.de \
--cc=vbabka@suse.cz \
--cc=wine-devel@winehq.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).