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From: Christoph Hellwig <hch@infradead.org>
To: Will Deacon <will.deacon@arm.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	hch@infradead.org, peterz@infradead.org, mingo@redhat.com,
	sfr@canb.auug.org.au, nicolas.dichtel@6wind.com,
	tklauser@distanz.ch, james.hogan@imgtec.com,
	linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	mathieu.desnoyers@efficios.com
Subject: Re: [PATCH 8/9] RISC-V: User-facing API
Date: Tue, 11 Jul 2017 06:55:28 -0700	[thread overview]
Message-ID: <20170711135528.GA11417@infradead.org> (raw)
In-Reply-To: <20170711132215.GD13977@arm.com>

On Tue, Jul 11, 2017 at 02:22:15PM +0100, Will Deacon wrote:
> The problem is that by supporting these hypothetical designs that can't do
> atomics, you hurt sensible designs that *can* do the atomics because you
> force them to take an additional indirection that could otherwise be
> avoided.

Agreed.  But the new patchset seems to remove it already, so I guess
we're fine on the kernel side.  Now we just need to make sure the
glibc API doesn't use any indirections.

Note that it might make sense to emit these for very low end nommu
designs.  Maybe even running Linux, but in that case they'll just need
a special non-standard ABI for very limited use cases.

  reply	other threads:[~2017-07-11 13:55 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-04 19:50 RISC-V Linux Port v4 Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 1/9] RISC-V: Init and Halt Code Palmer Dabbelt
     [not found]   ` <alpine.DEB.2.20.1707042224560.2131@nanos>
2017-07-04 21:17     ` [patches] " Karsten Merker
2017-07-05  6:39       ` Thomas Gleixner
2017-07-04 21:54   ` [patches] " Jonathan Neuschäfer
2017-07-06 22:34     ` Palmer Dabbelt
2017-07-07 12:58       ` Jonathan Neuschäfer
2017-07-10 20:39         ` Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 2/9] RISC-V: Atomic and Locking Code Palmer Dabbelt
2017-07-05  8:43   ` Peter Zijlstra
2017-07-06 11:08     ` Boqun Feng
2017-07-06  7:26       ` Peter Zijlstra
2017-07-07  1:04     ` Palmer Dabbelt
2017-07-07  2:14       ` Boqun Feng
2017-07-10 20:39         ` Palmer Dabbelt
2017-07-07  8:08       ` Peter Zijlstra
2017-07-10 20:39         ` Palmer Dabbelt
2017-07-06 10:33   ` Boqun Feng
2017-07-07 13:16   ` [patches] " Jonathan Neuschäfer
2017-07-10 20:39     ` Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 3/9] RISC-V: Generic library routines and assembly Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 4/9] RISC-V: ELF and module implementation Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 5/9] RISC-V: Task implementation Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt
2017-07-04 19:51 ` [PATCH 7/9] RISC-V: Paging and MMU Palmer Dabbelt
2017-07-04 19:51 ` [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt
2017-07-05 10:24   ` James Hogan
2017-07-06  2:01   ` Christoph Hellwig
2017-07-06  8:55     ` Will Deacon
2017-07-06 15:34       ` Christoph Hellwig
2017-07-06 15:45         ` Will Deacon
     [not found]           ` <mhng-f92ef7c4-049a-4a71-be12-c600d1d7858b@palmer-si-x1c4>
2017-07-10 20:18             ` Palmer Dabbelt
2017-07-11 13:22             ` Will Deacon
2017-07-11 13:55               ` Christoph Hellwig [this message]
2017-07-11 17:28                 ` Palmer Dabbelt
2017-07-11 17:07               ` Palmer Dabbelt
2017-07-06 15:34   ` Dave P Martin
2017-07-04 19:51 ` [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt
  -- strict thread matches above, loose matches on Subject: below --
2017-06-06 22:59 RISC-V Linux Port v2 Palmer Dabbelt
2017-06-28 18:55 ` RISC-V Linux Port v3 Palmer Dabbelt
2017-06-28 18:55   ` [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt
2017-06-28 21:49     ` Thomas Gleixner
2017-06-28 21:52       ` Thomas Gleixner
2017-06-29 17:22       ` Palmer Dabbelt
2017-06-28 22:42     ` James Hogan
2017-06-29 21:42       ` Palmer Dabbelt
2017-07-03 23:06         ` James Hogan
2017-07-05 16:49           ` Palmer Dabbelt

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