From: Palmer Dabbelt <palmer@dabbelt.com>
To: will.deacon@arm.com
Cc: hch@infradead.org, peterz@infradead.org, mingo@redhat.com,
mcgrof@kernel.org, viro@zeniv.linux.org.uk, sfr@canb.auug.org.au,
nicolas.dichtel@6wind.com, rmk+kernel@armlinux.org.uk,
msalter@redhat.com, tklauser@distanz.ch, james.hogan@imgtec.com,
paul.gortmaker@windriver.com, linux@roeck-us.net,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
albert@sifive.com, patches@groups.riscv.org,
mathieu.desnoyers@efficios.com
Subject: Re: [PATCH 8/9] RISC-V: User-facing API
Date: Mon, 10 Jul 2017 13:18:23 -0700 (PDT) [thread overview]
Message-ID: <mhng-70bfae2b-3aa2-4d9b-b4a1-b6662fc86917@palmer-si-x1c4> (raw)
In-Reply-To: <mhng-f92ef7c4-049a-4a71-be12-c600d1d7858b@palmer-si-x1c4>
On Mon, 10 Jul 2017 13:00:29 PDT (-0700), Palmer Dabbelt wrote:
> On Thu, 06 Jul 2017 08:45:13 PDT (-0700), will.deacon@arm.com wrote:
>> On Thu, Jul 06, 2017 at 08:34:27AM -0700, Christoph Hellwig wrote:
>>> On Thu, Jul 06, 2017 at 09:55:03AM +0100, Will Deacon wrote:
>>> > Agreed on the indirection; it feels like this is something that should be in
>>> > the vDSO, which could use the cmpxchg instruction if it's available, or
>>> > otherwise just uses plain loads and stores.
>
> These are already in the vDSO, and use the corresponding atomic instructions on
> systems with the A extension. The vDSO routines call the system calls in non-A
> systems. As far as I can tell that's necessary to preserve atomicity, which we
> currently do by disabling scheduling. If there's a way to do this without
> entering the kernel then I'd be happy to support it, but I'm not sure how we
> could maintain atomicity using only regular loads and stores.
>
>>> Even that seems like a lot of indirection for something that is in
>>> the critical fast path for synchronization. I really can't understand
>>> how a new ISA / ABI could even come up with an idea as stupid as making
>>> essential synchronization primitives optional.
>>
>> No disagreement there!
>
> The default set of multilibs on Linux are:
>
> * rv32imac: 32-bit; Multiply, Atomic, and Compressed extensions
> * rv32imafdc: like above, but with single+double float
> * rv64imac: 64-bit, Multiply, Atomic and Compressed
> * rv64imafdc: like above, but with single+double float
>
> all of which support the A extension. We certainly don't plan on building any
> systems that support Linux without the A extension at SiFive, so I'm fine
> removing the system call -- this was originally added by a user, so there was
> at least enough interest for someone to add the system call.
>
> We've found people are retrofitting other cores to run RISC-V, and I could
> certainly imagine an older design that lacks a beefy enough memory system to
> support our atomics (which are LR/SC based) being a design that might arise.
> There's a lot of systems where people don't seem to care that much about the
> performance and just want something to work -- if they're on such a tiny system
> they can't implement the A extension then they're probably not going to be
> doing a lot of atomics anyway, so maybe it doesn't matter if atomics are slow.
> As the cost for supporting these A-less systems seems fairly small, it seemed
> like the right thing to do -- one of the points of making RISC-V have many
> optional extensions was to let people pick the ones they view as important.
> Since I don't know the performance constraints of their systems or the cost of
> implementing the A extension in their design, I'm not really qualified to tell
> them a cmpxchg syscall is a bad idea.
>
> I'm fine either way here: if someone's core can't support the A extension they
> can always just buy one that does (ideally from us :)). If it was up to be I'd
> leave the calls in there, as I generally don't like to tell users we won't
> support their use case, but since you guys seem to know a lot more about this
> than I do I'll just leave the decision up to you.
>
> If you want the system call (and the corresponding vDSO entry, which will be
> unnecessary if we mandate A) gone then I'll remove it for our v5. Just give me
> a heads up.
>
> Thanks, and sorry for wasting your time!
I mangled this message when sending it so I'm trying again.
next prev parent reply other threads:[~2017-07-10 20:18 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-04 19:50 RISC-V Linux Port v4 Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 1/9] RISC-V: Init and Halt Code Palmer Dabbelt
[not found] ` <alpine.DEB.2.20.1707042224560.2131@nanos>
2017-07-04 21:17 ` [patches] " Karsten Merker
2017-07-05 6:39 ` Thomas Gleixner
2017-07-04 21:54 ` [patches] " Jonathan Neuschäfer
2017-07-06 22:34 ` Palmer Dabbelt
2017-07-07 12:58 ` Jonathan Neuschäfer
2017-07-10 20:39 ` Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 2/9] RISC-V: Atomic and Locking Code Palmer Dabbelt
2017-07-05 8:43 ` Peter Zijlstra
2017-07-06 11:08 ` Boqun Feng
2017-07-06 7:26 ` Peter Zijlstra
2017-07-07 1:04 ` Palmer Dabbelt
2017-07-07 2:14 ` Boqun Feng
2017-07-10 20:39 ` Palmer Dabbelt
2017-07-07 8:08 ` Peter Zijlstra
2017-07-10 20:39 ` Palmer Dabbelt
2017-07-06 10:33 ` Boqun Feng
2017-07-07 13:16 ` [patches] " Jonathan Neuschäfer
2017-07-10 20:39 ` Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 3/9] RISC-V: Generic library routines and assembly Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 4/9] RISC-V: ELF and module implementation Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 5/9] RISC-V: Task implementation Palmer Dabbelt
2017-07-04 19:50 ` [PATCH 6/9] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt
2017-07-04 19:51 ` [PATCH 7/9] RISC-V: Paging and MMU Palmer Dabbelt
2017-07-04 19:51 ` [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt
2017-07-05 10:24 ` James Hogan
2017-07-06 2:01 ` Christoph Hellwig
2017-07-06 8:55 ` Will Deacon
2017-07-06 15:34 ` Christoph Hellwig
2017-07-06 15:45 ` Will Deacon
[not found] ` <mhng-f92ef7c4-049a-4a71-be12-c600d1d7858b@palmer-si-x1c4>
2017-07-10 20:18 ` Palmer Dabbelt [this message]
2017-07-11 13:22 ` Will Deacon
2017-07-11 13:55 ` Christoph Hellwig
2017-07-11 17:28 ` Palmer Dabbelt
2017-07-11 17:07 ` Palmer Dabbelt
2017-07-06 15:34 ` Dave P Martin
2017-07-04 19:51 ` [PATCH 9/9] RISC-V: Build Infastructure Palmer Dabbelt
-- strict thread matches above, loose matches on Subject: below --
2017-06-06 22:59 RISC-V Linux Port v2 Palmer Dabbelt
2017-06-28 18:55 ` RISC-V Linux Port v3 Palmer Dabbelt
2017-06-28 18:55 ` [PATCH 8/9] RISC-V: User-facing API Palmer Dabbelt
2017-06-28 21:49 ` Thomas Gleixner
2017-06-28 21:52 ` Thomas Gleixner
2017-06-29 17:22 ` Palmer Dabbelt
2017-06-28 22:42 ` James Hogan
2017-06-29 21:42 ` Palmer Dabbelt
2017-07-03 23:06 ` James Hogan
2017-07-05 16:49 ` Palmer Dabbelt
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