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From: Jeremy Linton <jeremy.linton@arm.com>
To: linux-acpi@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com,
	hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com,
	rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com,
	gregkh@linuxfoundation.org, viresh.kumar@linaro.org,
	mark.rutland@arm.com, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, jhugo@codeaurora.org,
	wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com,
	ahs3@redhat.com, Jayachandran.Nair@cavium.com,
	austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org,
	morten.rasmussen@arm.com, Jeremy Linton <jeremy.linton@arm.com>,
	Palmer Dabbelt <palmer@sifive.com>, Albert Ou <albert@sifive.com>
Subject: [PATCH v6 03/12] cacheinfo: rename of_node to fw_unique
Date: Fri, 12 Jan 2018 18:59:11 -0600	[thread overview]
Message-ID: <20180113005920.28658-4-jeremy.linton@arm.com> (raw)
In-Reply-To: <20180113005920.28658-1-jeremy.linton@arm.com>

Rename and change the type of of_node to indicate
it is a generic pointer which is generally only used
for comparison purposes. In a later patch we will apply
an ACPI/PPTT "token" pointer in fw_unique so that
the code which builds the shared cpu masks can be reused.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <albert@sifive.com>
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 arch/riscv/kernel/cacheinfo.c |  2 +-
 drivers/base/cacheinfo.c      | 16 +++++++++-------
 include/linux/cacheinfo.h     |  8 +++-----
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 6f4500233cf8..6b0219af88d4 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -20,7 +20,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
 			 struct device_node *node,
 			 enum cache_type type, unsigned int level)
 {
-	this_leaf->of_node = node;
+	this_leaf->fw_unique = node;
 	this_leaf->level = level;
 	this_leaf->type = type;
 	/* not a sector cache */
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index fc0d42bbd9eb..217aa90fb036 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -47,7 +47,7 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
 static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
 					   struct cacheinfo *sib_leaf)
 {
-	return sib_leaf->of_node == this_leaf->of_node;
+	return sib_leaf->fw_unique == this_leaf->fw_unique;
 }
 
 /* OF properties to query for a given cache type */
@@ -178,9 +178,10 @@ static int cache_setup_of_node(unsigned int cpu)
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
 	unsigned int index = 0;
 
-	/* skip if of_node is already populated */
-	if (this_cpu_ci->info_list->of_node)
+	/* skip if fw_unique is already populated */
+	if (this_cpu_ci->info_list->fw_unique) {
 		return 0;
+	}
 
 	if (!cpu_dev) {
 		pr_err("No cpu device for CPU %d\n", cpu);
@@ -201,7 +202,7 @@ static int cache_setup_of_node(unsigned int cpu)
 		if (!np)
 			break;
 		cache_of_set_props(this_leaf, np);
-		this_leaf->of_node = np;
+		this_leaf->fw_unique = np;
 		index++;
 	}
 
@@ -289,7 +290,7 @@ static void cache_shared_cpu_map_remove(unsigned int cpu)
 			cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
 			cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
 		}
-		of_node_put(this_leaf->of_node);
+		of_node_put(this_leaf->fw_unique);
 	}
 }
 
@@ -334,8 +335,9 @@ static int detect_cache_attributes(unsigned int cpu)
 	if (ret)
 		goto free_ci;
 	/*
-	 * For systems using DT for cache hierarchy, of_node and shared_cpu_map
-	 * will be set up here only if they are not populated already
+	 * For systems using DT for cache hierarchy, fw_unique
+	 * and shared_cpu_map will be set up here only if they are
+	 * not populated already
 	 */
 	ret = cache_shared_cpu_map_setup(cpu);
 	if (ret) {
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index d35299a590a4..6f2e6c87b64c 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -34,9 +34,8 @@ enum cache_type {
  * @shared_cpu_map: logical cpumask representing all the cpus sharing
  *	this cache node
  * @attributes: bitfield representing various cache attributes
- * @of_node: if devicetree is used, this represents either the cpu node in
- *	case there's no explicit cache node or the cache node itself in the
- *	device tree
+ * @fw_unique: Unique value used to determine if different cacheinfo
+ *	structures represent a single hardware cache instance.
  * @disable_sysfs: indicates whether this node is visible to the user via
  *	sysfs or not
  * @priv: pointer to any private data structure specific to particular
@@ -65,8 +64,7 @@ struct cacheinfo {
 #define CACHE_ALLOCATE_POLICY_MASK	\
 	(CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE)
 #define CACHE_ID		BIT(4)
-
-	struct device_node *of_node;
+	void *fw_unique;
 	bool disable_sysfs;
 	void *priv;
 };
-- 
2.13.5

  parent reply	other threads:[~2018-01-13  1:03 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-13  0:59 [PATCH v6 00/12] Support PPTT for ARM64 Jeremy Linton
2018-01-13  0:59 ` [PATCH v6 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-01-15 12:23   ` Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-01-15 12:33   ` Sudeep Holla
2018-01-15 16:07     ` Palmer Dabbelt
2018-01-16 21:26       ` Jeremy Linton
2018-01-17 18:08       ` Sudeep Holla
2018-01-18 17:36         ` Palmer Dabbelt
2018-01-16 21:07     ` Jeremy Linton
2018-01-17 18:20       ` Sudeep Holla
2018-01-17 18:51         ` Jeremy Linton
2018-01-18 10:14           ` Sudeep Holla
2018-01-19 23:27             ` Jeremy Linton
2018-01-13  0:59 ` Jeremy Linton [this message]
2018-01-15 12:36   ` [PATCH v6 03/12] cacheinfo: rename of_node to fw_unique Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-01-15 13:46   ` Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-01-15 14:58   ` Sudeep Holla
2018-01-16 20:55     ` Jeremy Linton
2018-01-17 17:58       ` Sudeep Holla
2018-01-15 15:48   ` Sudeep Holla
2018-01-16 20:22     ` Jeremy Linton
2018-01-17 18:00       ` Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-01-15 13:52   ` Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-01-15 15:06   ` Sudeep Holla
2018-01-22 15:50   ` Greg KH
2018-01-22 21:14     ` Jeremy Linton
2018-01-23  0:11       ` Rafael J. Wysocki
2018-01-13  0:59 ` [PATCH v6 08/12] arm64: " Jeremy Linton
2018-01-15 13:54   ` Sudeep Holla
2018-01-13  0:59 ` [PATCH v6 09/12] ACPI/PPTT: Add topology parsing code Jeremy Linton
2018-01-13  0:59 ` [PATCH v6 10/12] arm64: topology: rename cluster_id Jeremy Linton
2018-01-13  0:59 ` [PATCH v6 11/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-01-25 12:15   ` Xiongfeng Wang
2018-01-25 15:56     ` Jeremy Linton
2018-01-26  4:21       ` Xiongfeng Wang
2018-02-23 11:02       ` Lorenzo Pieralisi
2018-02-24  3:05         ` Xiongfeng Wang
2018-02-25  6:17           ` vkilari
2018-03-01 14:19           ` Morten Rasmussen
2018-02-24  4:37         ` Jeremy Linton
2018-03-01 11:51           ` Morten Rasmussen
2018-01-13  0:59 ` [PATCH v6 12/12] ACPI: Add PPTT to injectable table list Jeremy Linton

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