From: Sudeep Holla <sudeep.holla@arm.com>
To: Jeremy Linton <jeremy.linton@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com,
rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com,
gregkh@linuxfoundation.org, viresh.kumar@linaro.org,
mark.rutland@arm.com, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, jhugo@codeaurora.org,
wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com,
ahs3@redhat.com, Jayachandran.Nair@cavium.com,
austinwc@codeaurora.org, lenb@kernel.org, vkilari@codeaurora.org,
morten.rasmussen@arm.com, Palmer Dabbelt <palmer@sifive.com>,
Albert Ou <albert@sifive.com>
Subject: Re: [PATCH v6 02/12] drivers: base: cacheinfo: setup DT cache properties early
Date: Thu, 18 Jan 2018 10:14:06 +0000 [thread overview]
Message-ID: <05a8b375-70c4-34d4-6cde-8dd4cd62c10b@arm.com> (raw)
In-Reply-To: <15884ccc-2cfb-da91-5844-369d8237175d@arm.com>
On 17/01/18 18:51, Jeremy Linton wrote:
> Hi,
>
> On 01/17/2018 12:20 PM, Sudeep Holla wrote:
>>
>>
>> On 16/01/18 21:07, Jeremy Linton wrote:
>>> Hi,
>>>
>>> On 01/15/2018 06:33 AM, Sudeep Holla wrote:
>>>> On Fri, Jan 12, 2018 at 06:59:10PM -0600, Jeremy Linton wrote:
>>>>> The original intent in cacheinfo was that an architecture
>>>>> specific populate_cache_leaves() would probe the hardware
>>>>> and then cache_shared_cpu_map_setup() and
>>>>> cache_override_properties() would provide firmware help to
>>>>> extend/expand upon what was probed. Arm64 was really
>>>>> the only architecture that was working this way, and
>>>>> with the removal of most of the hardware probing logic it
>>>>> became clear that it was possible to simplify the logic a bit.
>>>>>
>>>>> This patch combines the walk of the DT nodes with the
>>>>> code updating the cache size/line_size and nr_sets.
>>>>> cache_override_properties() (which was DT specific) is
>>>>> then removed. The result is that cacheinfo.of_node is
>>>>> no longer used as a temporary place to hold DT references
>>>>> for future calls that update cache properties. That change
>>>>> helps to clarify its one remaining use (matching
>>>>> cacheinfo nodes that represent shared caches) which
>>>>> will be used by the ACPI/PPTT code in the following patches.
>>>>>
>>>>> Cc: Palmer Dabbelt <palmer@sifive.com>
>>>>> Cc: Albert Ou <albert@sifive.com>
>>>>> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
>>>>> ---
>>>>> arch/riscv/kernel/cacheinfo.c | 1 +
>>>>> drivers/base/cacheinfo.c | 65
>>>>> +++++++++++++++++++------------------------
>>>>> include/linux/cacheinfo.h | 1 +
>>>>> 3 files changed, 31 insertions(+), 36 deletions(-)
>>>>>
>>>>> diff --git a/arch/riscv/kernel/cacheinfo.c
>>>>> b/arch/riscv/kernel/cacheinfo.c
>>>>> index 10ed2749e246..6f4500233cf8 100644
>>>>> --- a/arch/riscv/kernel/cacheinfo.c
>>>>> +++ b/arch/riscv/kernel/cacheinfo.c
>>>>> @@ -30,6 +30,7 @@ static void ci_leaf_init(struct cacheinfo
>>>>> *this_leaf,
>>>>> CACHE_WRITE_BACK
>>>>> | CACHE_READ_ALLOCATE
>>>>> | CACHE_WRITE_ALLOCATE;
>>>>> + cache_of_set_props(this_leaf, node);
>>>>
>>>> This may be necessary but can it be done as later patch ? So far
>>>> nothing
>>>> is added that may break riscv IIUC.
>>>
>>> Well I think you have a bisection issue where the additional information
>>> will disappear between this patch and wherever we put this code back in.
>>>
>>
>> Hmm, I am sorry but I fail to see the issue. Before this change,
>> populate_cache_leaves just populated the info as per ci_leaf_init in
>> arch/riscv/kernel/cacheinfo.c and cache_override_properties used to fill
>> the remaining.
>>
>> After this patch, the same is achieved in cache_shared_cpu_map_setup.
>>
>> In both case, it was by the end of detect_cache_attributes, so I see no
>> issue.
>>
>
>
> Hi,
>
> I must be misunderstanding something.
>
Looks like I was missing to understand something :)
> AFAIK, The code in cache_setup_of_node() won't call cache_of_set_props()
> because it returns when there is an existing of_node (fw_unique) created
> by the riscv populate_cache_leaves(). That's why I'm making the direct
> call here. If we fail to get that change in place before
> cache_override_properties() is removed then the fields not set by the
> riscv code (size/etc) will be missing.
Indeed. I am trying to avoid use of cache_of_set_props outside.
How about skipping setting up of fw_unique in ci_leaf_init instead ?
--
Regards,
Sudeep
next prev parent reply other threads:[~2018-01-18 10:14 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-13 0:59 [PATCH v6 00/12] Support PPTT for ARM64 Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 01/12] drivers: base: cacheinfo: move cache_setup_of_node() Jeremy Linton
2018-01-15 12:23 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 02/12] drivers: base: cacheinfo: setup DT cache properties early Jeremy Linton
2018-01-15 12:33 ` Sudeep Holla
2018-01-15 16:07 ` Palmer Dabbelt
2018-01-16 21:26 ` Jeremy Linton
2018-01-17 18:08 ` Sudeep Holla
2018-01-18 17:36 ` Palmer Dabbelt
2018-01-16 21:07 ` Jeremy Linton
2018-01-17 18:20 ` Sudeep Holla
2018-01-17 18:51 ` Jeremy Linton
2018-01-18 10:14 ` Sudeep Holla [this message]
2018-01-19 23:27 ` Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 03/12] cacheinfo: rename of_node to fw_unique Jeremy Linton
2018-01-15 12:36 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 04/12] arm64/acpi: Create arch specific cpu to acpi id helper Jeremy Linton
2018-01-15 13:46 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 05/12] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2018-01-15 14:58 ` Sudeep Holla
2018-01-16 20:55 ` Jeremy Linton
2018-01-17 17:58 ` Sudeep Holla
2018-01-15 15:48 ` Sudeep Holla
2018-01-16 20:22 ` Jeremy Linton
2018-01-17 18:00 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 06/12] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2018-01-15 13:52 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 07/12] drivers: base cacheinfo: Add support for ACPI based firmware tables Jeremy Linton
2018-01-15 15:06 ` Sudeep Holla
2018-01-22 15:50 ` Greg KH
2018-01-22 21:14 ` Jeremy Linton
2018-01-23 0:11 ` Rafael J. Wysocki
2018-01-13 0:59 ` [PATCH v6 08/12] arm64: " Jeremy Linton
2018-01-15 13:54 ` Sudeep Holla
2018-01-13 0:59 ` [PATCH v6 09/12] ACPI/PPTT: Add topology parsing code Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 10/12] arm64: topology: rename cluster_id Jeremy Linton
2018-01-13 0:59 ` [PATCH v6 11/12] arm64: topology: enable ACPI/PPTT based CPU topology Jeremy Linton
2018-01-25 12:15 ` Xiongfeng Wang
2018-01-25 15:56 ` Jeremy Linton
2018-01-26 4:21 ` Xiongfeng Wang
2018-02-23 11:02 ` Lorenzo Pieralisi
2018-02-24 3:05 ` Xiongfeng Wang
2018-02-25 6:17 ` vkilari
2018-03-01 14:19 ` Morten Rasmussen
2018-02-24 4:37 ` Jeremy Linton
2018-03-01 11:51 ` Morten Rasmussen
2018-01-13 0:59 ` [PATCH v6 12/12] ACPI: Add PPTT to injectable table list Jeremy Linton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=05a8b375-70c4-34d4-6cde-8dd4cd62c10b@arm.com \
--to=sudeep.holla@arm.com \
--cc=Jayachandran.Nair@cavium.com \
--cc=Jonathan.Zhang@cavium.com \
--cc=ahs3@redhat.com \
--cc=albert@sifive.com \
--cc=austinwc@codeaurora.org \
--cc=catalin.marinas@arm.com \
--cc=gregkh@linuxfoundation.org \
--cc=hanjun.guo@linaro.org \
--cc=jeremy.linton@arm.com \
--cc=jhugo@codeaurora.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=morten.rasmussen@arm.com \
--cc=palmer@sifive.com \
--cc=rjw@rjwysocki.net \
--cc=viresh.kumar@linaro.org \
--cc=vkilari@codeaurora.org \
--cc=wangxiongfeng2@huawei.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).