From: Borislav Petkov <bp@alien8.de>
To: KarimAllah Ahmed <karahmed@amazon.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>,
arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de,
x86@kernel.org, linux-kernel@vger.kernel.org,
tim.c.chen@linux.intel.com, peterz@infradead.org,
pbonzini@redhat.com, ak@linux.intel.com,
torvalds@linux-foundation.org, gregkh@linux-foundation.org
Subject: Re: [PATCH v2 5/8] x86/speculation: Add basic support for IBPB
Date: Sun, 21 Jan 2018 20:01:45 +0100 [thread overview]
Message-ID: <20180121190145.uuk3xizxejckth5s@pd.tnic> (raw)
In-Reply-To: <31c52131-5f7a-8af0-3092-5fc9e322a734@amazon.com>
On Sun, Jan 21, 2018 at 07:29:43PM +0100, KarimAllah Ahmed wrote:
> Because static_cpu_has is an indirect branch which will cause speculation
> and
> we have to avoid that.
How so?
The JMP_NOSPEC macro protects against JMP <reg> jumps but the
static_cpu_has() macros all add JMPs with an immediate offset from the
next instruction and I wouldn't call them indirect JMPs as there are no
registers to speculate on there.
IOW, before alternatives, the patch site of static_cpu_has() looks like this:
# 151 "./arch/x86/include/asm/cpufeature.h" 1
1: jmp 6f
and that 6f label is:
6:
testb $1,boot_cpu_data+50(%rip) #, MEM[(const char *)&boot_cpu_data + 50B]
jnz .L707 #
jmp .L706 #
i.e., we basically do if (boot_cpu_has(..)).
If the feature is not present, same patch site turns into:
4: jmp .L706 #
5:
after patching. Which is a label after the whole thing. That is not an
indrect jump through a register either.
If the feature is present, the patch site becomes:
NOP - added by the patching
# ./arch/x86/include/asm/msr.h:105: asm volatile("1: wrmsr\n"
.loc 18 105 0
movl $73, %ecx #, tmp138
movl $1, %eax #, tmp139
xorl %edx, %edx # tmp140
#APP
# 105 "./arch/x86/include/asm/msr.h" 1
1: wrmsr
2:
so execution runs directly into the MSR write and the JMP is gone.
So I don't see indirect branches anywhere...
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2018-01-21 19:01 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-21 9:49 [PATCH v2 0/8] Speculation Control feature support, IBPB David Woodhouse
2018-01-21 9:49 ` [PATCH v2 1/8] x86/cpufeatures: Add Intel feature bits for Speculation Control David Woodhouse
2018-01-21 10:17 ` Ingo Molnar
2018-01-21 9:49 ` [PATCH v2 2/8] x86/cpufeatures: Add AMD feature bits for Prediction Command David Woodhouse
2018-01-21 17:50 ` Tom Lendacky
2018-01-21 18:01 ` Andrew Cooper
2018-01-22 14:31 ` Tom Lendacky
2018-01-22 14:33 ` Andrew Cooper
2018-01-21 9:49 ` [PATCH v2 3/8] x86/msr: Add definitions for new speculation control MSRs David Woodhouse
2018-01-21 13:06 ` Jiri Slaby
2018-01-21 13:27 ` David Woodhouse
2018-01-21 9:49 ` [PATCH v2 4/8] x86/pti: Do not enable PTI on fixed Intel processors David Woodhouse
2018-01-21 13:38 ` Borislav Petkov
2018-01-21 9:49 ` [PATCH v2 5/8] x86/speculation: Add basic support for IBPB David Woodhouse
2018-01-21 10:26 ` Ingo Molnar
2018-01-21 18:06 ` Borislav Petkov
2018-01-21 18:29 ` KarimAllah Ahmed
2018-01-21 19:01 ` Borislav Petkov [this message]
2018-01-21 19:31 ` David Woodhouse
2018-01-21 19:37 ` Andrew Cooper
2018-01-21 20:04 ` David Woodhouse
2018-01-21 20:19 ` Andrew Cooper
2018-01-21 21:25 ` David Woodhouse
2018-01-21 19:53 ` Borislav Petkov
2018-01-21 18:54 ` David Woodhouse
2018-01-21 19:04 ` Borislav Petkov
2018-01-21 19:31 ` David Woodhouse
2018-01-21 19:54 ` Borislav Petkov
2018-01-21 20:07 ` David Woodhouse
2018-01-21 20:17 ` Borislav Petkov
2018-01-21 9:49 ` [PATCH v2 6/8] x86/kvm: Add IBPB support David Woodhouse
2018-01-21 18:06 ` Tom Lendacky
2018-01-21 9:49 ` [PATCH v2 7/8] x86/speculation: Use Indirect Branch Prediction Barrier in context switch David Woodhouse
2018-01-21 9:49 ` [PATCH v2 8/8] x86/mm: Only flush indirect branches when switching into non dumpable process David Woodhouse
2018-01-21 10:33 ` Ingo Molnar
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