* [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 21:50 ` David Lechner
2019-02-06 8:32 ` Sekhar Nori
2019-01-31 13:38 ` [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER Bartosz Golaszewski
` (35 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This field is not used by any board. Remove it as part of the interrupt
support cleanup.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 5 -----
arch/arm/mach-davinci/include/mach/common.h | 1 -
2 files changed, 6 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 94085d21018e..67805ca74ff8 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -117,7 +117,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- u32 *host_map = davinci_soc_info.intc_host_map;
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i, irq_base;
@@ -182,10 +181,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
}
- if (host_map)
- for (i = 0; host_map[i] != -1; i++)
- cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
-
irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
if (irq_base < 0) {
pr_warn("Couldn't allocate IRQ numbers\n");
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b577e13a9c23..944afd57ee38 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -61,7 +61,6 @@ struct davinci_soc_info {
int intc_type;
u8 *intc_irq_prios;
unsigned long intc_irq_num;
- u32 *intc_host_map;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct
2019-01-31 13:38 ` [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct Bartosz Golaszewski
@ 2019-02-04 21:50 ` David Lechner
2019-02-06 8:32 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 21:50 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This field is not used by any board. Remove it as part of the interrupt
> support cleanup.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct
2019-01-31 13:38 ` [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct Bartosz Golaszewski
2019-02-04 21:50 ` David Lechner
@ 2019-02-06 8:32 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-06 8:32 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
Hi Bartosz,
On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This field is not used by any board. Remove it as part of the interrupt
> support cleanup.
Can you please make sure the patch description is independently readable
without the subject line being read first.
For this and some other patches in this series.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
2019-01-31 13:38 ` [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 22:02 ` David Lechner
2019-02-06 12:39 ` Sekhar Nori
2019-01-31 13:38 ` [PATCH 03/35] ARM: davinci: remove davinci_intc_type Bartosz Golaszewski
` (34 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In order to support SPARSE_IRQ we first need to make davinci use the
generic irq handler for ARM. Translate the legacy assembly to C and
put the irq handlers into their respective drivers (aintc and cp-intc).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-davinci/cp_intc.c | 13 +++++++
.../mach-davinci/include/mach/entry-macro.S | 39 -------------------
arch/arm/mach-davinci/irq.c | 21 ++++++++++
4 files changed, 35 insertions(+), 39 deletions(-)
delete mode 100644 arch/arm/mach-davinci/include/mach/entry-macro.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 664e918e2624..f7770fdcad68 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -589,6 +589,7 @@ config ARCH_DAVINCI
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_MULTI_HANDLER
select GPIOLIB
select HAVE_IDE
select PM_GENERIC_DOMAINS if PM
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 67805ca74ff8..b9aec3c48a6a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -19,6 +19,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
+#include <asm/exception.h>
#include <mach/common.h>
#include "cp_intc.h"
@@ -97,6 +98,16 @@ static struct irq_chip cp_intc_irq_chip = {
static struct irq_domain *cp_intc_domain;
+static asmlinkage void __exception_irq_entry
+cp_intc_handle_irq(struct pt_regs *regs)
+{
+ int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
+
+ irqnr &= 0xff;
+
+ handle_domain_irq(cp_intc_domain, irqnr, regs);
+}
+
static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -196,6 +207,8 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
return -EINVAL;
}
+ set_handle_irq(cp_intc_handle_irq);
+
/* Enable global interrupt */
cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
deleted file mode 100644
index cf5f573eb5fd..000000000000
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Low-level IRQ helper macros for TI DaVinci-based platforms
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <mach/irqs.h>
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =davinci_intc_base
- ldr \base, [\base]
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
- ldr \tmp, =davinci_intc_type
- ldr \tmp, [\tmp]
- cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
- beq 1001f
-#endif
-#if defined(CONFIG_AINTC)
- ldr \tmp, [\base, #0x14]
- movs \tmp, \tmp, lsr #2
- sub \irqnr, \tmp, #1
- b 1002f
-#endif
-#if defined(CONFIG_CP_INTC)
-1001: ldr \irqnr, [\base, #0x80] /* get irq number */
- mov \tmp, \irqnr, lsr #31
- and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
- and \tmp, \tmp, #0x1
- cmp \tmp, #0x1
-#endif
-1002:
- .endm
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 952dc126c390..3bbbef78d9ac 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -28,11 +28,13 @@
#include <mach/cputype.h>
#include <mach/common.h>
#include <asm/mach/irq.h>
+#include <asm/exception.h>
#define FIQ_REG0_OFFSET 0x0000
#define FIQ_REG1_OFFSET 0x0004
#define IRQ_REG0_OFFSET 0x0008
#define IRQ_REG1_OFFSET 0x000C
+#define IRQ_IRQENTRY_OFFSET 0x0014
#define IRQ_ENT_REG0_OFFSET 0x0018
#define IRQ_ENT_REG1_OFFSET 0x001C
#define IRQ_INCTL_REG_OFFSET 0x0020
@@ -45,6 +47,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
__raw_writel(value, davinci_intc_base + offset);
}
+static inline unsigned long davinci_irq_readl(int offset)
+{
+ return __raw_readl(davinci_intc_base + offset);
+}
+
static __init void
davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
{
@@ -69,6 +76,19 @@ davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
}
+static asmlinkage void __exception_irq_entry
+davinci_handle_irq(struct pt_regs *regs)
+{
+ int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
+ struct pt_regs *old_regs = set_irq_regs(regs);
+
+ irqnr >>= 2;
+ irqnr -= 1;
+
+ generic_handle_irq(irqnr);
+ set_irq_regs(old_regs);
+}
+
/* ARM Interrupt Controller Initialization */
void __init davinci_irq_init(void)
{
@@ -114,4 +134,5 @@ void __init davinci_irq_init(void)
davinci_alloc_gc(davinci_intc_base + j, i, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ set_handle_irq(davinci_handle_irq);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
2019-01-31 13:38 ` [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER Bartosz Golaszewski
@ 2019-02-04 22:02 ` David Lechner
2019-02-06 12:39 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:02 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> In order to support SPARSE_IRQ we first need to make davinci use the
> generic irq handler for ARM. Translate the legacy assembly to C and
> put the irq handlers into their respective drivers (aintc and cp-intc).
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
...
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
...
> @@ -97,6 +98,16 @@ static struct irq_chip cp_intc_irq_chip = {
>
> static struct irq_domain *cp_intc_domain;
>
> +static asmlinkage void __exception_irq_entry
> +cp_intc_handle_irq(struct pt_regs *regs)
> +{
> + int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
> +
> + irqnr &= 0xff;
What does applying the 0xff mask do? (perhaps needs a code
comment if it is important and not obvious).
> +
> + handle_domain_irq(cp_intc_domain, irqnr, regs);
> +}
> +
> static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> irq_hw_number_t hw)
> {
...
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
...
> @@ -69,6 +76,19 @@ davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
> IRQ_NOREQUEST | IRQ_NOPROBE, 0);
> }
>
> +static asmlinkage void __exception_irq_entry
> +davinci_handle_irq(struct pt_regs *regs)
> +{
> + int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
> + struct pt_regs *old_regs = set_irq_regs(regs);
> +
> + irqnr >>= 2;
> + irqnr -= 1;
Same here. It is not obvious to me what sort of conversion
is going on here.
> +
> + generic_handle_irq(irqnr);
> + set_irq_regs(old_regs);
> +}
> +
> /* ARM Interrupt Controller Initialization */
> void __init davinci_irq_init(void)
> {
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
2019-01-31 13:38 ` [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER Bartosz Golaszewski
2019-02-04 22:02 ` David Lechner
@ 2019-02-06 12:39 ` Sekhar Nori
2019-02-07 15:49 ` Bartosz Golaszewski
1 sibling, 1 reply; 97+ messages in thread
From: Sekhar Nori @ 2019-02-06 12:39 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 67805ca74ff8..b9aec3c48a6a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -19,6 +19,7 @@
> #include <linux/of_address.h>
> #include <linux/of_irq.h>
>
> +#include <asm/exception.h>
> #include <mach/common.h>
> #include "cp_intc.h"
>
> @@ -97,6 +98,16 @@ static struct irq_chip cp_intc_irq_chip = {
>
> static struct irq_domain *cp_intc_domain;
>
> +static asmlinkage void __exception_irq_entry
> +cp_intc_handle_irq(struct pt_regs *regs)
> +{
> + int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
> +
> + irqnr &= 0xff;
> +
> + handle_domain_irq(cp_intc_domain, irqnr, regs);
This leaves out spurious interrupt handling present in existing assembly
code. Can you add it back. May be use omap_intc_handle_irq() as an
example for handling spurious IRQs.
> +}
> +
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index 952dc126c390..3bbbef78d9ac 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -28,11 +28,13 @@
> #include <mach/cputype.h>
> #include <mach/common.h>
> #include <asm/mach/irq.h>
> +#include <asm/exception.h>
>
> #define FIQ_REG0_OFFSET 0x0000
> #define FIQ_REG1_OFFSET 0x0004
> #define IRQ_REG0_OFFSET 0x0008
> #define IRQ_REG1_OFFSET 0x000C
> +#define IRQ_IRQENTRY_OFFSET 0x0014
> #define IRQ_ENT_REG0_OFFSET 0x0018
> #define IRQ_ENT_REG1_OFFSET 0x001C
> #define IRQ_INCTL_REG_OFFSET 0x0020
> @@ -45,6 +47,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
> __raw_writel(value, davinci_intc_base + offset);
> }
>
> +static inline unsigned long davinci_irq_readl(int offset)
> +{
> + return __raw_readl(davinci_intc_base + offset);
> +}
Can we use readl_relaxed() here? I know there is existing __raw_writel()
usage. May be add a patch to fix the existing code first.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
2019-02-06 12:39 ` Sekhar Nori
@ 2019-02-07 15:49 ` Bartosz Golaszewski
2019-02-08 8:59 ` Sekhar Nori
0 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-07 15:49 UTC (permalink / raw)
To: Sekhar Nori
Cc: Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Linux ARM, Linux Kernel Mailing List, Bartosz Golaszewski
śr., 6 lut 2019 o 13:39 Sekhar Nori <nsekhar@ti.com> napisał(a):
>
> On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
>
> > diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> > index 67805ca74ff8..b9aec3c48a6a 100644
> > --- a/arch/arm/mach-davinci/cp_intc.c
> > +++ b/arch/arm/mach-davinci/cp_intc.c
> > @@ -19,6 +19,7 @@
> > #include <linux/of_address.h>
> > #include <linux/of_irq.h>
> >
> > +#include <asm/exception.h>
> > #include <mach/common.h>
> > #include "cp_intc.h"
> >
> > @@ -97,6 +98,16 @@ static struct irq_chip cp_intc_irq_chip = {
> >
> > static struct irq_domain *cp_intc_domain;
> >
> > +static asmlinkage void __exception_irq_entry
> > +cp_intc_handle_irq(struct pt_regs *regs)
> > +{
> > + int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
> > +
> > + irqnr &= 0xff;
> > +
> > + handle_domain_irq(cp_intc_domain, irqnr, regs);
>
> This leaves out spurious interrupt handling present in existing assembly
> code. Can you add it back. May be use omap_intc_handle_irq() as an
> example for handling spurious IRQs.
>
Hi Sekhar,
I started looking at this one and noticed that the manual says
PRI_INDX field in the GPIR register is in bits 0-9 (mask 0x3ff) while
the assembly logically ANDs it with 0xff. I guess it's because there
can be no more interrupts than 255 but I'd at least explain it in a
comment. Or should we use the proper mask? What do you think?
Bart
> > +}
> > +
>
> > diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> > index 952dc126c390..3bbbef78d9ac 100644
> > --- a/arch/arm/mach-davinci/irq.c
> > +++ b/arch/arm/mach-davinci/irq.c
> > @@ -28,11 +28,13 @@
> > #include <mach/cputype.h>
> > #include <mach/common.h>
> > #include <asm/mach/irq.h>
> > +#include <asm/exception.h>
> >
> > #define FIQ_REG0_OFFSET 0x0000
> > #define FIQ_REG1_OFFSET 0x0004
> > #define IRQ_REG0_OFFSET 0x0008
> > #define IRQ_REG1_OFFSET 0x000C
> > +#define IRQ_IRQENTRY_OFFSET 0x0014
> > #define IRQ_ENT_REG0_OFFSET 0x0018
> > #define IRQ_ENT_REG1_OFFSET 0x001C
> > #define IRQ_INCTL_REG_OFFSET 0x0020
> > @@ -45,6 +47,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
> > __raw_writel(value, davinci_intc_base + offset);
> > }
> >
> > +static inline unsigned long davinci_irq_readl(int offset)
> > +{
> > + return __raw_readl(davinci_intc_base + offset);
> > +}
>
> Can we use readl_relaxed() here? I know there is existing __raw_writel()
> usage. May be add a patch to fix the existing code first.
>
> Thanks,
> Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
2019-02-07 15:49 ` Bartosz Golaszewski
@ 2019-02-08 8:59 ` Sekhar Nori
0 siblings, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-08 8:59 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Linux ARM, Linux Kernel Mailing List, Bartosz Golaszewski
On 07/02/19 9:19 PM, Bartosz Golaszewski wrote:
>>> +static asmlinkage void __exception_irq_entry
>>> +cp_intc_handle_irq(struct pt_regs *regs)
>>> +{
>>> + int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
>>> +
>>> + irqnr &= 0xff;
>>> +
>>> + handle_domain_irq(cp_intc_domain, irqnr, regs);
>>
>> This leaves out spurious interrupt handling present in existing assembly
>> code. Can you add it back. May be use omap_intc_handle_irq() as an
>> example for handling spurious IRQs.
>>
>
> Hi Sekhar,
>
> I started looking at this one and noticed that the manual says
> PRI_INDX field in the GPIR register is in bits 0-9 (mask 0x3ff) while
> the assembly logically ANDs it with 0xff. I guess it's because there
> can be no more interrupts than 255 but I'd at least explain it in a
> comment. Or should we use the proper mask? What do you think?
I think using mask 0x3ff to match TRM is fine.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 03/35] ARM: davinci: remove davinci_intc_type
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
2019-01-31 13:38 ` [PATCH 01/35] ARM: davinci: remove intc_host_map from davinci_soc_info struct Bartosz Golaszewski
2019-01-31 13:38 ` [PATCH 02/35] ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 22:04 ` David Lechner
2019-01-31 13:38 ` [PATCH 04/35] ARM: davinci: pull davinci_intc_base into the respective intc drivers Bartosz Golaszewski
` (33 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We now use the generic ARM irq handler on davinci. There are no more
users that check davinci_intc_type. Remove the variable and all its
references.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/common.c | 1 -
arch/arm/mach-davinci/cp_intc.c | 1 -
arch/arm/mach-davinci/da830.c | 1 -
arch/arm/mach-davinci/da850.c | 1 -
arch/arm/mach-davinci/dm355.c | 1 -
arch/arm/mach-davinci/dm365.c | 1 -
arch/arm/mach-davinci/dm644x.c | 1 -
arch/arm/mach-davinci/dm646x.c | 1 -
arch/arm/mach-davinci/include/mach/common.h | 2 --
arch/arm/mach-davinci/include/mach/irqs.h | 3 ---
arch/arm/mach-davinci/irq.c | 1 -
11 files changed, 14 deletions(-)
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index e1d0f0d841ff..a87e158a709b 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -24,7 +24,6 @@ struct davinci_soc_info davinci_soc_info;
EXPORT_SYMBOL(davinci_soc_info);
void __iomem *davinci_intc_base;
-int davinci_intc_type;
void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
{
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index b9aec3c48a6a..fef39d5988d9 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -131,7 +131,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i, irq_base;
- davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
if (node) {
davinci_intc_base = of_iomap(node, 0);
if (of_property_read_u32(node, "ti,intc-size", &num_irq))
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 2cc9fe4c3a91..9e18b245266b 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -807,7 +807,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da830_default_priorities,
.intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e7b78df2bfef..e823b89e2b7a 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -739,7 +739,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da850_default_priorities,
.intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 4c6e0bef4509..03ce5df28d87 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -705,7 +705,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm355_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 01fb2b0c82de..3e034f0478d2 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -722,7 +722,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm365_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 38f92b7d413e..66bab4782c62 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -646,7 +646,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm644x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 7dc54b2a610f..45efa715a2c1 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -586,7 +586,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm646x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 944afd57ee38..34e48de92dcc 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -21,7 +21,6 @@ void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
extern void __iomem *davinci_intc_base;
-extern int davinci_intc_type;
struct davinci_timer_instance {
u32 base;
@@ -58,7 +57,6 @@ struct davinci_soc_info {
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
u32 intc_base;
- int intc_type;
u8 *intc_irq_prios;
unsigned long intc_irq_num;
struct davinci_timer_info *timer_info;
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index edb2ca62321a..03c446635301 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -30,9 +30,6 @@
/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000
-#define DAVINCI_INTC_TYPE_AINTC 0
-#define DAVINCI_INTC_TYPE_CP_INTC 1
-
/* Interrupt lines */
#define IRQ_VDINT0 0
#define IRQ_VDINT1 1
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 3bbbef78d9ac..3658235c8ee7 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -95,7 +95,6 @@ void __init davinci_irq_init(void)
unsigned i, j;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
- davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
if (WARN_ON(!davinci_intc_base))
return;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 03/35] ARM: davinci: remove davinci_intc_type
2019-01-31 13:38 ` [PATCH 03/35] ARM: davinci: remove davinci_intc_type Bartosz Golaszewski
@ 2019-02-04 22:04 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:04 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> We now use the generic ARM irq handler on davinci. There are no more
> users that check davinci_intc_type. Remove the variable and all its
> references.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 04/35] ARM: davinci: pull davinci_intc_base into the respective intc drivers
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (2 preceding siblings ...)
2019-01-31 13:38 ` [PATCH 03/35] ARM: davinci: remove davinci_intc_type Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 22:06 ` David Lechner
2019-01-31 13:38 ` [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites Bartosz Golaszewski
` (32 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This variable is defined globally in common.c. Define separate local
variables for the aintc and cp-intc drivers and remove the global one.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/common.c | 2 --
arch/arm/mach-davinci/cp_intc.c | 2 ++
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/irq.c | 2 ++
4 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index a87e158a709b..2850ae02aaa4 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -23,8 +23,6 @@
struct davinci_soc_info davinci_soc_info;
EXPORT_SYMBOL(davinci_soc_info);
-void __iomem *davinci_intc_base;
-
void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
{
char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index fef39d5988d9..384b72fbefca 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -23,6 +23,8 @@
#include <mach/common.h>
#include "cp_intc.h"
+static void __iomem *davinci_intc_base;
+
static inline unsigned int cp_intc_read(unsigned offset)
{
return __raw_readl(davinci_intc_base + offset);
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 34e48de92dcc..3d45b73b9a64 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -20,7 +20,6 @@
void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
-extern void __iomem *davinci_intc_base;
struct davinci_timer_instance {
u32 base;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 3658235c8ee7..e539bc65d4ef 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -42,6 +42,8 @@
#define IRQ_INTPRI0_REG_OFFSET 0x0030
#define IRQ_INTPRI7_REG_OFFSET 0x004C
+static void __iomem *davinci_intc_base;
+
static inline void davinci_irq_writel(unsigned long value, int offset)
{
__raw_writel(value, davinci_intc_base + offset);
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (3 preceding siblings ...)
2019-01-31 13:38 ` [PATCH 04/35] ARM: davinci: pull davinci_intc_base into the respective intc drivers Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 22:21 ` David Lechner
2019-02-05 0:20 ` David Lechner
2019-01-31 13:38 ` [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ Bartosz Golaszewski
` (31 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In order to select SPARSE_IRQ we need to make the interrupt numbers
dynamic (at least at build-time for the top-level controller). The
interrupt numbers are used as array indexes for irq priorities.
Drop the defines and just initialize the arrays in a linear manner.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da830.c | 107 ++++--------------------------
arch/arm/mach-davinci/da850.c | 118 +++++----------------------------
arch/arm/mach-davinci/dm355.c | 74 +++------------------
arch/arm/mach-davinci/dm365.c | 76 +++------------------
arch/arm/mach-davinci/dm644x.c | 76 +++------------------
arch/arm/mach-davinci/dm646x.c | 76 +++------------------
6 files changed, 69 insertions(+), 458 deletions(-)
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 9e18b245266b..f1e7b6c644e5 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -624,98 +624,19 @@ const short da830_eqep1_pins[] __initconst = {
};
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA830_MPUERR] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA830_EHRPWM2] = 7,
- [IRQ_DA830_EHRPWM2TZ] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA830_EQEP0] = 7,
- [IRQ_DA830_EQEP1] = 7,
- [IRQ_DA830_T12CMPINT0_0] = 7,
- [IRQ_DA830_T12CMPINT1_0] = 7,
- [IRQ_DA830_T12CMPINT2_0] = 7,
- [IRQ_DA830_T12CMPINT3_0] = 7,
- [IRQ_DA830_T12CMPINT4_0] = 7,
- [IRQ_DA830_T12CMPINT5_0] = 7,
- [IRQ_DA830_T12CMPINT6_0] = 7,
- [IRQ_DA830_T12CMPINT7_0] = 7,
- [IRQ_DA830_T12CMPINT0_1] = 7,
- [IRQ_DA830_T12CMPINT1_1] = 7,
- [IRQ_DA830_T12CMPINT2_1] = 7,
- [IRQ_DA830_T12CMPINT3_1] = 7,
- [IRQ_DA830_T12CMPINT4_1] = 7,
- [IRQ_DA830_T12CMPINT5_1] = 7,
- [IRQ_DA830_T12CMPINT6_1] = 7,
- [IRQ_DA830_T12CMPINT7_1] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
+static u8 da830_cp_intc_prios[] = {
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
};
static struct map_desc da830_io_desc[] = {
@@ -807,7 +728,7 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da830_default_priorities,
+ .intc_irq_prios = da830_cp_intc_prios,
.intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
.emac_pdata = &da8xx_emac_pdata,
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e823b89e2b7a..40b90730e847 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -299,108 +299,20 @@ const short da850_vpif_display_pins[] __initconst = {
};
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA850_MPUADDRERR0] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA850_SATAINT] = 7,
- [IRQ_DA850_TINTALL_2] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA850_MMCSDINT0_1] = 7,
- [IRQ_DA850_MMCSDINT1_1] = 7,
- [IRQ_DA850_T12CMPINT0_2] = 7,
- [IRQ_DA850_T12CMPINT1_2] = 7,
- [IRQ_DA850_T12CMPINT2_2] = 7,
- [IRQ_DA850_T12CMPINT3_2] = 7,
- [IRQ_DA850_T12CMPINT4_2] = 7,
- [IRQ_DA850_T12CMPINT5_2] = 7,
- [IRQ_DA850_T12CMPINT6_2] = 7,
- [IRQ_DA850_T12CMPINT7_2] = 7,
- [IRQ_DA850_T12CMPINT0_3] = 7,
- [IRQ_DA850_T12CMPINT1_3] = 7,
- [IRQ_DA850_T12CMPINT2_3] = 7,
- [IRQ_DA850_T12CMPINT3_3] = 7,
- [IRQ_DA850_T12CMPINT4_3] = 7,
- [IRQ_DA850_T12CMPINT5_3] = 7,
- [IRQ_DA850_T12CMPINT6_3] = 7,
- [IRQ_DA850_T12CMPINT7_3] = 7,
- [IRQ_DA850_RPIINT] = 7,
- [IRQ_DA850_VPIFINT] = 7,
- [IRQ_DA850_CCINT1] = 7,
- [IRQ_DA850_CCERRINT1] = 7,
- [IRQ_DA850_TCERRINT2] = 7,
- [IRQ_DA850_TINTALL_3] = 7,
- [IRQ_DA850_MCBSP0RINT] = 7,
- [IRQ_DA850_MCBSP0XINT] = 7,
- [IRQ_DA850_MCBSP1RINT] = 7,
- [IRQ_DA850_MCBSP1XINT] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
+static u8 da850_cp_intc_prios[] = {
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7,
};
static struct map_desc da850_io_desc[] = {
@@ -739,7 +651,7 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da850_default_priorities,
+ .intc_irq_prios = da850_cp_intc_prios,
.intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
.emac_pdata = &da8xx_emac_pdata,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 03ce5df28d87..a31f56c70d1d 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -154,69 +154,15 @@ MUX_CFG(DM355, VIN_CINH_EN, 0, 8, 3, 3, false)
#endif
};
-static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_DM355_CCDC_VDINT0] = 2,
- [IRQ_DM355_CCDC_VDINT1] = 6,
- [IRQ_DM355_CCDC_VDINT2] = 6,
- [IRQ_DM355_IPIPE_HST] = 6,
- [IRQ_DM355_H3AINT] = 6,
- [IRQ_DM355_IPIPE_SDR] = 6,
- [IRQ_DM355_IPIPEIFINT] = 6,
- [IRQ_DM355_OSDINT] = 7,
- [IRQ_DM355_VENCINT] = 6,
- [IRQ_ASQINT] = 6,
- [IRQ_IMXINT] = 6,
- [IRQ_USBINT] = 4,
- [IRQ_DM355_RTOINT] = 4,
- [IRQ_DM355_UARTINT2] = 7,
- [IRQ_DM355_TINT6] = 7,
- [IRQ_CCINT0] = 5, /* dma */
- [IRQ_CCERRINT] = 5, /* dma */
- [IRQ_TCERRINT0] = 5, /* dma */
- [IRQ_TCERRINT] = 5, /* dma */
- [IRQ_DM355_SPINT2_1] = 7,
- [IRQ_DM355_TINT7] = 4,
- [IRQ_DM355_SDIOINT0] = 7,
- [IRQ_MBXINT] = 7,
- [IRQ_MBRINT] = 7,
- [IRQ_MMCINT] = 7,
- [IRQ_DM355_MMCINT1] = 7,
- [IRQ_DM355_PWMINT3] = 7,
- [IRQ_DDRINT] = 7,
- [IRQ_AEMIFINT] = 7,
- [IRQ_DM355_SDIOINT1] = 4,
- [IRQ_TINT0_TINT12] = 2, /* clockevent */
- [IRQ_TINT0_TINT34] = 2, /* clocksource */
- [IRQ_TINT1_TINT12] = 7, /* DSP timer */
- [IRQ_TINT1_TINT34] = 7, /* system tick */
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 7,
- [IRQ_PWMINT2] = 7,
- [IRQ_I2C] = 3,
- [IRQ_UARTINT0] = 3,
- [IRQ_UARTINT1] = 3,
- [IRQ_DM355_SPINT0_0] = 3,
- [IRQ_DM355_SPINT0_1] = 3,
- [IRQ_DM355_GPIO0] = 3,
- [IRQ_DM355_GPIO1] = 7,
- [IRQ_DM355_GPIO2] = 4,
- [IRQ_DM355_GPIO3] = 4,
- [IRQ_DM355_GPIO4] = 7,
- [IRQ_DM355_GPIO5] = 7,
- [IRQ_DM355_GPIO6] = 7,
- [IRQ_DM355_GPIO7] = 7,
- [IRQ_DM355_GPIO8] = 7,
- [IRQ_DM355_GPIO9] = 7,
- [IRQ_DM355_GPIOBNK0] = 7,
- [IRQ_DM355_GPIOBNK1] = 7,
- [IRQ_DM355_GPIOBNK2] = 7,
- [IRQ_DM355_GPIOBNK3] = 7,
- [IRQ_DM355_GPIOBNK4] = 7,
- [IRQ_DM355_GPIOBNK5] = 7,
- [IRQ_DM355_GPIOBNK6] = 7,
- [IRQ_COMMTX] = 7,
- [IRQ_COMMRX] = 7,
- [IRQ_EMUINT] = 7,
+static u8 dm355_aintc_prios[] = {
+ 2, 6, 6, 6, 6, 6, 6, 7,
+ 6, 6, 6, 4, 4, 7, 7, 5,
+ 5, 5, 5, 7, 4, 7, 7, 7,
+ 7, 7, 7, 7, 7, 4, 2, 2,
+ 7, 7, 7, 7, 7, 3, 3, 3,
+ 3, 3, 3, 7, 4, 4, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 0, 0,
};
/*----------------------------------------------------------------------*/
@@ -705,7 +651,7 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm355_default_priorities,
+ .intc_irq_prios = dm355_aintc_prios,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
.sram_dma = 0x00010000,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 3e034f0478d2..42b2012d25cc 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -382,71 +382,15 @@ static struct platform_device dm365_mdio_device = {
.resource = dm365_mdio_resources,
};
-static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_VDINT0] = 2,
- [IRQ_VDINT1] = 6,
- [IRQ_VDINT2] = 6,
- [IRQ_HISTINT] = 6,
- [IRQ_H3AINT] = 6,
- [IRQ_PRVUINT] = 6,
- [IRQ_RSZINT] = 6,
- [IRQ_DM365_INSFINT] = 7,
- [IRQ_VENCINT] = 6,
- [IRQ_ASQINT] = 6,
- [IRQ_IMXINT] = 6,
- [IRQ_DM365_IMCOPINT] = 4,
- [IRQ_USBINT] = 4,
- [IRQ_DM365_RTOINT] = 7,
- [IRQ_DM365_TINT5] = 7,
- [IRQ_DM365_TINT6] = 5,
- [IRQ_CCINT0] = 5,
- [IRQ_CCERRINT] = 5,
- [IRQ_TCERRINT0] = 5,
- [IRQ_TCERRINT] = 7,
- [IRQ_PSCIN] = 4,
- [IRQ_DM365_SPINT2_1] = 7,
- [IRQ_DM365_TINT7] = 7,
- [IRQ_DM365_SDIOINT0] = 7,
- [IRQ_MBXINT] = 7,
- [IRQ_MBRINT] = 7,
- [IRQ_MMCINT] = 7,
- [IRQ_DM365_MMCINT1] = 7,
- [IRQ_DM365_PWMINT3] = 7,
- [IRQ_AEMIFINT] = 2,
- [IRQ_DM365_SDIOINT1] = 2,
- [IRQ_TINT0_TINT12] = 7,
- [IRQ_TINT0_TINT34] = 7,
- [IRQ_TINT1_TINT12] = 7,
- [IRQ_TINT1_TINT34] = 7,
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 3,
- [IRQ_PWMINT2] = 3,
- [IRQ_I2C] = 3,
- [IRQ_UARTINT0] = 3,
- [IRQ_UARTINT1] = 3,
- [IRQ_DM365_RTCINT] = 3,
- [IRQ_DM365_SPIINT0_0] = 3,
- [IRQ_DM365_SPIINT3_0] = 3,
- [IRQ_DM365_GPIO0] = 3,
- [IRQ_DM365_GPIO1] = 7,
- [IRQ_DM365_GPIO2] = 4,
- [IRQ_DM365_GPIO3] = 4,
- [IRQ_DM365_GPIO4] = 7,
- [IRQ_DM365_GPIO5] = 7,
- [IRQ_DM365_GPIO6] = 7,
- [IRQ_DM365_GPIO7] = 7,
- [IRQ_DM365_EMAC_RXTHRESH] = 7,
- [IRQ_DM365_EMAC_RXPULSE] = 7,
- [IRQ_DM365_EMAC_TXPULSE] = 7,
- [IRQ_DM365_EMAC_MISCPULSE] = 7,
- [IRQ_DM365_GPIO12] = 7,
- [IRQ_DM365_GPIO13] = 7,
- [IRQ_DM365_GPIO14] = 7,
- [IRQ_DM365_GPIO15] = 7,
- [IRQ_DM365_KEYINT] = 7,
- [IRQ_DM365_TCERRINT2] = 7,
- [IRQ_DM365_TCERRINT3] = 7,
- [IRQ_DM365_EMUINT] = 7,
+static u8 dm365_aintc_prios[] = {
+ 2, 6, 6, 6, 6, 6, 6, 7,
+ 6, 6, 6, 4, 4, 7, 7, 5,
+ 5, 5, 5, 7, 4, 7, 7, 7,
+ 7, 7, 7, 7, 7, 2, 2, 7,
+ 7, 7, 7, 7, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 7, 4, 4,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
};
/* Four Transfer Controllers on DM365 */
@@ -722,7 +666,7 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm365_default_priorities,
+ .intc_irq_prios = dm365_aintc_prios,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
.emac_pdata = &dm365_emac_pdata,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 66bab4782c62..bf7ebdcf6c18 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -147,71 +147,15 @@ MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false)
};
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_VDINT0] = 2,
- [IRQ_VDINT1] = 6,
- [IRQ_VDINT2] = 6,
- [IRQ_HISTINT] = 6,
- [IRQ_H3AINT] = 6,
- [IRQ_PRVUINT] = 6,
- [IRQ_RSZINT] = 6,
- [7] = 7,
- [IRQ_VENCINT] = 6,
- [IRQ_ASQINT] = 6,
- [IRQ_IMXINT] = 6,
- [IRQ_VLCDINT] = 6,
- [IRQ_USBINT] = 4,
- [IRQ_EMACINT] = 4,
- [14] = 7,
- [15] = 7,
- [IRQ_CCINT0] = 5, /* dma */
- [IRQ_CCERRINT] = 5, /* dma */
- [IRQ_TCERRINT0] = 5, /* dma */
- [IRQ_TCERRINT] = 5, /* dma */
- [IRQ_PSCIN] = 7,
- [21] = 7,
- [IRQ_IDE] = 4,
- [23] = 7,
- [IRQ_MBXINT] = 7,
- [IRQ_MBRINT] = 7,
- [IRQ_MMCINT] = 7,
- [IRQ_SDIOINT] = 7,
- [28] = 7,
- [IRQ_DDRINT] = 7,
- [IRQ_AEMIFINT] = 7,
- [IRQ_VLQINT] = 4,
- [IRQ_TINT0_TINT12] = 2, /* clockevent */
- [IRQ_TINT0_TINT34] = 2, /* clocksource */
- [IRQ_TINT1_TINT12] = 7, /* DSP timer */
- [IRQ_TINT1_TINT34] = 7, /* system tick */
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 7,
- [IRQ_PWMINT2] = 7,
- [IRQ_I2C] = 3,
- [IRQ_UARTINT0] = 3,
- [IRQ_UARTINT1] = 3,
- [IRQ_UARTINT2] = 3,
- [IRQ_SPINT0] = 3,
- [IRQ_SPINT1] = 3,
- [45] = 7,
- [IRQ_DSP2ARM0] = 4,
- [IRQ_DSP2ARM1] = 4,
- [IRQ_GPIO0] = 7,
- [IRQ_GPIO1] = 7,
- [IRQ_GPIO2] = 7,
- [IRQ_GPIO3] = 7,
- [IRQ_GPIO4] = 7,
- [IRQ_GPIO5] = 7,
- [IRQ_GPIO6] = 7,
- [IRQ_GPIO7] = 7,
- [IRQ_GPIOBNK0] = 7,
- [IRQ_GPIOBNK1] = 7,
- [IRQ_GPIOBNK2] = 7,
- [IRQ_GPIOBNK3] = 7,
- [IRQ_GPIOBNK4] = 7,
- [IRQ_COMMTX] = 7,
- [IRQ_COMMRX] = 7,
- [IRQ_EMUINT] = 7,
+static u8 dm644x_aintc_prios[] = {
+ 2, 6, 6, 6, 6, 6, 6, 7,
+ 6, 6, 6, 6, 4, 4, 7, 7,
+ 5, 5, 5, 5, 7, 7, 4, 7,
+ 7, 7, 7, 7, 7, 7, 7, 4,
+ 2, 2, 7, 7, 7, 7, 7, 3,
+ 3, 3, 3, 3, 3, 7, 4, 4,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
};
/*----------------------------------------------------------------------*/
@@ -646,7 +590,7 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm644x_default_priorities,
+ .intc_irq_prios = dm644x_aintc_prios,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
.emac_pdata = &dm644x_emac_pdata,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 45efa715a2c1..64b4ae5a4202 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -146,71 +146,15 @@ MUX_CFG(DM646X, PTSIMUX_SERIAL, 0, 16, 3, 3, true)
#endif
};
-static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
- [IRQ_DM646X_VP_VERTINT0] = 7,
- [IRQ_DM646X_VP_VERTINT1] = 7,
- [IRQ_DM646X_VP_VERTINT2] = 7,
- [IRQ_DM646X_VP_VERTINT3] = 7,
- [IRQ_DM646X_VP_ERRINT] = 7,
- [IRQ_DM646X_RESERVED_1] = 7,
- [IRQ_DM646X_RESERVED_2] = 7,
- [IRQ_DM646X_WDINT] = 7,
- [IRQ_DM646X_CRGENINT0] = 7,
- [IRQ_DM646X_CRGENINT1] = 7,
- [IRQ_DM646X_TSIFINT0] = 7,
- [IRQ_DM646X_TSIFINT1] = 7,
- [IRQ_DM646X_VDCEINT] = 7,
- [IRQ_DM646X_USBINT] = 7,
- [IRQ_DM646X_USBDMAINT] = 7,
- [IRQ_DM646X_PCIINT] = 7,
- [IRQ_CCINT0] = 7, /* dma */
- [IRQ_CCERRINT] = 7, /* dma */
- [IRQ_TCERRINT0] = 7, /* dma */
- [IRQ_TCERRINT] = 7, /* dma */
- [IRQ_DM646X_TCERRINT2] = 7,
- [IRQ_DM646X_TCERRINT3] = 7,
- [IRQ_DM646X_IDE] = 7,
- [IRQ_DM646X_HPIINT] = 7,
- [IRQ_DM646X_EMACRXTHINT] = 7,
- [IRQ_DM646X_EMACRXINT] = 7,
- [IRQ_DM646X_EMACTXINT] = 7,
- [IRQ_DM646X_EMACMISCINT] = 7,
- [IRQ_DM646X_MCASP0TXINT] = 7,
- [IRQ_DM646X_MCASP0RXINT] = 7,
- [IRQ_DM646X_RESERVED_3] = 7,
- [IRQ_DM646X_MCASP1TXINT] = 7,
- [IRQ_TINT0_TINT12] = 7, /* clockevent */
- [IRQ_TINT0_TINT34] = 7, /* clocksource */
- [IRQ_TINT1_TINT12] = 7, /* DSP timer */
- [IRQ_TINT1_TINT34] = 7, /* system tick */
- [IRQ_PWMINT0] = 7,
- [IRQ_PWMINT1] = 7,
- [IRQ_DM646X_VLQINT] = 7,
- [IRQ_I2C] = 7,
- [IRQ_UARTINT0] = 7,
- [IRQ_UARTINT1] = 7,
- [IRQ_DM646X_UARTINT2] = 7,
- [IRQ_DM646X_SPINT0] = 7,
- [IRQ_DM646X_SPINT1] = 7,
- [IRQ_DM646X_DSP2ARMINT] = 7,
- [IRQ_DM646X_RESERVED_4] = 7,
- [IRQ_DM646X_PSCINT] = 7,
- [IRQ_DM646X_GPIO0] = 7,
- [IRQ_DM646X_GPIO1] = 7,
- [IRQ_DM646X_GPIO2] = 7,
- [IRQ_DM646X_GPIO3] = 7,
- [IRQ_DM646X_GPIO4] = 7,
- [IRQ_DM646X_GPIO5] = 7,
- [IRQ_DM646X_GPIO6] = 7,
- [IRQ_DM646X_GPIO7] = 7,
- [IRQ_DM646X_GPIOBNK0] = 7,
- [IRQ_DM646X_GPIOBNK1] = 7,
- [IRQ_DM646X_GPIOBNK2] = 7,
- [IRQ_DM646X_DDRINT] = 7,
- [IRQ_DM646X_AEMIFINT] = 7,
- [IRQ_COMMTX] = 7,
- [IRQ_COMMRX] = 7,
- [IRQ_EMUINT] = 7,
+static u8 dm646x_aintc_prios[] = {
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7,
};
/*----------------------------------------------------------------------*/
@@ -586,7 +530,7 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm646x_default_priorities,
+ .intc_irq_prios = dm646x_aintc_prios,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
.emac_pdata = &dm646x_emac_pdata,
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-01-31 13:38 ` [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites Bartosz Golaszewski
@ 2019-02-04 22:21 ` David Lechner
2019-02-06 13:03 ` Sekhar Nori
2019-02-05 0:20 ` David Lechner
1 sibling, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:21 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> In order to select SPARSE_IRQ we need to make the interrupt numbers
> dynamic (at least at build-time for the top-level controller). The
> interrupt numbers are used as array indexes for irq priorities.
>
> Drop the defines and just initialize the arrays in a linear manner.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
...
> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
> - [IRQ_DM355_CCDC_VDINT0] = 2,
> - [IRQ_DM355_CCDC_VDINT1] = 6,
> - [IRQ_DM355_CCDC_VDINT2] = 6,
> - [IRQ_DM355_IPIPE_HST] = 6,
> - [IRQ_DM355_H3AINT] = 6,
> - [IRQ_DM355_IPIPE_SDR] = 6,
> - [IRQ_DM355_IPIPEIFINT] = 6,
> - [IRQ_DM355_OSDINT] = 7,
> - [IRQ_DM355_VENCINT] = 6,
> - [IRQ_ASQINT] = 6,
> - [IRQ_IMXINT] = 6,
> - [IRQ_USBINT] = 4,
> - [IRQ_DM355_RTOINT] = 4,
> - [IRQ_DM355_UARTINT2] = 7,
> - [IRQ_DM355_TINT6] = 7,
> - [IRQ_CCINT0] = 5, /* dma */
> - [IRQ_CCERRINT] = 5, /* dma */
> - [IRQ_TCERRINT0] = 5, /* dma */
> - [IRQ_TCERRINT] = 5, /* dma */
> - [IRQ_DM355_SPINT2_1] = 7,
> - [IRQ_DM355_TINT7] = 4,
> - [IRQ_DM355_SDIOINT0] = 7,
> - [IRQ_MBXINT] = 7,
> - [IRQ_MBRINT] = 7,
> - [IRQ_MMCINT] = 7,
> - [IRQ_DM355_MMCINT1] = 7,
> - [IRQ_DM355_PWMINT3] = 7,
> - [IRQ_DDRINT] = 7,
> - [IRQ_AEMIFINT] = 7,
> - [IRQ_DM355_SDIOINT1] = 4,
> - [IRQ_TINT0_TINT12] = 2, /* clockevent */
> - [IRQ_TINT0_TINT34] = 2, /* clocksource */
> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */
> - [IRQ_TINT1_TINT34] = 7, /* system tick */
> - [IRQ_PWMINT0] = 7,
> - [IRQ_PWMINT1] = 7,
> - [IRQ_PWMINT2] = 7,
> - [IRQ_I2C] = 3,
> - [IRQ_UARTINT0] = 3,
> - [IRQ_UARTINT1] = 3,
> - [IRQ_DM355_SPINT0_0] = 3,
> - [IRQ_DM355_SPINT0_1] = 3,
> - [IRQ_DM355_GPIO0] = 3,
> - [IRQ_DM355_GPIO1] = 7,
> - [IRQ_DM355_GPIO2] = 4,
> - [IRQ_DM355_GPIO3] = 4,
> - [IRQ_DM355_GPIO4] = 7,
> - [IRQ_DM355_GPIO5] = 7,
> - [IRQ_DM355_GPIO6] = 7,
> - [IRQ_DM355_GPIO7] = 7,
> - [IRQ_DM355_GPIO8] = 7,
> - [IRQ_DM355_GPIO9] = 7,
> - [IRQ_DM355_GPIOBNK0] = 7,
> - [IRQ_DM355_GPIOBNK1] = 7,
> - [IRQ_DM355_GPIOBNK2] = 7,
> - [IRQ_DM355_GPIOBNK3] = 7,
> - [IRQ_DM355_GPIOBNK4] = 7,
> - [IRQ_DM355_GPIOBNK5] = 7,
> - [IRQ_DM355_GPIOBNK6] = 7,
> - [IRQ_COMMTX] = 7,
> - [IRQ_COMMRX] = 7,
> - [IRQ_EMUINT] = 7,
> +static u8 dm355_aintc_prios[] = {
> + 2, 6, 6, 6, 6, 6, 6, 7,
> + 6, 6, 6, 4, 4, 7, 7, 5,
> + 5, 5, 5, 7, 4, 7, 7, 7,
> + 7, 7, 7, 7, 7, 4, 2, 2,
> + 7, 7, 7, 7, 7, 3, 3, 3,
> + 3, 3, 3, 7, 4, 4, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 0, 0,
> };
Hmm... this makes it harder to see what is going on here.
You can no longer see which priority corresponds to which
IRQ without consulting a manual.
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-02-04 22:21 ` David Lechner
@ 2019-02-06 13:03 ` Sekhar Nori
2019-02-06 13:32 ` Bartosz Golaszewski
0 siblings, 1 reply; 97+ messages in thread
From: Sekhar Nori @ 2019-02-06 13:03 UTC (permalink / raw)
To: David Lechner, Bartosz Golaszewski, Kevin Hilman,
Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 05/02/19 3:51 AM, David Lechner wrote:
> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>>
>> In order to select SPARSE_IRQ we need to make the interrupt numbers
>> dynamic (at least at build-time for the top-level controller). The
>> interrupt numbers are used as array indexes for irq priorities.
>>
>> Drop the defines and just initialize the arrays in a linear manner.
>>
>> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>> ---
>
> ...
>
>> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
>> - [IRQ_DM355_CCDC_VDINT0] = 2,
>> - [IRQ_DM355_CCDC_VDINT1] = 6,
>> - [IRQ_DM355_CCDC_VDINT2] = 6,
>> - [IRQ_DM355_IPIPE_HST] = 6,
>> - [IRQ_DM355_H3AINT] = 6,
>> - [IRQ_DM355_IPIPE_SDR] = 6,
>> - [IRQ_DM355_IPIPEIFINT] = 6,
>> - [IRQ_DM355_OSDINT] = 7,
>> - [IRQ_DM355_VENCINT] = 6,
>> - [IRQ_ASQINT] = 6,
>> - [IRQ_IMXINT] = 6,
>> - [IRQ_USBINT] = 4,
>> - [IRQ_DM355_RTOINT] = 4,
>> - [IRQ_DM355_UARTINT2] = 7,
>> - [IRQ_DM355_TINT6] = 7,
>> - [IRQ_CCINT0] = 5, /* dma */
>> - [IRQ_CCERRINT] = 5, /* dma */
>> - [IRQ_TCERRINT0] = 5, /* dma */
>> - [IRQ_TCERRINT] = 5, /* dma */
>> - [IRQ_DM355_SPINT2_1] = 7,
>> - [IRQ_DM355_TINT7] = 4,
>> - [IRQ_DM355_SDIOINT0] = 7,
>> - [IRQ_MBXINT] = 7,
>> - [IRQ_MBRINT] = 7,
>> - [IRQ_MMCINT] = 7,
>> - [IRQ_DM355_MMCINT1] = 7,
>> - [IRQ_DM355_PWMINT3] = 7,
>> - [IRQ_DDRINT] = 7,
>> - [IRQ_AEMIFINT] = 7,
>> - [IRQ_DM355_SDIOINT1] = 4,
>> - [IRQ_TINT0_TINT12] = 2, /* clockevent */
>> - [IRQ_TINT0_TINT34] = 2, /* clocksource */
>> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */
>> - [IRQ_TINT1_TINT34] = 7, /* system tick */
>> - [IRQ_PWMINT0] = 7,
>> - [IRQ_PWMINT1] = 7,
>> - [IRQ_PWMINT2] = 7,
>> - [IRQ_I2C] = 3,
>> - [IRQ_UARTINT0] = 3,
>> - [IRQ_UARTINT1] = 3,
>> - [IRQ_DM355_SPINT0_0] = 3,
>> - [IRQ_DM355_SPINT0_1] = 3,
>> - [IRQ_DM355_GPIO0] = 3,
>> - [IRQ_DM355_GPIO1] = 7,
>> - [IRQ_DM355_GPIO2] = 4,
>> - [IRQ_DM355_GPIO3] = 4,
>> - [IRQ_DM355_GPIO4] = 7,
>> - [IRQ_DM355_GPIO5] = 7,
>> - [IRQ_DM355_GPIO6] = 7,
>> - [IRQ_DM355_GPIO7] = 7,
>> - [IRQ_DM355_GPIO8] = 7,
>> - [IRQ_DM355_GPIO9] = 7,
>> - [IRQ_DM355_GPIOBNK0] = 7,
>> - [IRQ_DM355_GPIOBNK1] = 7,
>> - [IRQ_DM355_GPIOBNK2] = 7,
>> - [IRQ_DM355_GPIOBNK3] = 7,
>> - [IRQ_DM355_GPIOBNK4] = 7,
>> - [IRQ_DM355_GPIOBNK5] = 7,
>> - [IRQ_DM355_GPIOBNK6] = 7,
>> - [IRQ_COMMTX] = 7,
>> - [IRQ_COMMRX] = 7,
>> - [IRQ_EMUINT] = 7,
>> +static u8 dm355_aintc_prios[] = {
>> + 2, 6, 6, 6, 6, 6, 6, 7,
>> + 6, 6, 6, 4, 4, 7, 7, 5,
>> + 5, 5, 5, 7, 4, 7, 7, 7,
>> + 7, 7, 7, 7, 7, 4, 2, 2,
>> + 7, 7, 7, 7, 7, 3, 3, 3,
>> + 3, 3, 3, 7, 4, 4, 7, 7,
>> + 7, 7, 7, 7, 7, 7, 7, 7,
>> + 7, 7, 7, 7, 7, 7, 0, 0,
>> };
>
> Hmm... this makes it harder to see what is going on here.
> You can no longer see which priority corresponds to which
> IRQ without consulting a manual.
I agree with David here. The interrupt numbers are dynamic, but the
interrupt number offset from hardware point-of-view is fixed. So can
these macros be re-purposed to represent the hardware offset (eventually
you would pass them to DAVINCI_INTC_IRQ())?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-02-06 13:03 ` Sekhar Nori
@ 2019-02-06 13:32 ` Bartosz Golaszewski
2019-02-06 14:50 ` Sekhar Nori
0 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-06 13:32 UTC (permalink / raw)
To: Sekhar Nori
Cc: David Lechner, Bartosz Golaszewski, Kevin Hilman,
Thomas Gleixner, Jason Cooper, Marc Zyngier, LKML, arm-soc
śr., 6 lut 2019 o 14:03 Sekhar Nori <nsekhar@ti.com> napisał(a):
>
> On 05/02/19 3:51 AM, David Lechner wrote:
> > On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> >> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >>
> >> In order to select SPARSE_IRQ we need to make the interrupt numbers
> >> dynamic (at least at build-time for the top-level controller). The
> >> interrupt numbers are used as array indexes for irq priorities.
> >>
> >> Drop the defines and just initialize the arrays in a linear manner.
> >>
> >> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >> ---
> >
> > ...
> >
> >> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
> >> - [IRQ_DM355_CCDC_VDINT0] = 2,
> >> - [IRQ_DM355_CCDC_VDINT1] = 6,
> >> - [IRQ_DM355_CCDC_VDINT2] = 6,
> >> - [IRQ_DM355_IPIPE_HST] = 6,
> >> - [IRQ_DM355_H3AINT] = 6,
> >> - [IRQ_DM355_IPIPE_SDR] = 6,
> >> - [IRQ_DM355_IPIPEIFINT] = 6,
> >> - [IRQ_DM355_OSDINT] = 7,
> >> - [IRQ_DM355_VENCINT] = 6,
> >> - [IRQ_ASQINT] = 6,
> >> - [IRQ_IMXINT] = 6,
> >> - [IRQ_USBINT] = 4,
> >> - [IRQ_DM355_RTOINT] = 4,
> >> - [IRQ_DM355_UARTINT2] = 7,
> >> - [IRQ_DM355_TINT6] = 7,
> >> - [IRQ_CCINT0] = 5, /* dma */
> >> - [IRQ_CCERRINT] = 5, /* dma */
> >> - [IRQ_TCERRINT0] = 5, /* dma */
> >> - [IRQ_TCERRINT] = 5, /* dma */
> >> - [IRQ_DM355_SPINT2_1] = 7,
> >> - [IRQ_DM355_TINT7] = 4,
> >> - [IRQ_DM355_SDIOINT0] = 7,
> >> - [IRQ_MBXINT] = 7,
> >> - [IRQ_MBRINT] = 7,
> >> - [IRQ_MMCINT] = 7,
> >> - [IRQ_DM355_MMCINT1] = 7,
> >> - [IRQ_DM355_PWMINT3] = 7,
> >> - [IRQ_DDRINT] = 7,
> >> - [IRQ_AEMIFINT] = 7,
> >> - [IRQ_DM355_SDIOINT1] = 4,
> >> - [IRQ_TINT0_TINT12] = 2, /* clockevent */
> >> - [IRQ_TINT0_TINT34] = 2, /* clocksource */
> >> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */
> >> - [IRQ_TINT1_TINT34] = 7, /* system tick */
> >> - [IRQ_PWMINT0] = 7,
> >> - [IRQ_PWMINT1] = 7,
> >> - [IRQ_PWMINT2] = 7,
> >> - [IRQ_I2C] = 3,
> >> - [IRQ_UARTINT0] = 3,
> >> - [IRQ_UARTINT1] = 3,
> >> - [IRQ_DM355_SPINT0_0] = 3,
> >> - [IRQ_DM355_SPINT0_1] = 3,
> >> - [IRQ_DM355_GPIO0] = 3,
> >> - [IRQ_DM355_GPIO1] = 7,
> >> - [IRQ_DM355_GPIO2] = 4,
> >> - [IRQ_DM355_GPIO3] = 4,
> >> - [IRQ_DM355_GPIO4] = 7,
> >> - [IRQ_DM355_GPIO5] = 7,
> >> - [IRQ_DM355_GPIO6] = 7,
> >> - [IRQ_DM355_GPIO7] = 7,
> >> - [IRQ_DM355_GPIO8] = 7,
> >> - [IRQ_DM355_GPIO9] = 7,
> >> - [IRQ_DM355_GPIOBNK0] = 7,
> >> - [IRQ_DM355_GPIOBNK1] = 7,
> >> - [IRQ_DM355_GPIOBNK2] = 7,
> >> - [IRQ_DM355_GPIOBNK3] = 7,
> >> - [IRQ_DM355_GPIOBNK4] = 7,
> >> - [IRQ_DM355_GPIOBNK5] = 7,
> >> - [IRQ_DM355_GPIOBNK6] = 7,
> >> - [IRQ_COMMTX] = 7,
> >> - [IRQ_COMMRX] = 7,
> >> - [IRQ_EMUINT] = 7,
> >> +static u8 dm355_aintc_prios[] = {
> >> + 2, 6, 6, 6, 6, 6, 6, 7,
> >> + 6, 6, 6, 4, 4, 7, 7, 5,
> >> + 5, 5, 5, 7, 4, 7, 7, 7,
> >> + 7, 7, 7, 7, 7, 4, 2, 2,
> >> + 7, 7, 7, 7, 7, 3, 3, 3,
> >> + 3, 3, 3, 7, 4, 4, 7, 7,
> >> + 7, 7, 7, 7, 7, 7, 7, 7,
> >> + 7, 7, 7, 7, 7, 7, 0, 0,
> >> };
> >
> > Hmm... this makes it harder to see what is going on here.
> > You can no longer see which priority corresponds to which
> > IRQ without consulting a manual.
>
> I agree with David here. The interrupt numbers are dynamic, but the
> interrupt number offset from hardware point-of-view is fixed. So can
> these macros be re-purposed to represent the hardware offset (eventually
> you would pass them to DAVINCI_INTC_IRQ())?
>
> Thanks,
> Sekhar
Should we keep the mach/irqs.h header then? While working on patches
for supporting the multi_v5_defconfig build I noticed the mach/*
headers tend to cause build problems in certain drivers that use them.
Most machines have gotten rid of them. Should we maybe create a local
header in mach-davinci/?
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-02-06 13:32 ` Bartosz Golaszewski
@ 2019-02-06 14:50 ` Sekhar Nori
0 siblings, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-06 14:50 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: David Lechner, Bartosz Golaszewski, Kevin Hilman,
Thomas Gleixner, Jason Cooper, Marc Zyngier, LKML, arm-soc
On 06/02/19 7:02 PM, Bartosz Golaszewski wrote:
> śr., 6 lut 2019 o 14:03 Sekhar Nori <nsekhar@ti.com> napisał(a):
>>
>> On 05/02/19 3:51 AM, David Lechner wrote:
>>> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
>>>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>>>>
>>>> In order to select SPARSE_IRQ we need to make the interrupt numbers
>>>> dynamic (at least at build-time for the top-level controller). The
>>>> interrupt numbers are used as array indexes for irq priorities.
>>>>
>>>> Drop the defines and just initialize the arrays in a linear manner.
>>>>
>>>> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>>>> ---
>>>
>>> ...
>>>
>>>> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
>>>> - [IRQ_DM355_CCDC_VDINT0] = 2,
>>>> - [IRQ_DM355_CCDC_VDINT1] = 6,
>>>> - [IRQ_DM355_CCDC_VDINT2] = 6,
>>>> - [IRQ_DM355_IPIPE_HST] = 6,
>>>> - [IRQ_DM355_H3AINT] = 6,
>>>> - [IRQ_DM355_IPIPE_SDR] = 6,
>>>> - [IRQ_DM355_IPIPEIFINT] = 6,
>>>> - [IRQ_DM355_OSDINT] = 7,
>>>> - [IRQ_DM355_VENCINT] = 6,
>>>> - [IRQ_ASQINT] = 6,
>>>> - [IRQ_IMXINT] = 6,
>>>> - [IRQ_USBINT] = 4,
>>>> - [IRQ_DM355_RTOINT] = 4,
>>>> - [IRQ_DM355_UARTINT2] = 7,
>>>> - [IRQ_DM355_TINT6] = 7,
>>>> - [IRQ_CCINT0] = 5, /* dma */
>>>> - [IRQ_CCERRINT] = 5, /* dma */
>>>> - [IRQ_TCERRINT0] = 5, /* dma */
>>>> - [IRQ_TCERRINT] = 5, /* dma */
>>>> - [IRQ_DM355_SPINT2_1] = 7,
>>>> - [IRQ_DM355_TINT7] = 4,
>>>> - [IRQ_DM355_SDIOINT0] = 7,
>>>> - [IRQ_MBXINT] = 7,
>>>> - [IRQ_MBRINT] = 7,
>>>> - [IRQ_MMCINT] = 7,
>>>> - [IRQ_DM355_MMCINT1] = 7,
>>>> - [IRQ_DM355_PWMINT3] = 7,
>>>> - [IRQ_DDRINT] = 7,
>>>> - [IRQ_AEMIFINT] = 7,
>>>> - [IRQ_DM355_SDIOINT1] = 4,
>>>> - [IRQ_TINT0_TINT12] = 2, /* clockevent */
>>>> - [IRQ_TINT0_TINT34] = 2, /* clocksource */
>>>> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */
>>>> - [IRQ_TINT1_TINT34] = 7, /* system tick */
>>>> - [IRQ_PWMINT0] = 7,
>>>> - [IRQ_PWMINT1] = 7,
>>>> - [IRQ_PWMINT2] = 7,
>>>> - [IRQ_I2C] = 3,
>>>> - [IRQ_UARTINT0] = 3,
>>>> - [IRQ_UARTINT1] = 3,
>>>> - [IRQ_DM355_SPINT0_0] = 3,
>>>> - [IRQ_DM355_SPINT0_1] = 3,
>>>> - [IRQ_DM355_GPIO0] = 3,
>>>> - [IRQ_DM355_GPIO1] = 7,
>>>> - [IRQ_DM355_GPIO2] = 4,
>>>> - [IRQ_DM355_GPIO3] = 4,
>>>> - [IRQ_DM355_GPIO4] = 7,
>>>> - [IRQ_DM355_GPIO5] = 7,
>>>> - [IRQ_DM355_GPIO6] = 7,
>>>> - [IRQ_DM355_GPIO7] = 7,
>>>> - [IRQ_DM355_GPIO8] = 7,
>>>> - [IRQ_DM355_GPIO9] = 7,
>>>> - [IRQ_DM355_GPIOBNK0] = 7,
>>>> - [IRQ_DM355_GPIOBNK1] = 7,
>>>> - [IRQ_DM355_GPIOBNK2] = 7,
>>>> - [IRQ_DM355_GPIOBNK3] = 7,
>>>> - [IRQ_DM355_GPIOBNK4] = 7,
>>>> - [IRQ_DM355_GPIOBNK5] = 7,
>>>> - [IRQ_DM355_GPIOBNK6] = 7,
>>>> - [IRQ_COMMTX] = 7,
>>>> - [IRQ_COMMRX] = 7,
>>>> - [IRQ_EMUINT] = 7,
>>>> +static u8 dm355_aintc_prios[] = {
>>>> + 2, 6, 6, 6, 6, 6, 6, 7,
>>>> + 6, 6, 6, 4, 4, 7, 7, 5,
>>>> + 5, 5, 5, 7, 4, 7, 7, 7,
>>>> + 7, 7, 7, 7, 7, 4, 2, 2,
>>>> + 7, 7, 7, 7, 7, 3, 3, 3,
>>>> + 3, 3, 3, 7, 4, 4, 7, 7,
>>>> + 7, 7, 7, 7, 7, 7, 7, 7,
>>>> + 7, 7, 7, 7, 7, 7, 0, 0,
>>>> };
>>>
>>> Hmm... this makes it harder to see what is going on here.
>>> You can no longer see which priority corresponds to which
>>> IRQ without consulting a manual.
>>
>> I agree with David here. The interrupt numbers are dynamic, but the
>> interrupt number offset from hardware point-of-view is fixed. So can
>> these macros be re-purposed to represent the hardware offset (eventually
>> you would pass them to DAVINCI_INTC_IRQ())?
>>
>> Thanks,
>> Sekhar
>
> Should we keep the mach/irqs.h header then? While working on patches
> for supporting the multi_v5_defconfig build I noticed the mach/*
> headers tend to cause build problems in certain drivers that use them.
> Most machines have gotten rid of them. Should we maybe create a local
> header in mach-davinci/?
Yes, we should have a local header in mach-davinci. It should not be in
include/mach/ so it should not be exposed to drivers.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-01-31 13:38 ` [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites Bartosz Golaszewski
2019-02-04 22:21 ` David Lechner
@ 2019-02-05 0:20 ` David Lechner
2019-02-05 16:16 ` Bartosz Golaszewski
1 sibling, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:20 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> In order to select SPARSE_IRQ we need to make the interrupt numbers
> dynamic (at least at build-time for the top-level controller). The
> interrupt numbers are used as array indexes for irq priorities.
>
> Drop the defines and just initialize the arrays in a linear manner.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/da830.c | 107 ++++--------------------------
> arch/arm/mach-davinci/da850.c | 118 +++++----------------------------
> arch/arm/mach-davinci/dm355.c | 74 +++------------------
> arch/arm/mach-davinci/dm365.c | 76 +++------------------
> arch/arm/mach-davinci/dm644x.c | 76 +++------------------
> arch/arm/mach-davinci/dm646x.c | 76 +++------------------
> 6 files changed, 69 insertions(+), 458 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
> index 9e18b245266b..f1e7b6c644e5 100644
> --- a/arch/arm/mach-davinci/da830.c
> +++ b/arch/arm/mach-davinci/da830.c
> @@ -624,98 +624,19 @@ const short da830_eqep1_pins[] __initconst = {
> };
>
> /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
> -static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
> - [IRQ_DA8XX_COMMTX] = 7,
> - [IRQ_DA8XX_COMMRX] = 7,
> - [IRQ_DA8XX_NINT] = 7,
> - [IRQ_DA8XX_EVTOUT0] = 7,
> - [IRQ_DA8XX_EVTOUT1] = 7,
> - [IRQ_DA8XX_EVTOUT2] = 7,
> - [IRQ_DA8XX_EVTOUT3] = 7,
> - [IRQ_DA8XX_EVTOUT4] = 7,
> - [IRQ_DA8XX_EVTOUT5] = 7,
> - [IRQ_DA8XX_EVTOUT6] = 7,
> - [IRQ_DA8XX_EVTOUT7] = 7,
> - [IRQ_DA8XX_CCINT0] = 7,
> - [IRQ_DA8XX_CCERRINT] = 7,
> - [IRQ_DA8XX_TCERRINT0] = 7,
> - [IRQ_DA8XX_AEMIFINT] = 7,
> - [IRQ_DA8XX_I2CINT0] = 7,
> - [IRQ_DA8XX_MMCSDINT0] = 7,
> - [IRQ_DA8XX_MMCSDINT1] = 7,
> - [IRQ_DA8XX_ALLINT0] = 7,
> - [IRQ_DA8XX_RTC] = 7,
> - [IRQ_DA8XX_SPINT0] = 7,
> - [IRQ_DA8XX_TINT12_0] = 7,
> - [IRQ_DA8XX_TINT34_0] = 7,
> - [IRQ_DA8XX_TINT12_1] = 7,
> - [IRQ_DA8XX_TINT34_1] = 7,
> - [IRQ_DA8XX_UARTINT0] = 7,
> - [IRQ_DA8XX_KEYMGRINT] = 7,
> - [IRQ_DA830_MPUERR] = 7,
> - [IRQ_DA8XX_CHIPINT0] = 7,
> - [IRQ_DA8XX_CHIPINT1] = 7,
> - [IRQ_DA8XX_CHIPINT2] = 7,
> - [IRQ_DA8XX_CHIPINT3] = 7,
> - [IRQ_DA8XX_TCERRINT1] = 7,
> - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
> - [IRQ_DA8XX_C0_RX_PULSE] = 7,
> - [IRQ_DA8XX_C0_TX_PULSE] = 7,
> - [IRQ_DA8XX_C0_MISC_PULSE] = 7,
> - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
> - [IRQ_DA8XX_C1_RX_PULSE] = 7,
> - [IRQ_DA8XX_C1_TX_PULSE] = 7,
> - [IRQ_DA8XX_C1_MISC_PULSE] = 7,
> - [IRQ_DA8XX_MEMERR] = 7,
> - [IRQ_DA8XX_GPIO0] = 7,
> - [IRQ_DA8XX_GPIO1] = 7,
> - [IRQ_DA8XX_GPIO2] = 7,
> - [IRQ_DA8XX_GPIO3] = 7,
> - [IRQ_DA8XX_GPIO4] = 7,
> - [IRQ_DA8XX_GPIO5] = 7,
> - [IRQ_DA8XX_GPIO6] = 7,
> - [IRQ_DA8XX_GPIO7] = 7,
> - [IRQ_DA8XX_GPIO8] = 7,
> - [IRQ_DA8XX_I2CINT1] = 7,
> - [IRQ_DA8XX_LCDINT] = 7,
> - [IRQ_DA8XX_UARTINT1] = 7,
> - [IRQ_DA8XX_MCASPINT] = 7,
> - [IRQ_DA8XX_ALLINT1] = 7,
> - [IRQ_DA8XX_SPINT1] = 7,
> - [IRQ_DA8XX_UHPI_INT1] = 7,
> - [IRQ_DA8XX_USB_INT] = 7,
> - [IRQ_DA8XX_IRQN] = 7,
> - [IRQ_DA8XX_RWAKEUP] = 7,
> - [IRQ_DA8XX_UARTINT2] = 7,
> - [IRQ_DA8XX_DFTSSINT] = 7,
> - [IRQ_DA8XX_EHRPWM0] = 7,
> - [IRQ_DA8XX_EHRPWM0TZ] = 7,
> - [IRQ_DA8XX_EHRPWM1] = 7,
> - [IRQ_DA8XX_EHRPWM1TZ] = 7,
> - [IRQ_DA830_EHRPWM2] = 7,
> - [IRQ_DA830_EHRPWM2TZ] = 7,
> - [IRQ_DA8XX_ECAP0] = 7,
> - [IRQ_DA8XX_ECAP1] = 7,
> - [IRQ_DA8XX_ECAP2] = 7,
> - [IRQ_DA830_EQEP0] = 7,
> - [IRQ_DA830_EQEP1] = 7,
> - [IRQ_DA830_T12CMPINT0_0] = 7,
> - [IRQ_DA830_T12CMPINT1_0] = 7,
> - [IRQ_DA830_T12CMPINT2_0] = 7,
> - [IRQ_DA830_T12CMPINT3_0] = 7,
> - [IRQ_DA830_T12CMPINT4_0] = 7,
> - [IRQ_DA830_T12CMPINT5_0] = 7,
> - [IRQ_DA830_T12CMPINT6_0] = 7,
> - [IRQ_DA830_T12CMPINT7_0] = 7,
> - [IRQ_DA830_T12CMPINT0_1] = 7,
> - [IRQ_DA830_T12CMPINT1_1] = 7,
> - [IRQ_DA830_T12CMPINT2_1] = 7,
> - [IRQ_DA830_T12CMPINT3_1] = 7,
> - [IRQ_DA830_T12CMPINT4_1] = 7,
> - [IRQ_DA830_T12CMPINT5_1] = 7,
> - [IRQ_DA830_T12CMPINT6_1] = 7,
> - [IRQ_DA830_T12CMPINT7_1] = 7,
> - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
> +static u8 da830_cp_intc_prios[] = {
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> + 7, 7, 7, 7, 7, 7, 7, 7,
> };
>
Technically, any holes in the array that are being deleted
here have a default priority of 15 assigned in the cp_intc
driver instead of 7. I don't think this is a problem, but it
might be worth mentioning in the commit message. Same goes
for DA850.
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites
2019-02-05 0:20 ` David Lechner
@ 2019-02-05 16:16 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-05 16:16 UTC (permalink / raw)
To: David Lechner
Cc: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
wt., 5 lut 2019 o 01:20 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > In order to select SPARSE_IRQ we need to make the interrupt numbers
> > dynamic (at least at build-time for the top-level controller). The
> > interrupt numbers are used as array indexes for irq priorities.
> >
> > Drop the defines and just initialize the arrays in a linear manner.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > ---
[snip!]
> >
>
> Technically, any holes in the array that are being deleted
> here have a default priority of 15 assigned in the cp_intc
> driver instead of 7. I don't think this is a problem, but it
> might be worth mentioning in the commit message. Same goes
> for DA850.
>
Actually the defaulting is only done if no priorities have been
defined at all. I'll double check though if there are no holes here.
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (4 preceding siblings ...)
2019-01-31 13:38 ` [PATCH 05/35] ARM: davinci: drop irq defines from default_priorites Bartosz Golaszewski
@ 2019-01-31 13:38 ` Bartosz Golaszewski
2019-02-04 22:32 ` David Lechner
2019-01-31 13:39 ` [PATCH 07/35] ARM: davinci: aintc: use irq domain Bartosz Golaszewski
` (30 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:38 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This is done in preparation for selecting CONFIG_SPARSE_IRQ. The
interrupt numbers will then start at the predefined NR_IRQS offset.
For now wrap all interrupt numbers with a macro and define
DAVINCI_INTC_START to 0. Logically nothing changes for now.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/include/mach/irqs.h | 689 +++++++++++-----------
1 file changed, 346 insertions(+), 343 deletions(-)
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 03c446635301..14fa668d4e8d 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -30,371 +30,374 @@
/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000
+#define DAVINCI_INTC_START 0
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+
/* Interrupt lines */
-#define IRQ_VDINT0 0
-#define IRQ_VDINT1 1
-#define IRQ_VDINT2 2
-#define IRQ_HISTINT 3
-#define IRQ_H3AINT 4
-#define IRQ_PRVUINT 5
-#define IRQ_RSZINT 6
-#define IRQ_VFOCINT 7
-#define IRQ_VENCINT 8
-#define IRQ_ASQINT 9
-#define IRQ_IMXINT 10
-#define IRQ_VLCDINT 11
-#define IRQ_USBINT 12
-#define IRQ_EMACINT 13
+#define IRQ_VDINT0 DAVINCI_INTC_IRQ(0)
+#define IRQ_VDINT1 DAVINCI_INTC_IRQ(1)
+#define IRQ_VDINT2 DAVINCI_INTC_IRQ(2)
+#define IRQ_HISTINT DAVINCI_INTC_IRQ(3)
+#define IRQ_H3AINT DAVINCI_INTC_IRQ(4)
+#define IRQ_PRVUINT DAVINCI_INTC_IRQ(5)
+#define IRQ_RSZINT DAVINCI_INTC_IRQ(6)
+#define IRQ_VFOCINT DAVINCI_INTC_IRQ(7)
+#define IRQ_VENCINT DAVINCI_INTC_IRQ(8)
+#define IRQ_ASQINT DAVINCI_INTC_IRQ(9)
+#define IRQ_IMXINT DAVINCI_INTC_IRQ(10)
+#define IRQ_VLCDINT DAVINCI_INTC_IRQ(11)
+#define IRQ_USBINT DAVINCI_INTC_IRQ(12)
+#define IRQ_EMACINT DAVINCI_INTC_IRQ(13)
-#define IRQ_CCINT0 16
-#define IRQ_CCERRINT 17
-#define IRQ_TCERRINT0 18
-#define IRQ_TCERRINT 19
-#define IRQ_PSCIN 20
+#define IRQ_CCINT0 DAVINCI_INTC_IRQ(16)
+#define IRQ_CCERRINT DAVINCI_INTC_IRQ(17)
+#define IRQ_TCERRINT0 DAVINCI_INTC_IRQ(18)
+#define IRQ_TCERRINT DAVINCI_INTC_IRQ(19)
+#define IRQ_PSCIN DAVINCI_INTC_IRQ(20)
-#define IRQ_IDE 22
-#define IRQ_HPIINT 23
-#define IRQ_MBXINT 24
-#define IRQ_MBRINT 25
-#define IRQ_MMCINT 26
-#define IRQ_SDIOINT 27
-#define IRQ_MSINT 28
-#define IRQ_DDRINT 29
-#define IRQ_AEMIFINT 30
-#define IRQ_VLQINT 31
-#define IRQ_TINT0_TINT12 32
-#define IRQ_TINT0_TINT34 33
-#define IRQ_TINT1_TINT12 34
-#define IRQ_TINT1_TINT34 35
-#define IRQ_PWMINT0 36
-#define IRQ_PWMINT1 37
-#define IRQ_PWMINT2 38
-#define IRQ_I2C 39
-#define IRQ_UARTINT0 40
-#define IRQ_UARTINT1 41
-#define IRQ_UARTINT2 42
-#define IRQ_SPINT0 43
-#define IRQ_SPINT1 44
+#define IRQ_IDE DAVINCI_INTC_IRQ(22)
+#define IRQ_HPIINT DAVINCI_INTC_IRQ(23)
+#define IRQ_MBXINT DAVINCI_INTC_IRQ(24)
+#define IRQ_MBRINT DAVINCI_INTC_IRQ(25)
+#define IRQ_MMCINT DAVINCI_INTC_IRQ(26)
+#define IRQ_SDIOINT DAVINCI_INTC_IRQ(27)
+#define IRQ_MSINT DAVINCI_INTC_IRQ(28)
+#define IRQ_DDRINT DAVINCI_INTC_IRQ(29)
+#define IRQ_AEMIFINT DAVINCI_INTC_IRQ(30)
+#define IRQ_VLQINT DAVINCI_INTC_IRQ(31)
+#define IRQ_TINT0_TINT12 DAVINCI_INTC_IRQ(32)
+#define IRQ_TINT0_TINT34 DAVINCI_INTC_IRQ(33)
+#define IRQ_TINT1_TINT12 DAVINCI_INTC_IRQ(34)
+#define IRQ_TINT1_TINT34 DAVINCI_INTC_IRQ(35)
+#define IRQ_PWMINT0 DAVINCI_INTC_IRQ(36)
+#define IRQ_PWMINT1 DAVINCI_INTC_IRQ(37)
+#define IRQ_PWMINT2 DAVINCI_INTC_IRQ(38)
+#define IRQ_I2C DAVINCI_INTC_IRQ(39)
+#define IRQ_UARTINT0 DAVINCI_INTC_IRQ(40)
+#define IRQ_UARTINT1 DAVINCI_INTC_IRQ(41)
+#define IRQ_UARTINT2 DAVINCI_INTC_IRQ(42)
+#define IRQ_SPINT0 DAVINCI_INTC_IRQ(43)
+#define IRQ_SPINT1 DAVINCI_INTC_IRQ(44)
-#define IRQ_DSP2ARM0 46
-#define IRQ_DSP2ARM1 47
-#define IRQ_GPIO0 48
-#define IRQ_GPIO1 49
-#define IRQ_GPIO2 50
-#define IRQ_GPIO3 51
-#define IRQ_GPIO4 52
-#define IRQ_GPIO5 53
-#define IRQ_GPIO6 54
-#define IRQ_GPIO7 55
-#define IRQ_GPIOBNK0 56
-#define IRQ_GPIOBNK1 57
-#define IRQ_GPIOBNK2 58
-#define IRQ_GPIOBNK3 59
-#define IRQ_GPIOBNK4 60
-#define IRQ_COMMTX 61
-#define IRQ_COMMRX 62
-#define IRQ_EMUINT 63
+#define IRQ_DSP2ARM0 DAVINCI_INTC_IRQ(46)
+#define IRQ_DSP2ARM1 DAVINCI_INTC_IRQ(47)
+#define IRQ_GPIO0 DAVINCI_INTC_IRQ(48)
+#define IRQ_GPIO1 DAVINCI_INTC_IRQ(49)
+#define IRQ_GPIO2 DAVINCI_INTC_IRQ(50)
+#define IRQ_GPIO3 DAVINCI_INTC_IRQ(51)
+#define IRQ_GPIO4 DAVINCI_INTC_IRQ(52)
+#define IRQ_GPIO5 DAVINCI_INTC_IRQ(53)
+#define IRQ_GPIO6 DAVINCI_INTC_IRQ(54)
+#define IRQ_GPIO7 DAVINCI_INTC_IRQ(55)
+#define IRQ_GPIOBNK0 DAVINCI_INTC_IRQ(56)
+#define IRQ_GPIOBNK1 DAVINCI_INTC_IRQ(57)
+#define IRQ_GPIOBNK2 DAVINCI_INTC_IRQ(58)
+#define IRQ_GPIOBNK3 DAVINCI_INTC_IRQ(59)
+#define IRQ_GPIOBNK4 DAVINCI_INTC_IRQ(60)
+#define IRQ_COMMTX DAVINCI_INTC_IRQ(61)
+#define IRQ_COMMRX DAVINCI_INTC_IRQ(62)
+#define IRQ_EMUINT DAVINCI_INTC_IRQ(63)
#define DAVINCI_N_AINTC_IRQ 64
#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
/* DaVinci DM6467-specific Interrupts */
-#define IRQ_DM646X_VP_VERTINT0 0
-#define IRQ_DM646X_VP_VERTINT1 1
-#define IRQ_DM646X_VP_VERTINT2 2
-#define IRQ_DM646X_VP_VERTINT3 3
-#define IRQ_DM646X_VP_ERRINT 4
-#define IRQ_DM646X_RESERVED_1 5
-#define IRQ_DM646X_RESERVED_2 6
-#define IRQ_DM646X_WDINT 7
-#define IRQ_DM646X_CRGENINT0 8
-#define IRQ_DM646X_CRGENINT1 9
-#define IRQ_DM646X_TSIFINT0 10
-#define IRQ_DM646X_TSIFINT1 11
-#define IRQ_DM646X_VDCEINT 12
-#define IRQ_DM646X_USBINT 13
-#define IRQ_DM646X_USBDMAINT 14
-#define IRQ_DM646X_PCIINT 15
-#define IRQ_DM646X_TCERRINT2 20
-#define IRQ_DM646X_TCERRINT3 21
-#define IRQ_DM646X_IDE 22
-#define IRQ_DM646X_HPIINT 23
-#define IRQ_DM646X_EMACRXTHINT 24
-#define IRQ_DM646X_EMACRXINT 25
-#define IRQ_DM646X_EMACTXINT 26
-#define IRQ_DM646X_EMACMISCINT 27
-#define IRQ_DM646X_MCASP0TXINT 28
-#define IRQ_DM646X_MCASP0RXINT 29
-#define IRQ_DM646X_MCASP1TXINT 30
-#define IRQ_DM646X_RESERVED_3 31
-#define IRQ_DM646X_VLQINT 38
-#define IRQ_DM646X_UARTINT2 42
-#define IRQ_DM646X_SPINT0 43
-#define IRQ_DM646X_SPINT1 44
-#define IRQ_DM646X_DSP2ARMINT 45
-#define IRQ_DM646X_RESERVED_4 46
-#define IRQ_DM646X_PSCINT 47
-#define IRQ_DM646X_GPIO0 48
-#define IRQ_DM646X_GPIO1 49
-#define IRQ_DM646X_GPIO2 50
-#define IRQ_DM646X_GPIO3 51
-#define IRQ_DM646X_GPIO4 52
-#define IRQ_DM646X_GPIO5 53
-#define IRQ_DM646X_GPIO6 54
-#define IRQ_DM646X_GPIO7 55
-#define IRQ_DM646X_GPIOBNK0 56
-#define IRQ_DM646X_GPIOBNK1 57
-#define IRQ_DM646X_GPIOBNK2 58
-#define IRQ_DM646X_DDRINT 59
-#define IRQ_DM646X_AEMIFINT 60
+#define IRQ_DM646X_VP_VERTINT0 DAVINCI_INTC_IRQ(0)
+#define IRQ_DM646X_VP_VERTINT1 DAVINCI_INTC_IRQ(1)
+#define IRQ_DM646X_VP_VERTINT2 DAVINCI_INTC_IRQ(2)
+#define IRQ_DM646X_VP_VERTINT3 DAVINCI_INTC_IRQ(3)
+#define IRQ_DM646X_VP_ERRINT DAVINCI_INTC_IRQ(4)
+#define IRQ_DM646X_RESERVED_1 DAVINCI_INTC_IRQ(5)
+#define IRQ_DM646X_RESERVED_2 DAVINCI_INTC_IRQ(6)
+#define IRQ_DM646X_WDINT DAVINCI_INTC_IRQ(7)
+#define IRQ_DM646X_CRGENINT0 DAVINCI_INTC_IRQ(8)
+#define IRQ_DM646X_CRGENINT1 DAVINCI_INTC_IRQ(9)
+#define IRQ_DM646X_TSIFINT0 DAVINCI_INTC_IRQ(10)
+#define IRQ_DM646X_TSIFINT1 DAVINCI_INTC_IRQ(11)
+#define IRQ_DM646X_VDCEINT DAVINCI_INTC_IRQ(12)
+#define IRQ_DM646X_USBINT DAVINCI_INTC_IRQ(13)
+#define IRQ_DM646X_USBDMAINT DAVINCI_INTC_IRQ(14)
+#define IRQ_DM646X_PCIINT DAVINCI_INTC_IRQ(15)
+#define IRQ_DM646X_TCERRINT2 DAVINCI_INTC_IRQ(20)
+#define IRQ_DM646X_TCERRINT3 DAVINCI_INTC_IRQ(21)
+#define IRQ_DM646X_IDE DAVINCI_INTC_IRQ(22)
+#define IRQ_DM646X_HPIINT DAVINCI_INTC_IRQ(23)
+#define IRQ_DM646X_EMACRXTHINT DAVINCI_INTC_IRQ(24)
+#define IRQ_DM646X_EMACRXINT DAVINCI_INTC_IRQ(25)
+#define IRQ_DM646X_EMACTXINT DAVINCI_INTC_IRQ(26)
+#define IRQ_DM646X_EMACMISCINT DAVINCI_INTC_IRQ(27)
+#define IRQ_DM646X_MCASP0TXINT DAVINCI_INTC_IRQ(28)
+#define IRQ_DM646X_MCASP0RXINT DAVINCI_INTC_IRQ(29)
+#define IRQ_DM646X_MCASP1TXINT DAVINCI_INTC_IRQ(30)
+#define IRQ_DM646X_RESERVED_3 DAVINCI_INTC_IRQ(31)
+#define IRQ_DM646X_VLQINT DAVINCI_INTC_IRQ(38)
+#define IRQ_DM646X_UARTINT2 DAVINCI_INTC_IRQ(42)
+#define IRQ_DM646X_SPINT0 DAVINCI_INTC_IRQ(43)
+#define IRQ_DM646X_SPINT1 DAVINCI_INTC_IRQ(44)
+#define IRQ_DM646X_DSP2ARMINT DAVINCI_INTC_IRQ(45)
+#define IRQ_DM646X_RESERVED_4 DAVINCI_INTC_IRQ(46)
+#define IRQ_DM646X_PSCINT DAVINCI_INTC_IRQ(47)
+#define IRQ_DM646X_GPIO0 DAVINCI_INTC_IRQ(48)
+#define IRQ_DM646X_GPIO1 DAVINCI_INTC_IRQ(49)
+#define IRQ_DM646X_GPIO2 DAVINCI_INTC_IRQ(50)
+#define IRQ_DM646X_GPIO3 DAVINCI_INTC_IRQ(51)
+#define IRQ_DM646X_GPIO4 DAVINCI_INTC_IRQ(52)
+#define IRQ_DM646X_GPIO5 DAVINCI_INTC_IRQ(53)
+#define IRQ_DM646X_GPIO6 DAVINCI_INTC_IRQ(54)
+#define IRQ_DM646X_GPIO7 DAVINCI_INTC_IRQ(55)
+#define IRQ_DM646X_GPIOBNK0 DAVINCI_INTC_IRQ(56)
+#define IRQ_DM646X_GPIOBNK1 DAVINCI_INTC_IRQ(57)
+#define IRQ_DM646X_GPIOBNK2 DAVINCI_INTC_IRQ(58)
+#define IRQ_DM646X_DDRINT DAVINCI_INTC_IRQ(59)
+#define IRQ_DM646X_AEMIFINT DAVINCI_INTC_IRQ(60)
/* DaVinci DM355-specific Interrupts */
-#define IRQ_DM355_CCDC_VDINT0 0
-#define IRQ_DM355_CCDC_VDINT1 1
-#define IRQ_DM355_CCDC_VDINT2 2
-#define IRQ_DM355_IPIPE_HST 3
-#define IRQ_DM355_H3AINT 4
-#define IRQ_DM355_IPIPE_SDR 5
-#define IRQ_DM355_IPIPEIFINT 6
-#define IRQ_DM355_OSDINT 7
-#define IRQ_DM355_VENCINT 8
-#define IRQ_DM355_IMCOPINT 11
-#define IRQ_DM355_RTOINT 13
-#define IRQ_DM355_TINT4 13
-#define IRQ_DM355_TINT2_TINT12 13
-#define IRQ_DM355_UARTINT2 14
-#define IRQ_DM355_TINT5 14
-#define IRQ_DM355_TINT2_TINT34 14
-#define IRQ_DM355_TINT6 15
-#define IRQ_DM355_TINT3_TINT12 15
-#define IRQ_DM355_SPINT1_0 17
-#define IRQ_DM355_SPINT1_1 18
-#define IRQ_DM355_SPINT2_0 19
-#define IRQ_DM355_SPINT2_1 21
-#define IRQ_DM355_TINT7 22
-#define IRQ_DM355_TINT3_TINT34 22
-#define IRQ_DM355_SDIOINT0 23
-#define IRQ_DM355_MMCINT0 26
-#define IRQ_DM355_MSINT 26
-#define IRQ_DM355_MMCINT1 27
-#define IRQ_DM355_PWMINT3 28
-#define IRQ_DM355_SDIOINT1 31
-#define IRQ_DM355_SPINT0_0 42
-#define IRQ_DM355_SPINT0_1 43
-#define IRQ_DM355_GPIO0 44
-#define IRQ_DM355_GPIO1 45
-#define IRQ_DM355_GPIO2 46
-#define IRQ_DM355_GPIO3 47
-#define IRQ_DM355_GPIO4 48
-#define IRQ_DM355_GPIO5 49
-#define IRQ_DM355_GPIO6 50
-#define IRQ_DM355_GPIO7 51
-#define IRQ_DM355_GPIO8 52
-#define IRQ_DM355_GPIO9 53
-#define IRQ_DM355_GPIOBNK0 54
-#define IRQ_DM355_GPIOBNK1 55
-#define IRQ_DM355_GPIOBNK2 56
-#define IRQ_DM355_GPIOBNK3 57
-#define IRQ_DM355_GPIOBNK4 58
-#define IRQ_DM355_GPIOBNK5 59
-#define IRQ_DM355_GPIOBNK6 60
+#define IRQ_DM355_CCDC_VDINT0 DAVINCI_INTC_IRQ(0)
+#define IRQ_DM355_CCDC_VDINT1 DAVINCI_INTC_IRQ(1)
+#define IRQ_DM355_CCDC_VDINT2 DAVINCI_INTC_IRQ(2)
+#define IRQ_DM355_IPIPE_HST DAVINCI_INTC_IRQ(3)
+#define IRQ_DM355_H3AINT DAVINCI_INTC_IRQ(4)
+#define IRQ_DM355_IPIPE_SDR DAVINCI_INTC_IRQ(5)
+#define IRQ_DM355_IPIPEIFINT DAVINCI_INTC_IRQ(6)
+#define IRQ_DM355_OSDINT DAVINCI_INTC_IRQ(7)
+#define IRQ_DM355_VENCINT DAVINCI_INTC_IRQ(8)
+#define IRQ_DM355_IMCOPINT DAVINCI_INTC_IRQ(11)
+#define IRQ_DM355_RTOINT DAVINCI_INTC_IRQ(13)
+#define IRQ_DM355_TINT4 DAVINCI_INTC_IRQ(13)
+#define IRQ_DM355_TINT2_TINT12 DAVINCI_INTC_IRQ(13)
+#define IRQ_DM355_UARTINT2 DAVINCI_INTC_IRQ(14)
+#define IRQ_DM355_TINT5 DAVINCI_INTC_IRQ(14)
+#define IRQ_DM355_TINT2_TINT34 DAVINCI_INTC_IRQ(14)
+#define IRQ_DM355_TINT6 DAVINCI_INTC_IRQ(15)
+#define IRQ_DM355_TINT3_TINT12 DAVINCI_INTC_IRQ(15)
+#define IRQ_DM355_SPINT1_0 DAVINCI_INTC_IRQ(17)
+#define IRQ_DM355_SPINT1_1 DAVINCI_INTC_IRQ(18)
+#define IRQ_DM355_SPINT2_0 DAVINCI_INTC_IRQ(19)
+#define IRQ_DM355_SPINT2_1 DAVINCI_INTC_IRQ(21)
+#define IRQ_DM355_TINT7 DAVINCI_INTC_IRQ(22)
+#define IRQ_DM355_TINT3_TINT34 DAVINCI_INTC_IRQ(22)
+#define IRQ_DM355_SDIOINT0 DAVINCI_INTC_IRQ(23)
+#define IRQ_DM355_MMCINT0 DAVINCI_INTC_IRQ(26)
+#define IRQ_DM355_MSINT DAVINCI_INTC_IRQ(26)
+#define IRQ_DM355_MMCINT1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DM355_PWMINT3 DAVINCI_INTC_IRQ(28)
+#define IRQ_DM355_SDIOINT1 DAVINCI_INTC_IRQ(31)
+#define IRQ_DM355_SPINT0_0 DAVINCI_INTC_IRQ(42)
+#define IRQ_DM355_SPINT0_1 DAVINCI_INTC_IRQ(43)
+#define IRQ_DM355_GPIO0 DAVINCI_INTC_IRQ(44)
+#define IRQ_DM355_GPIO1 DAVINCI_INTC_IRQ(45)
+#define IRQ_DM355_GPIO2 DAVINCI_INTC_IRQ(46)
+#define IRQ_DM355_GPIO3 DAVINCI_INTC_IRQ(47)
+#define IRQ_DM355_GPIO4 DAVINCI_INTC_IRQ(48)
+#define IRQ_DM355_GPIO5 DAVINCI_INTC_IRQ(49)
+#define IRQ_DM355_GPIO6 DAVINCI_INTC_IRQ(50)
+#define IRQ_DM355_GPIO7 DAVINCI_INTC_IRQ(51)
+#define IRQ_DM355_GPIO8 DAVINCI_INTC_IRQ(52)
+#define IRQ_DM355_GPIO9 DAVINCI_INTC_IRQ(53)
+#define IRQ_DM355_GPIOBNK0 DAVINCI_INTC_IRQ(54)
+#define IRQ_DM355_GPIOBNK1 DAVINCI_INTC_IRQ(55)
+#define IRQ_DM355_GPIOBNK2 DAVINCI_INTC_IRQ(56)
+#define IRQ_DM355_GPIOBNK3 DAVINCI_INTC_IRQ(57)
+#define IRQ_DM355_GPIOBNK4 DAVINCI_INTC_IRQ(58)
+#define IRQ_DM355_GPIOBNK5 DAVINCI_INTC_IRQ(59)
+#define IRQ_DM355_GPIOBNK6 DAVINCI_INTC_IRQ(60)
/* DaVinci DM365-specific Interrupts */
-#define IRQ_DM365_INSFINT 7
-#define IRQ_DM365_IMXINT1 8
-#define IRQ_DM365_IMXINT0 10
-#define IRQ_DM365_KLD_ARMINT 10
-#define IRQ_DM365_IMCOPINT 11
-#define IRQ_DM365_RTOINT 13
-#define IRQ_DM365_TINT5 14
-#define IRQ_DM365_TINT6 15
-#define IRQ_DM365_SPINT2_1 21
-#define IRQ_DM365_TINT7 22
-#define IRQ_DM365_SDIOINT0 23
-#define IRQ_DM365_MMCINT1 27
-#define IRQ_DM365_PWMINT3 28
-#define IRQ_DM365_RTCINT 29
-#define IRQ_DM365_SDIOINT1 31
-#define IRQ_DM365_SPIINT0_0 42
-#define IRQ_DM365_SPIINT3_0 43
-#define IRQ_DM365_GPIO0 44
-#define IRQ_DM365_GPIO1 45
-#define IRQ_DM365_GPIO2 46
-#define IRQ_DM365_GPIO3 47
-#define IRQ_DM365_GPIO4 48
-#define IRQ_DM365_GPIO5 49
-#define IRQ_DM365_GPIO6 50
-#define IRQ_DM365_GPIO7 51
-#define IRQ_DM365_EMAC_RXTHRESH 52
-#define IRQ_DM365_EMAC_RXPULSE 53
-#define IRQ_DM365_EMAC_TXPULSE 54
-#define IRQ_DM365_EMAC_MISCPULSE 55
-#define IRQ_DM365_GPIO12 56
-#define IRQ_DM365_GPIO13 57
-#define IRQ_DM365_GPIO14 58
-#define IRQ_DM365_GPIO15 59
-#define IRQ_DM365_ADCINT 59
-#define IRQ_DM365_KEYINT 60
-#define IRQ_DM365_TCERRINT2 61
-#define IRQ_DM365_TCERRINT3 62
-#define IRQ_DM365_EMUINT 63
+#define IRQ_DM365_INSFINT DAVINCI_INTC_IRQ(7)
+#define IRQ_DM365_IMXINT1 DAVINCI_INTC_IRQ(8)
+#define IRQ_DM365_IMXINT0 DAVINCI_INTC_IRQ(10)
+#define IRQ_DM365_KLD_ARMINT DAVINCI_INTC_IRQ(10)
+#define IRQ_DM365_IMCOPINT DAVINCI_INTC_IRQ(11)
+#define IRQ_DM365_RTOINT DAVINCI_INTC_IRQ(13)
+#define IRQ_DM365_TINT5 DAVINCI_INTC_IRQ(14)
+#define IRQ_DM365_TINT6 DAVINCI_INTC_IRQ(15)
+#define IRQ_DM365_SPINT2_1 DAVINCI_INTC_IRQ(21)
+#define IRQ_DM365_TINT7 DAVINCI_INTC_IRQ(22)
+#define IRQ_DM365_SDIOINT0 DAVINCI_INTC_IRQ(23)
+#define IRQ_DM365_MMCINT1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DM365_PWMINT3 DAVINCI_INTC_IRQ(28)
+#define IRQ_DM365_RTCINT DAVINCI_INTC_IRQ(29)
+#define IRQ_DM365_SDIOINT1 DAVINCI_INTC_IRQ(31)
+#define IRQ_DM365_SPIINT0_0 DAVINCI_INTC_IRQ(42)
+#define IRQ_DM365_SPIINT3_0 DAVINCI_INTC_IRQ(43)
+#define IRQ_DM365_GPIO0 DAVINCI_INTC_IRQ(44)
+#define IRQ_DM365_GPIO1 DAVINCI_INTC_IRQ(45)
+#define IRQ_DM365_GPIO2 DAVINCI_INTC_IRQ(46)
+#define IRQ_DM365_GPIO3 DAVINCI_INTC_IRQ(47)
+#define IRQ_DM365_GPIO4 DAVINCI_INTC_IRQ(48)
+#define IRQ_DM365_GPIO5 DAVINCI_INTC_IRQ(49)
+#define IRQ_DM365_GPIO6 DAVINCI_INTC_IRQ(50)
+#define IRQ_DM365_GPIO7 DAVINCI_INTC_IRQ(51)
+#define IRQ_DM365_EMAC_RXTHRESH DAVINCI_INTC_IRQ(52)
+#define IRQ_DM365_EMAC_RXPULSE DAVINCI_INTC_IRQ(53)
+#define IRQ_DM365_EMAC_TXPULSE DAVINCI_INTC_IRQ(54)
+#define IRQ_DM365_EMAC_MISCPULSE DAVINCI_INTC_IRQ(55)
+#define IRQ_DM365_GPIO12 DAVINCI_INTC_IRQ(56)
+#define IRQ_DM365_GPIO13 DAVINCI_INTC_IRQ(57)
+#define IRQ_DM365_GPIO14 DAVINCI_INTC_IRQ(58)
+#define IRQ_DM365_GPIO15 DAVINCI_INTC_IRQ(59)
+#define IRQ_DM365_ADCINT DAVINCI_INTC_IRQ(59)
+#define IRQ_DM365_KEYINT DAVINCI_INTC_IRQ(60)
+#define IRQ_DM365_TCERRINT2 DAVINCI_INTC_IRQ(61)
+#define IRQ_DM365_TCERRINT3 DAVINCI_INTC_IRQ(62)
+#define IRQ_DM365_EMUINT DAVINCI_INTC_IRQ(63)
/* DA8XX interrupts */
-#define IRQ_DA8XX_COMMTX 0
-#define IRQ_DA8XX_COMMRX 1
-#define IRQ_DA8XX_NINT 2
-#define IRQ_DA8XX_EVTOUT0 3
-#define IRQ_DA8XX_EVTOUT1 4
-#define IRQ_DA8XX_EVTOUT2 5
-#define IRQ_DA8XX_EVTOUT3 6
-#define IRQ_DA8XX_EVTOUT4 7
-#define IRQ_DA8XX_EVTOUT5 8
-#define IRQ_DA8XX_EVTOUT6 9
-#define IRQ_DA8XX_EVTOUT7 10
-#define IRQ_DA8XX_CCINT0 11
-#define IRQ_DA8XX_CCERRINT 12
-#define IRQ_DA8XX_TCERRINT0 13
-#define IRQ_DA8XX_AEMIFINT 14
-#define IRQ_DA8XX_I2CINT0 15
-#define IRQ_DA8XX_MMCSDINT0 16
-#define IRQ_DA8XX_MMCSDINT1 17
-#define IRQ_DA8XX_ALLINT0 18
-#define IRQ_DA8XX_RTC 19
-#define IRQ_DA8XX_SPINT0 20
-#define IRQ_DA8XX_TINT12_0 21
-#define IRQ_DA8XX_TINT34_0 22
-#define IRQ_DA8XX_TINT12_1 23
-#define IRQ_DA8XX_TINT34_1 24
-#define IRQ_DA8XX_UARTINT0 25
-#define IRQ_DA8XX_KEYMGRINT 26
-#define IRQ_DA8XX_SECINT 26
-#define IRQ_DA8XX_SECKEYERR 26
-#define IRQ_DA8XX_CHIPINT0 28
-#define IRQ_DA8XX_CHIPINT1 29
-#define IRQ_DA8XX_CHIPINT2 30
-#define IRQ_DA8XX_CHIPINT3 31
-#define IRQ_DA8XX_TCERRINT1 32
-#define IRQ_DA8XX_C0_RX_THRESH_PULSE 33
-#define IRQ_DA8XX_C0_RX_PULSE 34
-#define IRQ_DA8XX_C0_TX_PULSE 35
-#define IRQ_DA8XX_C0_MISC_PULSE 36
-#define IRQ_DA8XX_C1_RX_THRESH_PULSE 37
-#define IRQ_DA8XX_C1_RX_PULSE 38
-#define IRQ_DA8XX_C1_TX_PULSE 39
-#define IRQ_DA8XX_C1_MISC_PULSE 40
-#define IRQ_DA8XX_MEMERR 41
-#define IRQ_DA8XX_GPIO0 42
-#define IRQ_DA8XX_GPIO1 43
-#define IRQ_DA8XX_GPIO2 44
-#define IRQ_DA8XX_GPIO3 45
-#define IRQ_DA8XX_GPIO4 46
-#define IRQ_DA8XX_GPIO5 47
-#define IRQ_DA8XX_GPIO6 48
-#define IRQ_DA8XX_GPIO7 49
-#define IRQ_DA8XX_GPIO8 50
-#define IRQ_DA8XX_I2CINT1 51
-#define IRQ_DA8XX_LCDINT 52
-#define IRQ_DA8XX_UARTINT1 53
-#define IRQ_DA8XX_MCASPINT 54
-#define IRQ_DA8XX_ALLINT1 55
-#define IRQ_DA8XX_SPINT1 56
-#define IRQ_DA8XX_UHPI_INT1 57
-#define IRQ_DA8XX_USB_INT 58
-#define IRQ_DA8XX_IRQN 59
-#define IRQ_DA8XX_RWAKEUP 60
-#define IRQ_DA8XX_UARTINT2 61
-#define IRQ_DA8XX_DFTSSINT 62
-#define IRQ_DA8XX_EHRPWM0 63
-#define IRQ_DA8XX_EHRPWM0TZ 64
-#define IRQ_DA8XX_EHRPWM1 65
-#define IRQ_DA8XX_EHRPWM1TZ 66
-#define IRQ_DA8XX_ECAP0 69
-#define IRQ_DA8XX_ECAP1 70
-#define IRQ_DA8XX_ECAP2 71
-#define IRQ_DA8XX_ARMCLKSTOPREQ 90
+#define IRQ_DA8XX_COMMTX DAVINCI_INTC_IRQ(0)
+#define IRQ_DA8XX_COMMRX DAVINCI_INTC_IRQ(1)
+#define IRQ_DA8XX_NINT DAVINCI_INTC_IRQ(2)
+#define IRQ_DA8XX_EVTOUT0 DAVINCI_INTC_IRQ(3)
+#define IRQ_DA8XX_EVTOUT1 DAVINCI_INTC_IRQ(4)
+#define IRQ_DA8XX_EVTOUT2 DAVINCI_INTC_IRQ(5)
+#define IRQ_DA8XX_EVTOUT3 DAVINCI_INTC_IRQ(6)
+#define IRQ_DA8XX_EVTOUT4 DAVINCI_INTC_IRQ(7)
+#define IRQ_DA8XX_EVTOUT5 DAVINCI_INTC_IRQ(8)
+#define IRQ_DA8XX_EVTOUT6 DAVINCI_INTC_IRQ(9)
+#define IRQ_DA8XX_EVTOUT7 DAVINCI_INTC_IRQ(10)
+#define IRQ_DA8XX_CCINT0 DAVINCI_INTC_IRQ(11)
+#define IRQ_DA8XX_CCERRINT DAVINCI_INTC_IRQ(12)
+#define IRQ_DA8XX_TCERRINT0 DAVINCI_INTC_IRQ(13)
+#define IRQ_DA8XX_AEMIFINT DAVINCI_INTC_IRQ(14)
+#define IRQ_DA8XX_I2CINT0 DAVINCI_INTC_IRQ(15)
+#define IRQ_DA8XX_MMCSDINT0 DAVINCI_INTC_IRQ(16)
+#define IRQ_DA8XX_MMCSDINT1 DAVINCI_INTC_IRQ(17)
+#define IRQ_DA8XX_ALLINT0 DAVINCI_INTC_IRQ(18)
+#define IRQ_DA8XX_RTC DAVINCI_INTC_IRQ(19)
+#define IRQ_DA8XX_SPINT0 DAVINCI_INTC_IRQ(20)
+#define IRQ_DA8XX_TINT12_0 DAVINCI_INTC_IRQ(21)
+#define IRQ_DA8XX_TINT34_0 DAVINCI_INTC_IRQ(22)
+#define IRQ_DA8XX_TINT12_1 DAVINCI_INTC_IRQ(23)
+#define IRQ_DA8XX_TINT34_1 DAVINCI_INTC_IRQ(24)
+#define IRQ_DA8XX_UARTINT0 DAVINCI_INTC_IRQ(25)
+#define IRQ_DA8XX_KEYMGRINT DAVINCI_INTC_IRQ(26)
+#define IRQ_DA8XX_SECINT DAVINCI_INTC_IRQ(26)
+#define IRQ_DA8XX_SECKEYERR DAVINCI_INTC_IRQ(26)
+#define IRQ_DA8XX_CHIPINT0 DAVINCI_INTC_IRQ(28)
+#define IRQ_DA8XX_CHIPINT1 DAVINCI_INTC_IRQ(29)
+#define IRQ_DA8XX_CHIPINT2 DAVINCI_INTC_IRQ(30)
+#define IRQ_DA8XX_CHIPINT3 DAVINCI_INTC_IRQ(31)
+#define IRQ_DA8XX_TCERRINT1 DAVINCI_INTC_IRQ(32)
+#define IRQ_DA8XX_C0_RX_THRESH_PULSE DAVINCI_INTC_IRQ(33)
+#define IRQ_DA8XX_C0_RX_PULSE DAVINCI_INTC_IRQ(34)
+#define IRQ_DA8XX_C0_TX_PULSE DAVINCI_INTC_IRQ(35)
+#define IRQ_DA8XX_C0_MISC_PULSE DAVINCI_INTC_IRQ(36)
+#define IRQ_DA8XX_C1_RX_THRESH_PULSE DAVINCI_INTC_IRQ(37)
+#define IRQ_DA8XX_C1_RX_PULSE DAVINCI_INTC_IRQ(38)
+#define IRQ_DA8XX_C1_TX_PULSE DAVINCI_INTC_IRQ(39)
+#define IRQ_DA8XX_C1_MISC_PULSE DAVINCI_INTC_IRQ(40)
+#define IRQ_DA8XX_MEMERR DAVINCI_INTC_IRQ(41)
+#define IRQ_DA8XX_GPIO0 DAVINCI_INTC_IRQ(42)
+#define IRQ_DA8XX_GPIO1 DAVINCI_INTC_IRQ(43)
+#define IRQ_DA8XX_GPIO2 DAVINCI_INTC_IRQ(44)
+#define IRQ_DA8XX_GPIO3 DAVINCI_INTC_IRQ(45)
+#define IRQ_DA8XX_GPIO4 DAVINCI_INTC_IRQ(46)
+#define IRQ_DA8XX_GPIO5 DAVINCI_INTC_IRQ(47)
+#define IRQ_DA8XX_GPIO6 DAVINCI_INTC_IRQ(48)
+#define IRQ_DA8XX_GPIO7 DAVINCI_INTC_IRQ(49)
+#define IRQ_DA8XX_GPIO8 DAVINCI_INTC_IRQ(50)
+#define IRQ_DA8XX_I2CINT1 DAVINCI_INTC_IRQ(51)
+#define IRQ_DA8XX_LCDINT DAVINCI_INTC_IRQ(52)
+#define IRQ_DA8XX_UARTINT1 DAVINCI_INTC_IRQ(53)
+#define IRQ_DA8XX_MCASPINT DAVINCI_INTC_IRQ(54)
+#define IRQ_DA8XX_ALLINT1 DAVINCI_INTC_IRQ(55)
+#define IRQ_DA8XX_SPINT1 DAVINCI_INTC_IRQ(56)
+#define IRQ_DA8XX_UHPI_INT1 DAVINCI_INTC_IRQ(57)
+#define IRQ_DA8XX_USB_INT DAVINCI_INTC_IRQ(58)
+#define IRQ_DA8XX_IRQN DAVINCI_INTC_IRQ(59)
+#define IRQ_DA8XX_RWAKEUP DAVINCI_INTC_IRQ(60)
+#define IRQ_DA8XX_UARTINT2 DAVINCI_INTC_IRQ(61)
+#define IRQ_DA8XX_DFTSSINT DAVINCI_INTC_IRQ(62)
+#define IRQ_DA8XX_EHRPWM0 DAVINCI_INTC_IRQ(63)
+#define IRQ_DA8XX_EHRPWM0TZ DAVINCI_INTC_IRQ(64)
+#define IRQ_DA8XX_EHRPWM1 DAVINCI_INTC_IRQ(65)
+#define IRQ_DA8XX_EHRPWM1TZ DAVINCI_INTC_IRQ(66)
+#define IRQ_DA8XX_ECAP0 DAVINCI_INTC_IRQ(69)
+#define IRQ_DA8XX_ECAP1 DAVINCI_INTC_IRQ(70)
+#define IRQ_DA8XX_ECAP2 DAVINCI_INTC_IRQ(71)
+#define IRQ_DA8XX_ARMCLKSTOPREQ DAVINCI_INTC_IRQ(90)
/* DA830 specific interrupts */
-#define IRQ_DA830_MPUERR 27
-#define IRQ_DA830_IOPUERR 27
-#define IRQ_DA830_BOOTCFGERR 27
-#define IRQ_DA830_EHRPWM2 67
-#define IRQ_DA830_EHRPWM2TZ 68
-#define IRQ_DA830_EQEP0 72
-#define IRQ_DA830_EQEP1 73
-#define IRQ_DA830_T12CMPINT0_0 74
-#define IRQ_DA830_T12CMPINT1_0 75
-#define IRQ_DA830_T12CMPINT2_0 76
-#define IRQ_DA830_T12CMPINT3_0 77
-#define IRQ_DA830_T12CMPINT4_0 78
-#define IRQ_DA830_T12CMPINT5_0 79
-#define IRQ_DA830_T12CMPINT6_0 80
-#define IRQ_DA830_T12CMPINT7_0 81
-#define IRQ_DA830_T12CMPINT0_1 82
-#define IRQ_DA830_T12CMPINT1_1 83
-#define IRQ_DA830_T12CMPINT2_1 84
-#define IRQ_DA830_T12CMPINT3_1 85
-#define IRQ_DA830_T12CMPINT4_1 86
-#define IRQ_DA830_T12CMPINT5_1 87
-#define IRQ_DA830_T12CMPINT6_1 88
-#define IRQ_DA830_T12CMPINT7_1 89
+#define IRQ_DA830_MPUERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA830_IOPUERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA830_BOOTCFGERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA830_EHRPWM2 DAVINCI_INTC_IRQ(67)
+#define IRQ_DA830_EHRPWM2TZ DAVINCI_INTC_IRQ(68)
+#define IRQ_DA830_EQEP0 DAVINCI_INTC_IRQ(72)
+#define IRQ_DA830_EQEP1 DAVINCI_INTC_IRQ(73)
+#define IRQ_DA830_T12CMPINT0_0 DAVINCI_INTC_IRQ(74)
+#define IRQ_DA830_T12CMPINT1_0 DAVINCI_INTC_IRQ(75)
+#define IRQ_DA830_T12CMPINT2_0 DAVINCI_INTC_IRQ(76)
+#define IRQ_DA830_T12CMPINT3_0 DAVINCI_INTC_IRQ(77)
+#define IRQ_DA830_T12CMPINT4_0 DAVINCI_INTC_IRQ(78)
+#define IRQ_DA830_T12CMPINT5_0 DAVINCI_INTC_IRQ(79)
+#define IRQ_DA830_T12CMPINT6_0 DAVINCI_INTC_IRQ(80)
+#define IRQ_DA830_T12CMPINT7_0 DAVINCI_INTC_IRQ(81)
+#define IRQ_DA830_T12CMPINT0_1 DAVINCI_INTC_IRQ(82)
+#define IRQ_DA830_T12CMPINT1_1 DAVINCI_INTC_IRQ(83)
+#define IRQ_DA830_T12CMPINT2_1 DAVINCI_INTC_IRQ(84)
+#define IRQ_DA830_T12CMPINT3_1 DAVINCI_INTC_IRQ(85)
+#define IRQ_DA830_T12CMPINT4_1 DAVINCI_INTC_IRQ(86)
+#define IRQ_DA830_T12CMPINT5_1 DAVINCI_INTC_IRQ(87)
+#define IRQ_DA830_T12CMPINT6_1 DAVINCI_INTC_IRQ(88)
+#define IRQ_DA830_T12CMPINT7_1 DAVINCI_INTC_IRQ(89)
#define DA830_N_CP_INTC_IRQ 96
/* DA850 speicific interrupts */
-#define IRQ_DA850_MPUADDRERR0 27
-#define IRQ_DA850_MPUPROTERR0 27
-#define IRQ_DA850_IOPUADDRERR0 27
-#define IRQ_DA850_IOPUPROTERR0 27
-#define IRQ_DA850_IOPUADDRERR1 27
-#define IRQ_DA850_IOPUPROTERR1 27
-#define IRQ_DA850_IOPUADDRERR2 27
-#define IRQ_DA850_IOPUPROTERR2 27
-#define IRQ_DA850_BOOTCFG_ADDR_ERR 27
-#define IRQ_DA850_BOOTCFG_PROT_ERR 27
-#define IRQ_DA850_MPUADDRERR1 27
-#define IRQ_DA850_MPUPROTERR1 27
-#define IRQ_DA850_IOPUADDRERR3 27
-#define IRQ_DA850_IOPUPROTERR3 27
-#define IRQ_DA850_IOPUADDRERR4 27
-#define IRQ_DA850_IOPUPROTERR4 27
-#define IRQ_DA850_IOPUADDRERR5 27
-#define IRQ_DA850_IOPUPROTERR5 27
-#define IRQ_DA850_MIOPU_BOOTCFG_ERR 27
-#define IRQ_DA850_SATAINT 67
-#define IRQ_DA850_TINT12_2 68
-#define IRQ_DA850_TINT34_2 68
-#define IRQ_DA850_TINTALL_2 68
-#define IRQ_DA850_MMCSDINT0_1 72
-#define IRQ_DA850_MMCSDINT1_1 73
-#define IRQ_DA850_T12CMPINT0_2 74
-#define IRQ_DA850_T12CMPINT1_2 75
-#define IRQ_DA850_T12CMPINT2_2 76
-#define IRQ_DA850_T12CMPINT3_2 77
-#define IRQ_DA850_T12CMPINT4_2 78
-#define IRQ_DA850_T12CMPINT5_2 79
-#define IRQ_DA850_T12CMPINT6_2 80
-#define IRQ_DA850_T12CMPINT7_2 81
-#define IRQ_DA850_T12CMPINT0_3 82
-#define IRQ_DA850_T12CMPINT1_3 83
-#define IRQ_DA850_T12CMPINT2_3 84
-#define IRQ_DA850_T12CMPINT3_3 85
-#define IRQ_DA850_T12CMPINT4_3 86
-#define IRQ_DA850_T12CMPINT5_3 87
-#define IRQ_DA850_T12CMPINT6_3 88
-#define IRQ_DA850_T12CMPINT7_3 89
-#define IRQ_DA850_RPIINT 91
-#define IRQ_DA850_VPIFINT 92
-#define IRQ_DA850_CCINT1 93
-#define IRQ_DA850_CCERRINT1 94
-#define IRQ_DA850_TCERRINT2 95
-#define IRQ_DA850_TINT12_3 96
-#define IRQ_DA850_TINT34_3 96
-#define IRQ_DA850_TINTALL_3 96
-#define IRQ_DA850_MCBSP0RINT 97
-#define IRQ_DA850_MCBSP0XINT 98
-#define IRQ_DA850_MCBSP1RINT 99
-#define IRQ_DA850_MCBSP1XINT 100
+#define IRQ_DA850_MPUADDRERR0 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_MPUPROTERR0 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR0 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR0 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR2 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR2 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_BOOTCFG_ADDR_ERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_BOOTCFG_PROT_ERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_MPUADDRERR1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_MPUPROTERR1 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR3 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR3 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR4 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR4 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUADDRERR5 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_IOPUPROTERR5 DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_MIOPU_BOOTCFG_ERR DAVINCI_INTC_IRQ(27)
+#define IRQ_DA850_SATAINT DAVINCI_INTC_IRQ(67)
+#define IRQ_DA850_TINT12_2 DAVINCI_INTC_IRQ(68)
+#define IRQ_DA850_TINT34_2 DAVINCI_INTC_IRQ(68)
+#define IRQ_DA850_TINTALL_2 DAVINCI_INTC_IRQ(68)
+#define IRQ_DA850_MMCSDINT0_1 DAVINCI_INTC_IRQ(72)
+#define IRQ_DA850_MMCSDINT1_1 DAVINCI_INTC_IRQ(73)
+#define IRQ_DA850_T12CMPINT0_2 DAVINCI_INTC_IRQ(74)
+#define IRQ_DA850_T12CMPINT1_2 DAVINCI_INTC_IRQ(75)
+#define IRQ_DA850_T12CMPINT2_2 DAVINCI_INTC_IRQ(76)
+#define IRQ_DA850_T12CMPINT3_2 DAVINCI_INTC_IRQ(77)
+#define IRQ_DA850_T12CMPINT4_2 DAVINCI_INTC_IRQ(78)
+#define IRQ_DA850_T12CMPINT5_2 DAVINCI_INTC_IRQ(79)
+#define IRQ_DA850_T12CMPINT6_2 DAVINCI_INTC_IRQ(80)
+#define IRQ_DA850_T12CMPINT7_2 DAVINCI_INTC_IRQ(81)
+#define IRQ_DA850_T12CMPINT0_3 DAVINCI_INTC_IRQ(82)
+#define IRQ_DA850_T12CMPINT1_3 DAVINCI_INTC_IRQ(83)
+#define IRQ_DA850_T12CMPINT2_3 DAVINCI_INTC_IRQ(84)
+#define IRQ_DA850_T12CMPINT3_3 DAVINCI_INTC_IRQ(85)
+#define IRQ_DA850_T12CMPINT4_3 DAVINCI_INTC_IRQ(86)
+#define IRQ_DA850_T12CMPINT5_3 DAVINCI_INTC_IRQ(87)
+#define IRQ_DA850_T12CMPINT6_3 DAVINCI_INTC_IRQ(88)
+#define IRQ_DA850_T12CMPINT7_3 DAVINCI_INTC_IRQ(89)
+#define IRQ_DA850_RPIINT DAVINCI_INTC_IRQ(91)
+#define IRQ_DA850_VPIFINT DAVINCI_INTC_IRQ(92)
+#define IRQ_DA850_CCINT1 DAVINCI_INTC_IRQ(93)
+#define IRQ_DA850_CCERRINT1 DAVINCI_INTC_IRQ(94)
+#define IRQ_DA850_TCERRINT2 DAVINCI_INTC_IRQ(95)
+#define IRQ_DA850_TINT12_3 DAVINCI_INTC_IRQ(96)
+#define IRQ_DA850_TINT34_3 DAVINCI_INTC_IRQ(96)
+#define IRQ_DA850_TINTALL_3 DAVINCI_INTC_IRQ(96)
+#define IRQ_DA850_MCBSP0RINT DAVINCI_INTC_IRQ(97)
+#define IRQ_DA850_MCBSP0XINT DAVINCI_INTC_IRQ(98)
+#define IRQ_DA850_MCBSP1RINT DAVINCI_INTC_IRQ(99)
+#define IRQ_DA850_MCBSP1XINT DAVINCI_INTC_IRQ(100)
#define DA850_N_CP_INTC_IRQ 101
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ
2019-01-31 13:38 ` [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ Bartosz Golaszewski
@ 2019-02-04 22:32 ` David Lechner
2019-02-05 16:17 ` Bartosz Golaszewski
0 siblings, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:32 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This is done in preparation for selecting CONFIG_SPARSE_IRQ. The
> interrupt numbers will then start at the predefined NR_IRQS offset.
>
> For now wrap all interrupt numbers with a macro and define
> DAVINCI_INTC_START to 0. Logically nothing changes for now.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
> diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
> index 03c446635301..14fa668d4e8d 100644
> --- a/arch/arm/mach-davinci/include/mach/irqs.h
> +++ b/arch/arm/mach-davinci/include/mach/irqs.h
> @@ -30,371 +30,374 @@
> /* Base address */
> #define DAVINCI_ARM_INTC_BASE 0x01C48000
>
> +#define DAVINCI_INTC_START 0
> +#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
Almost not worth mentioning, but DAVINCI_INTC_START is only
ever used once, so it could be omitted.
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ
2019-02-04 22:32 ` David Lechner
@ 2019-02-05 16:17 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-05 16:17 UTC (permalink / raw)
To: David Lechner
Cc: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
pon., 4 lut 2019 o 23:32 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > This is done in preparation for selecting CONFIG_SPARSE_IRQ. The
> > interrupt numbers will then start at the predefined NR_IRQS offset.
> >
> > For now wrap all interrupt numbers with a macro and define
> > DAVINCI_INTC_START to 0. Logically nothing changes for now.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > ---
>
> Reviewed-by: David Lechner <david@lechnology.com>
>
> > diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
> > index 03c446635301..14fa668d4e8d 100644
> > --- a/arch/arm/mach-davinci/include/mach/irqs.h
> > +++ b/arch/arm/mach-davinci/include/mach/irqs.h
> > @@ -30,371 +30,374 @@
> > /* Base address */
> > #define DAVINCI_ARM_INTC_BASE 0x01C48000
> >
> > +#define DAVINCI_INTC_START 0
> > +#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
>
> Almost not worth mentioning, but DAVINCI_INTC_START is only
> ever used once, so it could be omitted.
I'd like to leave it here - it's more readable that way.
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 07/35] ARM: davinci: aintc: use irq domain
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (5 preceding siblings ...)
2019-01-31 13:38 ` [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 22:42 ` David Lechner
2019-02-06 15:08 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 08/35] ARM: davinci: select SPARSE_IRQ Bartosz Golaszewski
` (29 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We need to create an irq domain if we want to select SPARSE_IRQ. The
cp-intc driver already supports it, but aintc doesn't. Use the helpers
provided by the generic irq chip abstraction.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/irq.c | 38 ++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index e539bc65d4ef..c874ea269411 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -23,6 +23,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/irqdomain.h>
#include <mach/hardware.h>
#include <mach/cputype.h>
@@ -43,6 +44,7 @@
#define IRQ_INTPRI7_REG_OFFSET 0x004C
static void __iomem *davinci_intc_base;
+static struct irq_domain *davinci_irq_domain;
static inline void davinci_irq_writel(unsigned long value, int offset)
{
@@ -55,17 +57,15 @@ static inline unsigned long davinci_irq_readl(int offset)
}
static __init void
-davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
+davinci_irq_setup_gc(void __iomem *base,
+ unsigned int irq_start, unsigned int num)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
- if (!gc) {
- pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
- __func__, irq_start);
- return;
- }
+ gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
+ gc->reg_base = base;
+ gc->irq_base = irq_start;
ct = gc->chip_types;
ct->chip.irq_ack = irq_gc_ack_set_bit;
@@ -82,13 +82,11 @@ static asmlinkage void __exception_irq_entry
davinci_handle_irq(struct pt_regs *regs)
{
int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
- struct pt_regs *old_regs = set_irq_regs(regs);
irqnr >>= 2;
irqnr -= 1;
- generic_handle_irq(irqnr);
- set_irq_regs(old_regs);
+ handle_domain_irq(davinci_irq_domain, irqnr, regs);
}
/* ARM Interrupt Controller Initialization */
@@ -96,6 +94,7 @@ void __init davinci_irq_init(void)
{
unsigned i, j;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
+ int rv, irq_base;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
if (WARN_ON(!davinci_intc_base))
@@ -131,8 +130,25 @@ void __init davinci_irq_init(void)
davinci_irq_writel(pri, i);
}
+ irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
+ if (WARN_ON(irq_base < 0))
+ return;
+
+ davinci_irq_domain = irq_domain_add_legacy(NULL,
+ davinci_soc_info.intc_irq_num,
+ irq_base, 0, &irq_domain_simple_ops,
+ NULL);
+ if (WARN_ON(!davinci_irq_domain))
+ return;
+
+ rv = irq_alloc_domain_generic_chips(davinci_irq_domain, 32, 1,
+ "AINTC", handle_edge_irq,
+ IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
+ if (WARN_ON(rv))
+ return;
+
for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_alloc_gc(davinci_intc_base + j, i, 32);
+ davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
set_handle_irq(davinci_handle_irq);
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 07/35] ARM: davinci: aintc: use irq domain
2019-01-31 13:39 ` [PATCH 07/35] ARM: davinci: aintc: use irq domain Bartosz Golaszewski
@ 2019-02-04 22:42 ` David Lechner
2019-02-05 16:29 ` Bartosz Golaszewski
2019-02-06 15:08 ` Sekhar Nori
1 sibling, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:42 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> We need to create an irq domain if we want to select SPARSE_IRQ. The
> cp-intc driver already supports it, but aintc doesn't. Use the helpers
> provided by the generic irq chip abstraction.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/irq.c | 38 ++++++++++++++++++++++++++-----------
> 1 file changed, 27 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index e539bc65d4ef..c874ea269411 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -23,6 +23,7 @@
> #include <linux/interrupt.h>
> #include <linux/irq.h>
> #include <linux/io.h>
> +#include <linux/irqdomain.h>
>
> #include <mach/hardware.h>
> #include <mach/cputype.h>
> @@ -43,6 +44,7 @@
> #define IRQ_INTPRI7_REG_OFFSET 0x004C
>
> static void __iomem *davinci_intc_base;
> +static struct irq_domain *davinci_irq_domain;
>
> static inline void davinci_irq_writel(unsigned long value, int offset)
> {
> @@ -55,17 +57,15 @@ static inline unsigned long davinci_irq_readl(int offset)
> }
>
> static __init void
> -davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
> +davinci_irq_setup_gc(void __iomem *base,
> + unsigned int irq_start, unsigned int num)
> {
> struct irq_chip_generic *gc;
> struct irq_chip_type *ct;
>
> - gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
> - if (!gc) {
> - pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
> - __func__, irq_start);
> - return;
> - }
> + gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
check for (gc == NULL) here?
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 07/35] ARM: davinci: aintc: use irq domain
2019-02-04 22:42 ` David Lechner
@ 2019-02-05 16:29 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-05 16:29 UTC (permalink / raw)
To: David Lechner
Cc: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
pon., 4 lut 2019 o 23:42 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > We need to create an irq domain if we want to select SPARSE_IRQ. The
> > cp-intc driver already supports it, but aintc doesn't. Use the helpers
> > provided by the generic irq chip abstraction.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > ---
> > arch/arm/mach-davinci/irq.c | 38 ++++++++++++++++++++++++++-----------
> > 1 file changed, 27 insertions(+), 11 deletions(-)
> >
> > diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> > index e539bc65d4ef..c874ea269411 100644
> > --- a/arch/arm/mach-davinci/irq.c
> > +++ b/arch/arm/mach-davinci/irq.c
> > @@ -23,6 +23,7 @@
> > #include <linux/interrupt.h>
> > #include <linux/irq.h>
> > #include <linux/io.h>
> > +#include <linux/irqdomain.h>
> >
> > #include <mach/hardware.h>
> > #include <mach/cputype.h>
> > @@ -43,6 +44,7 @@
> > #define IRQ_INTPRI7_REG_OFFSET 0x004C
> >
> > static void __iomem *davinci_intc_base;
> > +static struct irq_domain *davinci_irq_domain;
> >
> > static inline void davinci_irq_writel(unsigned long value, int offset)
> > {
> > @@ -55,17 +57,15 @@ static inline unsigned long davinci_irq_readl(int offset)
> > }
> >
> > static __init void
> > -davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
> > +davinci_irq_setup_gc(void __iomem *base,
> > + unsigned int irq_start, unsigned int num)
> > {
> > struct irq_chip_generic *gc;
> > struct irq_chip_type *ct;
> >
> > - gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
> > - if (!gc) {
> > - pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
> > - __func__, irq_start);
> > - return;
> > - }
> > + gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
>
> check for (gc == NULL) here?
>
I can add it, but it's not really needed. We know we pass correct
parameters to this routine and if it fails, the system won't boot
anyway.
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 07/35] ARM: davinci: aintc: use irq domain
2019-01-31 13:39 ` [PATCH 07/35] ARM: davinci: aintc: use irq domain Bartosz Golaszewski
2019-02-04 22:42 ` David Lechner
@ 2019-02-06 15:08 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-06 15:08 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> @@ -82,13 +82,11 @@ static asmlinkage void __exception_irq_entry
> davinci_handle_irq(struct pt_regs *regs)
> {
> int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
> - struct pt_regs *old_regs = set_irq_regs(regs);
>
> irqnr >>= 2;
> irqnr -= 1;
>
> - generic_handle_irq(irqnr);
> - set_irq_regs(old_regs);
> + handle_domain_irq(davinci_irq_domain, irqnr, regs);
> }
Is it possible to bring 2/35 after this patch so you dont end up
removing code added there?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 08/35] ARM: davinci: select SPARSE_IRQ
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (6 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 07/35] ARM: davinci: aintc: use irq domain Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 22:46 ` David Lechner
2019-01-31 13:39 ` [PATCH 09/35] ARM: davinci: aintc: drop GPL license boilerplate Bartosz Golaszewski
` (28 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Everything is in place now for SPARSE_IRQ. Select it and set
DAVINCI_INTC_START to NR_IRQS.
We now need to include mach/irqs.h in a couple places as it is no
longer indirectly included after selecting SPARSE_IRQ.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-davinci/board-da830-evm.c | 1 +
arch/arm/mach-davinci/board-da850-evm.c | 1 +
arch/arm/mach-davinci/board-dm644x-evm.c | 1 +
arch/arm/mach-davinci/devices-da8xx.c | 1 +
arch/arm/mach-davinci/include/mach/irqs.h | 5 +++--
arch/arm/mach-davinci/irq.c | 1 +
7 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f7770fdcad68..1037f49e050f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -595,6 +595,7 @@ config ARCH_DAVINCI
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
select RESET_CONTROLLER
+ select SPARSE_IRQ
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index c4da635ee4ce..41f5a51fee9a 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -36,6 +36,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 44bca048dfd0..317f48560534 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -46,6 +46,7 @@
#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
+#include <mach/irqs.h>
#include "sram.h"
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index b80c4ee76217..16ffed2525e6 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -36,6 +36,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/serial.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index cf78da5ab054..65edd2aa9db5 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -25,6 +25,7 @@
#include <mach/cputype.h>
#include <mach/da8xx.h>
#include <mach/time.h>
+#include <mach/irqs.h>
#include "asp.h"
#include "cpuidle.h"
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 14fa668d4e8d..317cbc42e5cd 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -27,10 +27,12 @@
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
+#include <asm/irq.h>
+
/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000
-#define DAVINCI_INTC_START 0
+#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
/* Interrupt lines */
@@ -404,6 +406,5 @@
/* da850 currently has the most gpio pins (144) */
#define DAVINCI_N_GPIO 144
/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
-#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index c874ea269411..2b8b653aeb98 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 08/35] ARM: davinci: select SPARSE_IRQ
2019-01-31 13:39 ` [PATCH 08/35] ARM: davinci: select SPARSE_IRQ Bartosz Golaszewski
@ 2019-02-04 22:46 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:46 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Everything is in place now for SPARSE_IRQ. Select it and set
> DAVINCI_INTC_START to NR_IRQS.
>
> We now need to include mach/irqs.h in a couple places as it is no
> longer indirectly included after selecting SPARSE_IRQ.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
...
> diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
> index 14fa668d4e8d..317cbc42e5cd 100644
> --- a/arch/arm/mach-davinci/include/mach/irqs.h
> +++ b/arch/arm/mach-davinci/include/mach/irqs.h
> @@ -27,10 +27,12 @@
> #ifndef __ASM_ARCH_IRQS_H
> #define __ASM_ARCH_IRQS_H
>
> +#include <asm/irq.h>
> +
> /* Base address */
> #define DAVINCI_ARM_INTC_BASE 0x01C48000
>
> -#define DAVINCI_INTC_START 0
> +#define DAVINCI_INTC_START NR_IRQS
> #define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
>
> /* Interrupt lines */
> @@ -404,6 +406,5 @@
> /* da850 currently has the most gpio pins (144) */
> #define DAVINCI_N_GPIO 144
> /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
It would make sense to delete this comment in this patch as well
(although it gets deleted later anyway).
> -#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
>
> #endif /* __ASM_ARCH_IRQS_H */
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 09/35] ARM: davinci: aintc: drop GPL license boilerplate
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (7 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 08/35] ARM: davinci: select SPARSE_IRQ Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-01-31 13:39 ` [PATCH 10/35] ARM: davinci: aintc: wrap davinci_irq_init() with a helper Bartosz Golaszewski
` (27 subsequent siblings)
36 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Replace the GPLv2 or later license boilerplate with an SPDX identifier.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/irq.c | 26 ++++++--------------------
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 2b8b653aeb98..b908b4903b9a 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -1,23 +1,9 @@
-/*
- * Interrupt handler for DaVinci boards.
- *
- * Copyright (C) 2006 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+//
+// Copyright (C) 2006, 2019 Texas Instruments.
+//
+// Interrupt handler for DaVinci boards.
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* [PATCH 10/35] ARM: davinci: aintc: wrap davinci_irq_init() with a helper
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (8 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 09/35] ARM: davinci: aintc: drop GPL license boilerplate Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 22:51 ` David Lechner
2019-01-31 13:39 ` [PATCH 11/35] ARM: davinci: aintc: use a common prefix for symbols in the driver Bartosz Golaszewski
` (26 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We're going to extend the davinci_irq_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that don't
take parameters and can be assigned to init_irq.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 4 ++--
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 ++++
arch/arm/mach-davinci/dm355.c | 5 +++++
arch/arm/mach-davinci/dm365.c | 5 +++++
arch/arm/mach-davinci/dm644x.c | 5 +++++
arch/arm/mach-davinci/dm646x.c | 5 +++++
12 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index f7fa960c23e3..3d0303fb792f 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -438,7 +438,7 @@ static __init void dm355_evm_init(void)
MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irqs,
.init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 0fdf1d03eb11..91e9772b9399 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -273,7 +273,7 @@ static __init void dm355_leopard_init(void)
MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irqs,
.init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e3b0b701e395..be1cfcc412f7 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -834,7 +834,7 @@ static __init void dm365_evm_init(void)
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm365_init_irqs,
.init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 16ffed2525e6..f23a29e5116f 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -890,7 +890,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
/* Maintainer: MontaVista Software <source@mvista.com> */
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irqs,
.init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 8d5be6dd2019..ebf07d92224e 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -863,7 +863,7 @@ static __init void evm_init(void)
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irqs,
.init_time = dm646x_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
@@ -873,7 +873,7 @@ MACHINE_END
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irqs,
.init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index efdaa27241c5..fb4c5b3ba8f7 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -231,7 +231,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
/* Maintainer: Neuros Technologies <neuros@groups.google.com> */
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irqs,
.init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 792bb84d5011..2fc6f23285b5 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -153,7 +153,7 @@ static __init void davinci_sffsdr_init(void)
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irqs,
.init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index db4c95ef4d5c..49958cc161d7 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -88,6 +88,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_init(void);
void dm355_init_time(void);
+void dm355_init_irqs(void);
void dm355_register_clocks(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
@@ -97,6 +98,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_init(void);
+void dm365_init_irqs(void);
void dm365_init_time(void);
void dm365_register_clocks(void);
void dm365_init_asp(void);
@@ -110,6 +112,7 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_init(void);
+void dm644x_init_irqs(void);
void dm644x_init_devices(void);
void dm644x_init_time(void);
void dm644x_register_clocks(void);
@@ -119,6 +122,7 @@ int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_init(void);
+void dm646x_init_irqs(void);
void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
void dm646x_register_clocks(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a31f56c70d1d..2795b5ee0069 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -738,6 +738,11 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm355_init_irqs(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm355_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 42b2012d25cc..3222873ff9c6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -995,6 +995,11 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm365_init_irqs(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm365_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index bf7ebdcf6c18..cfc6e2d481d7 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -672,6 +672,11 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm644x_init_irqs(void)
+{
+ davinci_irq_init();
+}
+
void __init dm644x_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 64b4ae5a4202..5cb087f68efe 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -633,6 +633,11 @@ void __init dm646x_register_clocks(void)
platform_device_register(&dm646x_pll2_device);
}
+void __init dm646x_init_irqs(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm646x_init_devices(void)
{
int ret = 0;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 10/35] ARM: davinci: aintc: wrap davinci_irq_init() with a helper
2019-01-31 13:39 ` [PATCH 10/35] ARM: davinci: aintc: wrap davinci_irq_init() with a helper Bartosz Golaszewski
@ 2019-02-04 22:51 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:51 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> We're going to extend the davinci_irq_init() function with a config
> structure so we can drop the intc-related fields from davinci_soc_info.
>
> Once we do it, we won't be able to use this routine directly as the
> init_irq callback. Wrap the calls in additional helpers that don't
> take parameters and can be assigned to init_irq.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
One bikeshed comment: I would use xxx_init_irq instead of xxx_init_irqs
so that the function names exactly match the .init_irq field.
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 11/35] ARM: davinci: aintc: use a common prefix for symbols in the driver
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (9 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 10/35] ARM: davinci: aintc: wrap davinci_irq_init() with a helper Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 22:54 ` David Lechner
2019-01-31 13:39 ` [PATCH 12/35] ARM: davinci: aintc: drop the 00 prefix from register offsets Bartosz Golaszewski
` (25 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 +-
arch/arm/mach-davinci/irq.c | 98 ++++++++++-----------
6 files changed, 54 insertions(+), 54 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 2795b5ee0069..cf574956ce1d 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -740,7 +740,7 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
void __init dm355_init_irqs(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 3222873ff9c6..e63153a6ae41 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -997,7 +997,7 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
void __init dm365_init_irqs(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm365_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cfc6e2d481d7..0904baa1d008 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -674,7 +674,7 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
void __init dm644x_init_irqs(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
void __init dm644x_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 5cb087f68efe..27831d6fc5a5 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -635,7 +635,7 @@ void __init dm646x_register_clocks(void)
void __init dm646x_init_irqs(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 3d45b73b9a64..9cf3a36a802a 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -19,7 +19,7 @@
void davinci_timer_init(struct clk *clk);
-extern void davinci_irq_init(void);
+extern void davinci_aintc_init(void);
struct davinci_timer_instance {
u32 base;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index b908b4903b9a..c43aee686b78 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -18,39 +18,39 @@
#include <asm/mach/irq.h>
#include <asm/exception.h>
-#define FIQ_REG0_OFFSET 0x0000
-#define FIQ_REG1_OFFSET 0x0004
-#define IRQ_REG0_OFFSET 0x0008
-#define IRQ_REG1_OFFSET 0x000C
-#define IRQ_IRQENTRY_OFFSET 0x0014
-#define IRQ_ENT_REG0_OFFSET 0x0018
-#define IRQ_ENT_REG1_OFFSET 0x001C
-#define IRQ_INCTL_REG_OFFSET 0x0020
-#define IRQ_EABASE_REG_OFFSET 0x0024
-#define IRQ_INTPRI0_REG_OFFSET 0x0030
-#define IRQ_INTPRI7_REG_OFFSET 0x004C
-
-static void __iomem *davinci_intc_base;
-static struct irq_domain *davinci_irq_domain;
-
-static inline void davinci_irq_writel(unsigned long value, int offset)
+#define DAVINCI_AINTC_FIQ_REG0 0x0000
+#define DAVINCI_AINTC_FIQ_REG1 0x0004
+#define DAVINCI_AINTC_IRQ_REG0 0x0008
+#define DAVINCI_AINTC_IRQ_REG1 0x000C
+#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
+#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
+#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
+#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
+#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
+#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
+#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
+
+static void __iomem *davinci_aintc_base;
+static struct irq_domain *davinci_aintc_irq_domain;
+
+static inline void davinci_aintc_writel(unsigned long value, int offset)
{
- __raw_writel(value, davinci_intc_base + offset);
+ __raw_writel(value, davinci_aintc_base + offset);
}
-static inline unsigned long davinci_irq_readl(int offset)
+static inline unsigned long davinci_aintc_readl(int offset)
{
- return __raw_readl(davinci_intc_base + offset);
+ return __raw_readl(davinci_aintc_base + offset);
}
static __init void
-davinci_irq_setup_gc(void __iomem *base,
- unsigned int irq_start, unsigned int num)
+davinci_aintc_setup_gc(void __iomem *base,
+ unsigned int irq_start, unsigned int num)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
+ gc = irq_get_domain_generic_chip(davinci_aintc_irq_domain, irq_start);
gc->reg_base = base;
gc->irq_base = irq_start;
@@ -59,84 +59,84 @@ davinci_irq_setup_gc(void __iomem *base,
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
- ct->regs.ack = IRQ_REG0_OFFSET;
- ct->regs.mask = IRQ_ENT_REG0_OFFSET;
+ ct->regs.ack = DAVINCI_AINTC_IRQ_REG0;
+ ct->regs.mask = DAVINCI_AINTC_IRQ_ENT_REG0;
irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
}
static asmlinkage void __exception_irq_entry
-davinci_handle_irq(struct pt_regs *regs)
+davinci_aintc_handle_irq(struct pt_regs *regs)
{
- int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
+ int irqnr = davinci_aintc_readl(DAVINCI_AINTC_IRQ_IRQENTRY);
irqnr >>= 2;
irqnr -= 1;
- handle_domain_irq(davinci_irq_domain, irqnr, regs);
+ handle_domain_irq(davinci_aintc_irq_domain, irqnr, regs);
}
/* ARM Interrupt Controller Initialization */
-void __init davinci_irq_init(void)
+void __init davinci_aintc_init(void)
{
unsigned i, j;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
int rv, irq_base;
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
- if (WARN_ON(!davinci_intc_base))
+ davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
+ if (WARN_ON(!davinci_aintc_base))
return;
/* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
/* Disable all interrupts */
- davinci_irq_writel(0x0, IRQ_ENT_REG0_OFFSET);
- davinci_irq_writel(0x0, IRQ_ENT_REG1_OFFSET);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG0);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG1);
/* Interrupts disabled immediately, IRQ entry reflects all */
- davinci_irq_writel(0x0, IRQ_INCTL_REG_OFFSET);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_INCTL_REG);
/* we don't use the hardware vector table, just its entry addresses */
- davinci_irq_writel(0, IRQ_EABASE_REG_OFFSET);
+ davinci_aintc_writel(0, DAVINCI_AINTC_IRQ_EABASE_REG);
/* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
- for (i = IRQ_INTPRI0_REG_OFFSET; i <= IRQ_INTPRI7_REG_OFFSET; i += 4) {
+ for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) {
u32 pri;
for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_irq_writel(pri, i);
+ davinci_aintc_writel(pri, i);
}
irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
if (WARN_ON(irq_base < 0))
return;
- davinci_irq_domain = irq_domain_add_legacy(NULL,
+ davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
davinci_soc_info.intc_irq_num,
irq_base, 0, &irq_domain_simple_ops,
NULL);
- if (WARN_ON(!davinci_irq_domain))
+ if (WARN_ON(!davinci_aintc_irq_domain))
return;
- rv = irq_alloc_domain_generic_chips(davinci_irq_domain, 32, 1,
+ rv = irq_alloc_domain_generic_chips(davinci_aintc_irq_domain, 32, 1,
"AINTC", handle_edge_irq,
IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
if (WARN_ON(rv))
return;
for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
+ davinci_aintc_setup_gc(davinci_aintc_base + j, irq_base + i, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
- set_handle_irq(davinci_handle_irq);
+ set_handle_irq(davinci_aintc_handle_irq);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* [PATCH 12/35] ARM: davinci: aintc: drop the 00 prefix from register offsets
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (10 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 11/35] ARM: davinci: aintc: use a common prefix for symbols in the driver Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 22:56 ` David Lechner
2019-01-31 13:39 ` [PATCH 13/35] ARM: davinci: aintc: add a new config structure Bartosz Golaszewski
` (24 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Since no offset goes past 0xff - let's drop the 00 prefix for better
readability. While we're at it: convert all hex numbers to lower-case.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/irq.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index c43aee686b78..b31821e89a46 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -18,17 +18,17 @@
#include <asm/mach/irq.h>
#include <asm/exception.h>
-#define DAVINCI_AINTC_FIQ_REG0 0x0000
-#define DAVINCI_AINTC_FIQ_REG1 0x0004
-#define DAVINCI_AINTC_IRQ_REG0 0x0008
-#define DAVINCI_AINTC_IRQ_REG1 0x000C
-#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
-#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
-#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
-#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
-#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
-#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
-#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
+#define DAVINCI_AINTC_FIQ_REG0 0x00
+#define DAVINCI_AINTC_FIQ_REG1 0x04
+#define DAVINCI_AINTC_IRQ_REG0 0x08
+#define DAVINCI_AINTC_IRQ_REG1 0x0c
+#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14
+#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18
+#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c
+#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20
+#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24
+#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30
+#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c
static void __iomem *davinci_aintc_base;
static struct irq_domain *davinci_aintc_irq_domain;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 12/35] ARM: davinci: aintc: drop the 00 prefix from register offsets
2019-01-31 13:39 ` [PATCH 12/35] ARM: davinci: aintc: drop the 00 prefix from register offsets Bartosz Golaszewski
@ 2019-02-04 22:56 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 22:56 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Since no offset goes past 0xff - let's drop the 00 prefix for better
> readability. While we're at it: convert all hex numbers to lower-case.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 13/35] ARM: davinci: aintc: add a new config structure
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (11 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 12/35] ARM: davinci: aintc: drop the 00 prefix from register offsets Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:02 ` David Lechner
2019-02-07 13:33 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 14/35] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Bartosz Golaszewski
` (23 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add a config structure that will be used by aintc-based platforms.
It contains the register range resource, number of interrupts and
a list of priorities.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
include/linux/irqchip/irq-davinci-aintc.h | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 include/linux/irqchip/irq-davinci-aintc.h
diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h
new file mode 100644
index 000000000000..d488e798bbef
--- /dev/null
+++ b/include/linux/irqchip/irq-davinci-aintc.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Texas Instruments
+ */
+
+#ifndef _LINUX_IRQ_DAVINCI_AINTC_
+#define _LINUX_IRQ_DAVINCI_AINTC_
+
+#include <linux/ioport.h>
+
+struct davinci_aintc_config {
+ struct resource reg;
+ unsigned int num_irqs;
+ u8 *prios;
+};
+
+#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 13/35] ARM: davinci: aintc: add a new config structure
2019-01-31 13:39 ` [PATCH 13/35] ARM: davinci: aintc: add a new config structure Bartosz Golaszewski
@ 2019-02-04 23:02 ` David Lechner
2019-02-07 13:33 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:02 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add a config structure that will be used by aintc-based platforms.
> It contains the register range resource, number of interrupts and
> a list of priorities.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> include/linux/irqchip/irq-davinci-aintc.h | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
> create mode 100644 include/linux/irqchip/irq-davinci-aintc.h
>
> diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h
> new file mode 100644
> index 000000000000..d488e798bbef
> --- /dev/null
> +++ b/include/linux/irqchip/irq-davinci-aintc.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
GPL-2.0-or-later ?
> +/*
> + * Copyright (C) 2019 Texas Instruments
> + */
> +
> +#ifndef _LINUX_IRQ_DAVINCI_AINTC_
> +#define _LINUX_IRQ_DAVINCI_AINTC_
> +
> +#include <linux/ioport.h>
> +
doc comment would be nice here, especially to say that "prios"
is short for priorities and that the length of the array is
num_irqs.
> +struct davinci_aintc_config {
> + struct resource reg;
> + unsigned int num_irqs;
> + u8 *prios;
> +};
> +
> +#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
>
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 13/35] ARM: davinci: aintc: add a new config structure
2019-01-31 13:39 ` [PATCH 13/35] ARM: davinci: aintc: add a new config structure Bartosz Golaszewski
2019-02-04 23:02 ` David Lechner
@ 2019-02-07 13:33 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 13:33 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add a config structure that will be used by aintc-based platforms.
> It contains the register range resource, number of interrupts and
> a list of priorities.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Subject prefix needs to be adjusted (not a mach-davinci patch)
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 14/35] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (12 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 13/35] ARM: davinci: aintc: add a new config structure Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:09 ` David Lechner
2019-01-31 13:39 ` [PATCH 15/35] ARM: davinci: aintc: use the new config structure Bartosz Golaszewski
` (22 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add the new-style config structures for dm* SoCs. They will be used
once we make the aintc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/dm355.c | 11 +++++++++++
arch/arm/mach-davinci/dm365.c | 11 +++++++++++
arch/arm/mach-davinci/dm644x.c | 11 +++++++++++
arch/arm/mach-davinci/dm646x.c | 11 +++++++++++
4 files changed, 44 insertions(+)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index cf574956ce1d..0dcfcbec522a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/spi-davinci.h>
@@ -738,6 +739,16 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm355_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm355_aintc_prios,
+};
+
void __init dm355_init_irqs(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index e63153a6ae41..1878c97e5df5 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -19,6 +19,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/keyscan-davinci.h>
@@ -995,6 +996,16 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm365_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm365_aintc_prios,
+};
+
void __init dm365_init_irqs(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 0904baa1d008..5c48a5e4090b 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -14,6 +14,7 @@
#include <linux/clkdev.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -672,6 +673,16 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm644x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm644x_aintc_prios,
+};
+
void __init dm644x_init_irqs(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 27831d6fc5a5..e06ea3b61011 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -633,6 +634,16 @@ void __init dm646x_register_clocks(void)
platform_device_register(&dm646x_pll2_device);
}
+static const struct davinci_aintc_config dm646x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm646x_aintc_prios,
+};
+
void __init dm646x_init_irqs(void)
{
davinci_aintc_init();
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 14/35] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs
2019-01-31 13:39 ` [PATCH 14/35] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Bartosz Golaszewski
@ 2019-02-04 23:09 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:09 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add the new-style config structures for dm* SoCs. They will be used
> once we make the aintc driver stop using davinci_soc_info.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/dm355.c | 11 +++++++++++
> arch/arm/mach-davinci/dm365.c | 11 +++++++++++
> arch/arm/mach-davinci/dm644x.c | 11 +++++++++++
> arch/arm/mach-davinci/dm646x.c | 11 +++++++++++
> 4 files changed, 44 insertions(+)
>
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index cf574956ce1d..0dcfcbec522a 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -15,6 +15,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> #include <linux/platform_data/spi-davinci.h>
> @@ -738,6 +739,16 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
> return 0;
> }
>
> +static const struct davinci_aintc_config dm355_aintc_config = {
> + .reg = {
> + .start = DAVINCI_ARM_INTC_BASE,
> + .end = DAVINCI_ARM_INTC_BASE + SZ_4K,
missing a minus 1 after SZ_4K?
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
(repeated 3 more times below)
> + .flags = IORESOURCE_MEM,
> + },
> + .num_irqs = 64,
> + .prios = dm355_aintc_prios,
> +};
> +
> void __init dm355_init_irqs(void)
> {
> davinci_aintc_init();
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 15/35] ARM: davinci: aintc: use the new config structure
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (13 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 14/35] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:29 ` David Lechner
2019-01-31 13:39 ` [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c Bartosz Golaszewski
` (21 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Modify the aintc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h
and make it take the new config structure as parameter. Convert all
users to the new version.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 --
arch/arm/mach-davinci/irq.c | 35 ++++++++++++---------
include/linux/irqchip/irq-davinci-aintc.h | 2 ++
7 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 0dcfcbec522a..a0bfb3602136 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -751,7 +751,7 @@ static const struct davinci_aintc_config dm355_aintc_config = {
void __init dm355_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm355_aintc_config);
}
static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1878c97e5df5..eab575873255 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1008,7 +1008,7 @@ static const struct davinci_aintc_config dm365_aintc_config = {
void __init dm365_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm365_aintc_config);
}
static int __init dm365_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 5c48a5e4090b..24ad7a09aa15 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -685,7 +685,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = {
void __init dm644x_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm644x_aintc_config);
}
void __init dm644x_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index e06ea3b61011..ab02cc93813a 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -646,7 +646,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = {
void __init dm646x_init_irqs(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm646x_aintc_config);
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 9cf3a36a802a..9e06974c85bb 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -19,8 +19,6 @@
void davinci_timer_init(struct clk *clk);
-extern void davinci_aintc_init(void);
-
struct davinci_timer_instance {
u32 base;
u32 bottom_irq;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index b31821e89a46..d67f443a471d 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -8,6 +8,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
@@ -77,13 +78,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs)
}
/* ARM Interrupt Controller Initialization */
-void __init davinci_aintc_init(void)
+void __init davinci_aintc_init(const struct davinci_aintc_config *config)
{
- unsigned i, j;
- const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
+ unsigned int irq_off, reg_off, prio, shift;
int rv, irq_base;
+ const u8 *prios;
- davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
+ davinci_aintc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_aintc_base))
return;
@@ -109,22 +111,22 @@ void __init davinci_aintc_init(void)
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
- for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) {
- u32 pri;
+ prios = config->prios;
- for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
- pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_aintc_writel(pri, i);
+ for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG;
+ reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) {
+ for (shift = 0, prio = 0; shift < 32; shift += 4, prios++)
+ prio |= (*prios & 0x07) << shift;
+ davinci_aintc_writel(prio, reg_off);
}
- irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (WARN_ON(irq_base < 0))
return;
davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
- davinci_soc_info.intc_irq_num,
- irq_base, 0, &irq_domain_simple_ops,
- NULL);
+ config->num_irqs, irq_base, 0,
+ &irq_domain_simple_ops, NULL);
if (WARN_ON(!davinci_aintc_irq_domain))
return;
@@ -134,8 +136,11 @@ void __init davinci_aintc_init(void)
if (WARN_ON(rv))
return;
- for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_aintc_setup_gc(davinci_aintc_base + j, irq_base + i, 32);
+ for (irq_off = 0, reg_off = 0;
+ irq_off < config->num_irqs;
+ irq_off += 32, reg_off += 0x04)
+ davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
+ irq_base + irq_off, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
set_handle_irq(davinci_aintc_handle_irq);
diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h
index d488e798bbef..cc851d58f07f 100644
--- a/include/linux/irqchip/irq-davinci-aintc.h
+++ b/include/linux/irqchip/irq-davinci-aintc.h
@@ -14,4 +14,6 @@ struct davinci_aintc_config {
u8 *prios;
};
+void davinci_aintc_init(const struct davinci_aintc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 15/35] ARM: davinci: aintc: use the new config structure
2019-01-31 13:39 ` [PATCH 15/35] ARM: davinci: aintc: use the new config structure Bartosz Golaszewski
@ 2019-02-04 23:29 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:29 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Modify the aintc driver to take all its configuration from the new
> config structure. Stop referencing davinci_soc_info in any way.
> Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h
> and make it take the new config structure as parameter. Convert all
> users to the new version.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (14 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 15/35] ARM: davinci: aintc: use the new config structure Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:36 ` David Lechner
2019-02-07 12:21 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 17/35] ARM: davinci: aintc: remove unnecessary includes Bartosz Golaszewski
` (20 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
I've been unable to figure out exactly why, but it seems that the
IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
level irq, not edge like all others.
This timer is used by the dsp on dm64* boards only.
Let's move the handler setup out of the aintc driver where it's lived
since the beginning and into the dm64* SoC-specific files where it
belongs.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/dm644x.c | 4 ++++
arch/arm/mach-davinci/dm646x.c | 4 ++++
arch/arm/mach-davinci/irq.c | 1 -
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 24ad7a09aa15..beb97101c881 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -14,6 +14,7 @@
#include <linux/clkdev.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -616,6 +617,9 @@ void __init dm644x_init_time(void)
void __iomem *pll1, *psc;
struct clk *clk;
+ /* Needed by the dsp. */
+ irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index ab02cc93813a..70505c92d5fb 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -599,6 +600,9 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
void __iomem *pll1, *psc;
struct clk *clk;
+ /* Needed by the dsp. */
+ irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index d67f443a471d..2e114ad83adc 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -142,6 +142,5 @@ void __init davinci_aintc_init(const struct davinci_aintc_config *config)
davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
irq_base + irq_off, 32);
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
set_handle_irq(davinci_aintc_handle_irq);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c
2019-01-31 13:39 ` [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c Bartosz Golaszewski
@ 2019-02-04 23:36 ` David Lechner
2019-02-07 12:21 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:36 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> I've been unable to figure out exactly why, but it seems that the
> IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
> level irq, not edge like all others.
>
> This timer is used by the dsp on dm64* boards only.
>
> Let's move the handler setup out of the aintc driver where it's lived
> since the beginning and into the dm64* SoC-specific files where it
> belongs.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/dm644x.c | 4 ++++
> arch/arm/mach-davinci/dm646x.c | 4 ++++
> arch/arm/mach-davinci/irq.c | 1 -
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 24ad7a09aa15..beb97101c881 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -14,6 +14,7 @@
> #include <linux/clkdev.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irq.h>
> #include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> @@ -616,6 +617,9 @@ void __init dm644x_init_time(void)
> void __iomem *pll1, *psc;
> struct clk *clk;
>
> + /* Needed by the dsp. */
> + irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
Does this actually need to be called before the clocks are inited?
If not, it would seem more logical to have this right before
davinci_timer_init().
Also, since the IRQ_TINT1_TINT34 macro is removed later, the comment
could do a better job explaining what it is doing.
> +
> clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
>
> pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index ab02cc93813a..70505c92d5fb 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -15,6 +15,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irq.h>
> #include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> @@ -599,6 +600,9 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
> void __iomem *pll1, *psc;
> struct clk *clk;
>
> + /* Needed by the dsp. */
> + irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
same here.
> +
> clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
> clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
>
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index d67f443a471d..2e114ad83adc 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -142,6 +142,5 @@ void __init davinci_aintc_init(const struct davinci_aintc_config *config)
> davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
> irq_base + irq_off, 32);
>
> - irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
> set_handle_irq(davinci_aintc_handle_irq);
> }
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c
2019-01-31 13:39 ` [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c Bartosz Golaszewski
2019-02-04 23:36 ` David Lechner
@ 2019-02-07 12:21 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 12:21 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> I've been unable to figure out exactly why, but it seems that the
> IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
> level irq, not edge like all others.
Not sure of the history myself. This has been this way since beginning
of DaVinci support in kernel.
>
> This timer is used by the dsp on dm64* boards only.
This would be T1_TOP in code, which is actually marked as unused. T1_BOT
is the one used for DSPs.
>
> Let's move the handler setup out of the aintc driver where it's lived
> since the beginning and into the dm64* SoC-specific files where it
> belongs.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/dm644x.c | 4 ++++
> arch/arm/mach-davinci/dm646x.c | 4 ++++
> arch/arm/mach-davinci/irq.c | 1 -
I think this should be done for DM355 too?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 17/35] ARM: davinci: aintc: remove unnecessary includes
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (15 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:37 ` David Lechner
2019-01-31 13:39 ` [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip Bartosz Golaszewski
` (19 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
These includes are no longer required. Remove them.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/irq.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 2e114ad83adc..ce4625d9cad7 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -12,11 +12,6 @@
#include <linux/io.h>
#include <linux/irqdomain.h>
-#include <mach/hardware.h>
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
-#include <asm/mach/irq.h>
#include <asm/exception.h>
#define DAVINCI_AINTC_FIQ_REG0 0x00
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (16 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 17/35] ARM: davinci: aintc: remove unnecessary includes Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:43 ` David Lechner
2019-01-31 13:39 ` [PATCH 19/35] ARM: davinci: cp-intc: remove cp_intc.h Bartosz Golaszewski
` (18 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The aintc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs. There's no device-tree support for any dm* board so
there's no IRQCHIP_OF_DECLARE() - there's only the exported init
function called from machine code.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/Kconfig | 11 ++++-------
arch/arm/mach-davinci/Makefile | 1 -
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 1 +
.../irq.c => drivers/irqchip/irq-davinci-aintc.c | 0
5 files changed, 10 insertions(+), 8 deletions(-)
rename arch/arm/mach-davinci/irq.c => drivers/irqchip/irq-davinci-aintc.c (100%)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index da8a039d65f9..71a4d875dd39 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -1,9 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
if ARCH_DAVINCI
-config AINTC
- bool
-
config CP_INTC
bool
select IRQ_DOMAIN
@@ -17,17 +14,17 @@ comment "DaVinci Core Type"
config ARCH_DAVINCI_DM644x
bool "DaVinci 644x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM355
bool "DaVinci 355 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM646x
bool "DaVinci 646x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DA830
@@ -49,7 +46,7 @@ config ARCH_DAVINCI_DA8XX
config ARCH_DAVINCI_DM365
bool "DaVinci 365 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
comment "DaVinci Board Type"
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 93d271b4d84b..983865a99616 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o
obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_AINTC) += irq.o
obj-$(CONFIG_CP_INTC) += cp_intc.o
# Board specific
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 3d1e60779078..ea0eb82bf1d2 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -129,6 +129,11 @@ config BRCMSTB_L2_IRQ
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
+config DAVINCI_AINTC
+ bool
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
config DW_APB_ICTL
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c93713d24b86..623e0ec5f9d0 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
+obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
diff --git a/arch/arm/mach-davinci/irq.c b/drivers/irqchip/irq-davinci-aintc.c
similarity index 100%
rename from arch/arm/mach-davinci/irq.c
rename to drivers/irqchip/irq-davinci-aintc.c
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip
2019-01-31 13:39 ` [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip Bartosz Golaszewski
@ 2019-02-04 23:43 ` David Lechner
2019-02-08 16:03 ` Bartosz Golaszewski
0 siblings, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:43 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> The aintc driver has now been cleaned up. Move it to drivers/irqchip
> where it belongs. There's no device-tree support for any dm* board so
> there's no IRQCHIP_OF_DECLARE() - there's only the exported init
> function called from machine code.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 3d1e60779078..ea0eb82bf1d2 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -129,6 +129,11 @@ config BRCMSTB_L2_IRQ
> select GENERIC_IRQ_CHIP
> select IRQ_DOMAIN
>
> +config DAVINCI_AINTC
> + bool
> + select GENERIC_IRQ_CHIP
> + select IRQ_DOMAIN
No help section? :-)
> +
> config DW_APB_ICTL
> bool
> select GENERIC_IRQ_CHIP
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip
2019-02-04 23:43 ` David Lechner
@ 2019-02-08 16:03 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-08 16:03 UTC (permalink / raw)
To: David Lechner
Cc: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
wt., 5 lut 2019 o 00:43 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > The aintc driver has now been cleaned up. Move it to drivers/irqchip
> > where it belongs. There's no device-tree support for any dm* board so
> > there's no IRQCHIP_OF_DECLARE() - there's only the exported init
> > function called from machine code.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > ---
>
> Reviewed-by: David Lechner <david@lechnology.com>
>
>
> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> > index 3d1e60779078..ea0eb82bf1d2 100644
> > --- a/drivers/irqchip/Kconfig
> > +++ b/drivers/irqchip/Kconfig
> > @@ -129,6 +129,11 @@ config BRCMSTB_L2_IRQ
> > select GENERIC_IRQ_CHIP
> > select IRQ_DOMAIN
> >
> > +config DAVINCI_AINTC
> > + bool
> > + select GENERIC_IRQ_CHIP
> > + select IRQ_DOMAIN
>
> No help section? :-)
>
Most Kconfig options that cannot be interactively selected don't have one.
I'll leave it as is.
Bart
> > +
> > config DW_APB_ICTL
> > bool
> > select GENERIC_IRQ_CHIP
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 19/35] ARM: davinci: cp-intc: remove cp_intc.h
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (17 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 18/35] irqchip: davinci-aintc: move the driver to drivers/irqchip Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:48 ` David Lechner
2019-01-31 13:39 ` [PATCH 20/35] ARM: davinci: cp-intc: add a wrapper around cp_intc_init() Bartosz Golaszewski
` (17 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
There's no need to have a local header for cp-intc. Move the only
declaration for a public function to common.h. Move all register
offsets into the driver source file and drop all unused defines.
Make cp_intc_of_init() static.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 1 -
arch/arm/mach-davinci/board-da850-evm.c | 1 -
arch/arm/mach-davinci/board-mityomapl138.c | 1 -
arch/arm/mach-davinci/board-omapl138-hawk.c | 1 -
arch/arm/mach-davinci/cp_intc.c | 20 +++++++-
arch/arm/mach-davinci/cp_intc.h | 57 ---------------------
arch/arm/mach-davinci/include/mach/common.h | 1 +
7 files changed, 19 insertions(+), 63 deletions(-)
delete mode 100644 arch/arm/mach-davinci/cp_intc.h
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 41f5a51fee9a..4c1836fa654e 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -37,7 +37,6 @@
#include <mach/common.h>
#include <mach/irqs.h>
-#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 317f48560534..548a3c351c02 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -43,7 +43,6 @@
#include <linux/spi/flash.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 8df16e81b69e..eb6a9465f229 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -27,7 +27,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 94c4f126ef86..7f852722ff08 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -27,7 +27,6 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 384b72fbefca..817b7616753c 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -21,7 +21,22 @@
#include <asm/exception.h>
#include <mach/common.h>
-#include "cp_intc.h"
+
+#define CP_INTC_CTRL 0x04
+#define CP_INTC_HOST_CTRL 0x0C
+#define CP_INTC_GLOBAL_ENABLE 0x10
+#define CP_INTC_SYS_STAT_IDX_CLR 0x24
+#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
+#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
+#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
+#define CP_INTC_PRIO_IDX 0x80
+#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
+#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
+#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
+#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
+#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
static void __iomem *davinci_intc_base;
@@ -126,7 +141,8 @@ static const struct irq_domain_ops cp_intc_host_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
-int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
+static int __init cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
diff --git a/arch/arm/mach-davinci/cp_intc.h b/arch/arm/mach-davinci/cp_intc.h
deleted file mode 100644
index 827bbe9baed4..000000000000
--- a/arch/arm/mach-davinci/cp_intc.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) definitions
- *
- * Author: Steve Chen <schen@mvista.com>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#ifndef __ASM_HARDWARE_CP_INTC_H
-#define __ASM_HARDWARE_CP_INTC_H
-
-#define CP_INTC_REV 0x00
-#define CP_INTC_CTRL 0x04
-#define CP_INTC_HOST_CTRL 0x0C
-#define CP_INTC_GLOBAL_ENABLE 0x10
-#define CP_INTC_GLOBAL_NESTING_LEVEL 0x1C
-#define CP_INTC_SYS_STAT_IDX_SET 0x20
-#define CP_INTC_SYS_STAT_IDX_CLR 0x24
-#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
-#define CP_INTC_GLOBAL_WAKEUP_ENABLE 0x30
-#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
-#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
-#define CP_INTC_PACING_PRESCALE 0x40
-#define CP_INTC_VECTOR_BASE 0x50
-#define CP_INTC_VECTOR_SIZE 0x54
-#define CP_INTC_VECTOR_NULL 0x58
-#define CP_INTC_PRIO_IDX 0x80
-#define CP_INTC_PRIO_VECTOR 0x84
-#define CP_INTC_SECURE_ENABLE 0x90
-#define CP_INTC_SECURE_PRIO_IDX 0x94
-#define CP_INTC_PACING_PARAM(n) (0x0100 + (n << 4))
-#define CP_INTC_PACING_DEC(n) (0x0104 + (n << 4))
-#define CP_INTC_PACING_MAP(n) (0x0108 + (n << 4))
-#define CP_INTC_SYS_RAW_STAT(n) (0x0200 + (n << 2))
-#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
-#define CP_INTC_SYS_ENABLE_SET(n) (0x0300 + (n << 2))
-#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
-#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define CP_INTC_HOST_MAP(n) (0x0800 + (n << 2))
-#define CP_INTC_HOST_PRIO_IDX(n) (0x0900 + (n << 2))
-#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
-#define CP_INTC_WAKEUP_ENABLE(n) (0x0E00 + (n << 2))
-#define CP_INTC_DEBUG_SELECT(n) (0x0F00 + (n << 2))
-#define CP_INTC_SYS_SECURE_ENABLE(n) (0x1000 + (n << 2))
-#define CP_INTC_HOST_NESTING_LEVEL(n) (0x1100 + (n << 2))
-#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
-#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
-#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
-
-void cp_intc_init(void);
-int cp_intc_of_init(struct device_node *, struct device_node *);
-
-#endif /* __ASM_HARDWARE_CP_INTC_H */
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 9e06974c85bb..4177a71db64c 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,6 +17,7 @@
#include <linux/types.h>
#include <linux/reboot.h>
+void cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 19/35] ARM: davinci: cp-intc: remove cp_intc.h
2019-01-31 13:39 ` [PATCH 19/35] ARM: davinci: cp-intc: remove cp_intc.h Bartosz Golaszewski
@ 2019-02-04 23:48 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:48 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> There's no need to have a local header for cp-intc. Move the only
> declaration for a public function to common.h. Move all register
> offsets into the driver source file and drop all unused defines.
> Make cp_intc_of_init() static.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 20/35] ARM: davinci: cp-intc: add a wrapper around cp_intc_init()
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (18 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 19/35] ARM: davinci: cp-intc: remove cp_intc.h Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:50 ` David Lechner
2019-01-31 13:39 ` [PATCH 21/35] ARM: davinci: cp-intc: add a new config structure Bartosz Golaszewski
` (16 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We're going to extend the cp_intc_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that don't
take parameters and can be assigned to init_irq.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/da830.c | 5 +++++
arch/arm/mach-davinci/da850.c | 5 +++++
arch/arm/mach-davinci/include/mach/da8xx.h | 2 ++
7 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 4c1836fa654e..b3a0148f7f1a 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -693,7 +693,7 @@ static void __init da830_evm_map_io(void)
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da830_init_irqs,
.init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 548a3c351c02..efc9a33da6e1 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1521,7 +1521,7 @@ static void __init da850_evm_map_io(void)
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irqs,
.init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index eb6a9465f229..59a6f5db4222 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -623,7 +623,7 @@ static void __init mityomapl138_map_io(void)
MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irqs,
.init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 7f852722ff08..af6580ce71eb 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -461,7 +461,7 @@ static void __init omapl138_hawk_map_io(void)
MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irqs,
.init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index f1e7b6c644e5..8b9220badef5 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -742,6 +742,11 @@ void __init da830_init(void)
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+void __init da830_init_irqs(void)
+{
+ cp_intc_init();
+}
+
void __init da830_init_time(void)
{
void __iomem *pll;
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 40b90730e847..9f48e1ac61fb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -671,6 +671,11 @@ void __init da850_init(void)
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
+void __init da850_init_irqs(void)
+{
+ cp_intc_init();
+}
+
void __init da850_init_time(void)
{
void __iomem *pll0;
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index ab4a57f433f4..a5b4b1b964fd 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -88,10 +88,12 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
+void da830_init_irqs(void);
void da830_init_time(void);
void da830_register_clocks(void);
void da850_init(void);
+void da850_init_irqs(void);
void da850_init_time(void);
void da850_register_clocks(void);
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 20/35] ARM: davinci: cp-intc: add a wrapper around cp_intc_init()
2019-01-31 13:39 ` [PATCH 20/35] ARM: davinci: cp-intc: add a wrapper around cp_intc_init() Bartosz Golaszewski
@ 2019-02-04 23:50 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:50 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> We're going to extend the cp_intc_init() function with a config
> structure so we can drop the intc-related fields from davinci_soc_info.
>
> Once we do it, we won't be able to use this routine directly as the
> init_irq callback. Wrap the calls in additional helpers that don't
> take parameters and can be assigned to init_irq.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
Also, same bikeshed comment about xxx_init_irq vs. xxx_init_irqs.
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 21/35] ARM: davinci: cp-intc: add a new config structure
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (19 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 20/35] ARM: davinci: cp-intc: add a wrapper around cp_intc_init() Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:54 ` David Lechner
2019-01-31 13:39 ` [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs Bartosz Golaszewski
` (15 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add a config structure that will be used by cp-intc-based platforms.
It contains the register range resource and the number of interrupts.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
include/linux/irqchip/irq-davinci-cp-intc.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 include/linux/irqchip/irq-davinci-cp-intc.h
diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
new file mode 100644
index 000000000000..9b0c7d6189eb
--- /dev/null
+++ b/include/linux/irqchip/irq-davinci-cp-intc.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Texas Instruments
+ */
+
+#ifndef _LINUX_IRQ_DAVINCI_CP_INTC_
+#define _LINUX_IRQ_DAVINCI_CP_INTC_
+
+#include <linux/ioport.h>
+
+struct davinci_cp_intc_config {
+ struct resource reg;
+ unsigned int num_irqs;
+};
+
+#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 21/35] ARM: davinci: cp-intc: add a new config structure
2019-01-31 13:39 ` [PATCH 21/35] ARM: davinci: cp-intc: add a new config structure Bartosz Golaszewski
@ 2019-02-04 23:54 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:54 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
subject should probably be irqchip: rather than ARM:
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add a config structure that will be used by cp-intc-based platforms.
> It contains the register range resource and the number of interrupts.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> include/linux/irqchip/irq-davinci-cp-intc.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 include/linux/irqchip/irq-davinci-cp-intc.h
>
> diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
> new file mode 100644
> index 000000000000..9b0c7d6189eb
> --- /dev/null
> +++ b/include/linux/irqchip/irq-davinci-cp-intc.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
GPL-2.0-or-later ?
> +/*
> + * Copyright (C) 2019 Texas Instruments
> + */
> +
> +#ifndef _LINUX_IRQ_DAVINCI_CP_INTC_
> +#define _LINUX_IRQ_DAVINCI_CP_INTC_
> +
> +#include <linux/ioport.h>
> +
> +struct davinci_cp_intc_config {
> + struct resource reg;
> + unsigned int num_irqs;
> +};
> +
> +#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (20 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 21/35] ARM: davinci: cp-intc: add a new config structure Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-04 23:58 ` David Lechner
2019-02-07 13:35 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols Bartosz Golaszewski
` (14 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add the new-style config structures for dm* SoCs. They will be used
once we make the cp-intc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da830.c | 10 ++++++++++
arch/arm/mach-davinci/da850.c | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 8b9220badef5..6d3da4364f7a 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -12,6 +12,7 @@
#include <linux/clk/davinci.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/platform_data/gpio-davinci.h>
#include <asm/mach/map.h>
@@ -742,6 +743,15 @@ void __init da830_init(void)
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+static const struct davinci_cp_intc_config da830_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA830_N_CP_INTC_IRQ,
+};
+
void __init da830_init_irqs(void)
{
cp_intc_init();
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9f48e1ac61fb..5e7f2c962abf 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -18,6 +18,7 @@
#include <linux/cpufreq.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/mfd/da8xx-cfgchip.h>
#include <linux/platform_data/clk-da8xx-cfgchip.h>
#include <linux/platform_data/clk-davinci-pll.h>
@@ -671,6 +672,15 @@ void __init da850_init(void)
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
+static const struct davinci_cp_intc_config da850_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA850_N_CP_INTC_IRQ,
+};
+
void __init da850_init_irqs(void)
{
cp_intc_init();
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs
2019-01-31 13:39 ` [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs Bartosz Golaszewski
@ 2019-02-04 23:58 ` David Lechner
2019-02-07 13:35 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-04 23:58 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add the new-style config structures for dm* SoCs. They will be used
> once we make the cp-intc driver stop using davinci_soc_info.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/da830.c | 10 ++++++++++
> arch/arm/mach-davinci/da850.c | 10 ++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
> index 8b9220badef5..6d3da4364f7a 100644
> --- a/arch/arm/mach-davinci/da830.c
> +++ b/arch/arm/mach-davinci/da830.c
> @@ -12,6 +12,7 @@
> #include <linux/clk/davinci.h>
> #include <linux/gpio.h>
> #include <linux/init.h>
> +#include <linux/irqchip/irq-davinci-cp-intc.h>
> #include <linux/platform_data/gpio-davinci.h>
>
> #include <asm/mach/map.h>
> @@ -742,6 +743,15 @@ void __init da830_init(void)
> WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
> }
>
> +static const struct davinci_cp_intc_config da830_cp_intc_config = {
> + .reg = {
> + .start = DA8XX_CP_INTC_BASE,
> + .end = DA8XX_CP_INTC_BASE + SZ_8K,
Missing minus one?
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + .num_irqs = DA830_N_CP_INTC_IRQ,
> +};
> +
> void __init da830_init_irqs(void)
> {
> cp_intc_init();
> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index 9f48e1ac61fb..5e7f2c962abf 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -18,6 +18,7 @@
> #include <linux/cpufreq.h>
> #include <linux/gpio.h>
> #include <linux/init.h>
> +#include <linux/irqchip/irq-davinci-cp-intc.h>
> #include <linux/mfd/da8xx-cfgchip.h>
> #include <linux/platform_data/clk-da8xx-cfgchip.h>
> #include <linux/platform_data/clk-davinci-pll.h>
> @@ -671,6 +672,15 @@ void __init da850_init(void)
> WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
> }
>
> +static const struct davinci_cp_intc_config da850_cp_intc_config = {
> + .reg = {
> + .start = DA8XX_CP_INTC_BASE,
> + .end = DA8XX_CP_INTC_BASE + SZ_8K,
same here
> + .flags = IORESOURCE_MEM,
> + },
> + .num_irqs = DA850_N_CP_INTC_IRQ,
> +};
> +
> void __init da850_init_irqs(void)
> {
> cp_intc_init();
>
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs
2019-01-31 13:39 ` [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs Bartosz Golaszewski
2019-02-04 23:58 ` David Lechner
@ 2019-02-07 13:35 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 13:35 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Add the new-style config structures for dm* SoCs. They will be used
da* SoCs.
> once we make the cp-intc driver stop using davinci_soc_info.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/da830.c | 10 ++++++++++
> arch/arm/mach-davinci/da850.c | 10 ++++++++++
> 2 files changed, 20 insertions(+)
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (21 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 22/35] ARM: davinci: cp-intc: add the new config structures for da8xx SoCs Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:01 ` David Lechner
2019-02-07 13:43 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 24/35] ARM: davinci: cp-intc: convert all hex numbers to lowercase Bartosz Golaszewski
` (13 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 143 ++++++++++----------
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 +-
4 files changed, 77 insertions(+), 72 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 817b7616753c..3a99a3146d8e 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -22,60 +22,65 @@
#include <asm/exception.h>
#include <mach/common.h>
-#define CP_INTC_CTRL 0x04
-#define CP_INTC_HOST_CTRL 0x0C
-#define CP_INTC_GLOBAL_ENABLE 0x10
-#define CP_INTC_SYS_STAT_IDX_CLR 0x24
-#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
-#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
-#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
-#define CP_INTC_PRIO_IDX 0x80
-#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
-#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
-#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
-#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
-
-static void __iomem *davinci_intc_base;
-
-static inline unsigned int cp_intc_read(unsigned offset)
+#define DAVINCI_CP_INTC_CTRL 0x04
+#define DAVINCI_CP_INTC_HOST_CTRL 0x0C
+#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
+#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
+#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
+#define DAVINCI_CP_INTC_PRIO_IDX 0x80
+#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
+#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
+
+static void __iomem *davinci_cp_intc_base;
+static struct irq_domain *davinci_cp_intc_irq_domain;
+
+static inline unsigned int davinci_cp_intc_read(unsigned int offset)
{
- return __raw_readl(davinci_intc_base + offset);
+ return __raw_readl(davinci_cp_intc_base + offset);
}
-static inline void cp_intc_write(unsigned long value, unsigned offset)
+static inline void davinci_cp_intc_write(unsigned long value,
+ unsigned int offset)
{
- __raw_writel(value, davinci_intc_base + offset);
+ __raw_writel(value, davinci_cp_intc_base + offset);
}
-static void cp_intc_ack_irq(struct irq_data *d)
+static void davinci_cp_intc_ack_irq(struct irq_data *d)
{
- cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
}
/* Disable interrupt */
-static void cp_intc_mask_irq(struct irq_data *d)
+static void davinci_cp_intc_mask_irq(struct irq_data *d)
{
/* XXX don't know why we need to disable nIRQ here... */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR);
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
}
/* Enable interrupt */
static void cp_intc_unmask_irq(struct irq_data *d)
{
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
}
-static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
+static int davinci_cp_intc_set_irq_type(struct irq_data *d,
+ unsigned int flow_type)
{
unsigned reg = BIT_WORD(d->hwirq);
unsigned mask = BIT_MASK(d->hwirq);
- unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
- unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
+ unsigned polarity = davinci_cp_intc_read(
+ DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ unsigned type = davinci_cp_intc_read(
+ DAVINCI_CP_INTC_SYS_TYPE(reg));
switch (flow_type) {
case IRQ_TYPE_EDGE_RISING:
@@ -98,51 +103,49 @@ static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
return -EINVAL;
}
- cp_intc_write(polarity, CP_INTC_SYS_POLARITY(reg));
- cp_intc_write(type, CP_INTC_SYS_TYPE(reg));
+ davinci_cp_intc_write(polarity, DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ davinci_cp_intc_write(type, DAVINCI_CP_INTC_SYS_TYPE(reg));
return 0;
}
-static struct irq_chip cp_intc_irq_chip = {
+static struct irq_chip davinci_cp_intc_irq_chip = {
.name = "cp_intc",
- .irq_ack = cp_intc_ack_irq,
- .irq_mask = cp_intc_mask_irq,
+ .irq_ack = davinci_cp_intc_ack_irq,
+ .irq_mask = davinci_cp_intc_mask_irq,
.irq_unmask = cp_intc_unmask_irq,
- .irq_set_type = cp_intc_set_irq_type,
+ .irq_set_type = davinci_cp_intc_set_irq_type,
.flags = IRQCHIP_SKIP_SET_WAKE,
};
-static struct irq_domain *cp_intc_domain;
-
static asmlinkage void __exception_irq_entry
-cp_intc_handle_irq(struct pt_regs *regs)
+davinci_cp_intc_handle_irq(struct pt_regs *regs)
{
- int irqnr = cp_intc_read(CP_INTC_PRIO_IDX);
+ int irqnr = davinci_cp_intc_read(DAVINCI_CP_INTC_PRIO_IDX);
irqnr &= 0xff;
- handle_domain_irq(cp_intc_domain, irqnr, regs);
+ handle_domain_irq(davinci_cp_intc_irq_domain, irqnr, regs);
}
-static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
- irq_set_chip(virq, &cp_intc_irq_chip);
+ irq_set_chip(virq, &davinci_cp_intc_irq_chip);
irq_set_probe(virq);
irq_set_handler(virq, handle_edge_irq);
return 0;
}
-static const struct irq_domain_ops cp_intc_host_ops = {
- .map = cp_intc_host_map,
+static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
+ .map = davinci_cp_intc_host_map,
.xlate = irq_domain_xlate_onetwocell,
};
-static int __init cp_intc_of_init(struct device_node *node,
- struct device_node *parent)
+static int __init davinci_cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
@@ -150,35 +153,35 @@ static int __init cp_intc_of_init(struct device_node *node,
int i, irq_base;
if (node) {
- davinci_intc_base = of_iomap(node, 0);
+ davinci_cp_intc_base = of_iomap(node, 0);
if (of_property_read_u32(node, "ti,intc-size", &num_irq))
pr_warn("unable to get intc-size, default to %d\n",
num_irq);
} else {
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+ davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
}
- if (WARN_ON(!davinci_intc_base))
+ if (WARN_ON(!davinci_cp_intc_base))
return -EINVAL;
- cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_GLOBAL_ENABLE);
/* Disable all host interrupts */
- cp_intc_write(0, CP_INTC_HOST_ENABLE(0));
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
/* Disable system interrupts */
for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_ENABLE_CLR(i));
+ davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i));
/* Set to normal mode, no nesting, no priority hold */
- cp_intc_write(0, CP_INTC_CTRL);
- cp_intc_write(0, CP_INTC_HOST_CTRL);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
/* Clear system interrupt status */
for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_STAT_CLR(i));
+ davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i));
/* Enable nIRQ (what about nFIQ?) */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
/*
* Priority is determined by host channel: lower channel number has
@@ -197,7 +200,7 @@ static int __init cp_intc_of_init(struct device_node *node,
val |= irq_prio[k] << 24;
}
- cp_intc_write(val, CP_INTC_CHAN_MAP(i));
+ davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i));
}
} else {
/*
@@ -206,7 +209,8 @@ static int __init cp_intc_of_init(struct device_node *node,
* are mapped to nIRQ.
*/
for (i = 0; i < num_reg; i++)
- cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
+ davinci_cp_intc_write(0x0f0f0f0f,
+ DAVINCI_CP_INTC_CHAN_MAP(i));
}
irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
@@ -216,25 +220,26 @@ static int __init cp_intc_of_init(struct device_node *node,
}
/* create a legacy host */
- cp_intc_domain = irq_domain_add_legacy(node, num_irq,
- irq_base, 0, &cp_intc_host_ops, NULL);
+ davinci_cp_intc_irq_domain = irq_domain_add_legacy(
+ node, num_irq, irq_base, 0,
+ &davinci_cp_intc_irq_domain_ops, NULL);
- if (!cp_intc_domain) {
+ if (!davinci_cp_intc_irq_domain) {
pr_err("cp_intc: failed to allocate irq host!\n");
return -EINVAL;
}
- set_handle_irq(cp_intc_handle_irq);
+ set_handle_irq(davinci_cp_intc_handle_irq);
/* Enable global interrupt */
- cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_GLOBAL_ENABLE);
return 0;
}
-void __init cp_intc_init(void)
+void __init davinci_cp_intc_init(void)
{
- cp_intc_of_init(NULL, NULL);
+ davinci_cp_intc_of_init(NULL, NULL);
}
-IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", cp_intc_of_init);
+IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 6d3da4364f7a..565c306e5252 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -754,7 +754,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
void __init da830_init_irqs(void)
{
- cp_intc_init();
+ davinci_cp_intc_init();
}
void __init da830_init_time(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 5e7f2c962abf..794ddbe78534 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -683,7 +683,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
void __init da850_init_irqs(void)
{
- cp_intc_init();
+ davinci_cp_intc_init();
}
void __init da850_init_time(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 4177a71db64c..0a6607ea4560 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,7 +17,7 @@
#include <linux/types.h>
#include <linux/reboot.h>
-void cp_intc_init(void);
+void davinci_cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols
2019-01-31 13:39 ` [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols Bartosz Golaszewski
@ 2019-02-05 0:01 ` David Lechner
2019-02-07 13:43 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:01 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> In preparation for moving the driver to drivers/irqchip do some
> cleanup: use a common prefix for all symbols.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols
2019-01-31 13:39 ` [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols Bartosz Golaszewski
2019-02-05 0:01 ` David Lechner
@ 2019-02-07 13:43 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 13:43 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> In preparation for moving the driver to drivers/irqchip do some
> cleanup: use a common prefix for all symbols.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/cp_intc.c | 143 ++++++++++----------
> arch/arm/mach-davinci/da830.c | 2 +-
> arch/arm/mach-davinci/da850.c | 2 +-
> arch/arm/mach-davinci/include/mach/common.h | 2 +-
> 4 files changed, 77 insertions(+), 72 deletions(-)
> /* Enable interrupt */
> static void cp_intc_unmask_irq(struct irq_data *d)
> {
> - cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
> + davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
> }
For consistency, can you please add davinci_ prefix to this function too?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 24/35] ARM: davinci: cp-intc: convert all hex numbers to lowercase
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (22 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 23/35] ARM: davinci: cp-intc: use a common prefix for all symbols Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:04 ` David Lechner
2019-01-31 13:39 ` [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure Bartosz Golaszewski
` (12 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Use lowercase letters in hexadecimal numbers as is done in most of the
kernel code base.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 3a99a3146d8e..1f55d68672db 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -23,19 +23,19 @@
#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
-#define DAVINCI_CP_INTC_HOST_CTRL 0x0C
+#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2c
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
#define DAVINCI_CP_INTC_PRIO_IDX 0x80
#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0d00 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0d80 + (n << 2))
#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
static void __iomem *davinci_cp_intc_base;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 24/35] ARM: davinci: cp-intc: convert all hex numbers to lowercase
2019-01-31 13:39 ` [PATCH 24/35] ARM: davinci: cp-intc: convert all hex numbers to lowercase Bartosz Golaszewski
@ 2019-02-05 0:04 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:04 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Use lowercase letters in hexadecimal numbers as is done in most of the
> kernel code base.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Seems a bit unnecessary, but...
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (23 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 24/35] ARM: davinci: cp-intc: convert all hex numbers to lowercase Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:29 ` David Lechner
2019-02-07 13:59 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 26/35] ARM: davinci: cp-intc: improve coding style Bartosz Golaszewski
` (11 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Modify the cp-intc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_cp_intc_init() to
irq-davinci-cp-intc.h and make it take the new config structure as
parameter. Convert all users to the new version.
Also: since the two da8xx SoCs default all irq priorities to 7, just
drop the priority configuration at all and hardcode the channels to 7.
It will simplify the driver code and make our lives easier when it
comes to device-tree support.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 92 +++++++++------------
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 1 -
include/linux/irqchip/irq-davinci-cp-intc.h | 2 +
5 files changed, 44 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 1f55d68672db..2ce0b7653c88 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -144,22 +145,15 @@ static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
-static int __init davinci_cp_intc_of_init(struct device_node *node,
- struct device_node *parent)
+static int __init
+davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
+ struct device_node *node)
{
- u32 num_irq = davinci_soc_info.intc_irq_num;
- u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i, irq_base;
-
- if (node) {
- davinci_cp_intc_base = of_iomap(node, 0);
- if (of_property_read_u32(node, "ti,intc-size", &num_irq))
- pr_warn("unable to get intc-size, default to %d\n",
- num_irq);
- } else {
- davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
- }
+ unsigned int num_regs = BITS_TO_LONGS(config->num_irqs);
+ int offset, irq_base;
+
+ davinci_cp_intc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_cp_intc_base))
return -EINVAL;
@@ -169,51 +163,29 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
/* Disable system interrupts */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset));
/* Set to normal mode, no nesting, no priority hold */
davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
/* Clear system interrupt status */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_STAT_CLR(offset));
/* Enable nIRQ (what about nFIQ?) */
davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
- /*
- * Priority is determined by host channel: lower channel number has
- * higher priority i.e. channel 0 has highest priority and channel 31
- * had the lowest priority.
- */
- num_reg = (num_irq + 3) >> 2; /* 4 channels per register */
- if (irq_prio) {
- unsigned j, k;
- u32 val;
-
- for (k = i = 0; i < num_reg; i++) {
- for (val = j = 0; j < 4; j++, k++) {
- val >>= 8;
- if (k < num_irq)
- val |= irq_prio[k] << 24;
- }
-
- davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i));
- }
- } else {
- /*
- * Default everything to channel 15 if priority not specified.
- * Note that channel 0-1 are mapped to nFIQ and channels 2-31
- * are mapped to nIRQ.
- */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(0x0f0f0f0f,
- DAVINCI_CP_INTC_CHAN_MAP(i));
- }
+ /* Default all priorities to channel 7. */
+ num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(0x07070707,
+ DAVINCI_CP_INTC_CHAN_MAP(offset));
- irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (irq_base < 0) {
pr_warn("Couldn't allocate IRQ numbers\n");
irq_base = 0;
@@ -221,7 +193,7 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
/* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
- node, num_irq, irq_base, 0,
+ node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
if (!davinci_cp_intc_irq_domain) {
@@ -237,9 +209,25 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
return 0;
}
-void __init davinci_cp_intc_init(void)
+int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)
{
- davinci_cp_intc_of_init(NULL, NULL);
+ return davinci_cp_intc_do_init(config, NULL);
}
+static int __init davinci_cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct davinci_cp_intc_config config = { };
+ int rv;
+
+ rv = of_address_to_resource(node, 0, &config.reg);
+ if (WARN_ON(rv))
+ return rv;
+
+ rv = of_property_read_u32(node, "ti,intc-size", &config.num_irqs);
+ if (WARN_ON(rv))
+ return rv;
+
+ return davinci_cp_intc_do_init(&config, node);
+}
IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 565c306e5252..bdbd66ffd2ea 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -754,7 +754,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
void __init da830_init_irqs(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da830_cp_intc_config);
}
void __init da830_init_time(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 794ddbe78534..fe370e85aeb1 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -683,7 +683,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
void __init da850_init_irqs(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da850_cp_intc_config);
}
void __init da850_init_time(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 0a6607ea4560..9e06974c85bb 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,7 +17,6 @@
#include <linux/types.h>
#include <linux/reboot.h>
-void davinci_cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
index 9b0c7d6189eb..596145c2f3d1 100644
--- a/include/linux/irqchip/irq-davinci-cp-intc.h
+++ b/include/linux/irqchip/irq-davinci-cp-intc.h
@@ -13,4 +13,6 @@ struct davinci_cp_intc_config {
unsigned int num_irqs;
};
+int davinci_cp_intc_init(const struct davinci_cp_intc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure
2019-01-31 13:39 ` [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure Bartosz Golaszewski
@ 2019-02-05 0:29 ` David Lechner
2019-02-08 16:27 ` Bartosz Golaszewski
2019-02-07 13:59 ` Sekhar Nori
1 sibling, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:29 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Modify the cp-intc driver to take all its configuration from the new
> config structure. Stop referencing davinci_soc_info in any way.
> Move the declaration for davinci_cp_intc_init() to
> irq-davinci-cp-intc.h and make it take the new config structure as
> parameter. Convert all users to the new version.
>
> Also: since the two da8xx SoCs default all irq priorities to 7, just
> drop the priority configuration at all and hardcode the channels to 7.
As mentioned in a comment on a different patch, this isn't strictly
true (although in practice, it probably is).
This patch deletes a code path with the comment "Default everything
to channel 15 if priority not specified.", so it is possible (although
unlikely) that this patch could change a priority of some IRQ that is
being used.
>
> It will simplify the driver code and make our lives easier when it
> comes to device-tree support.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure
2019-02-05 0:29 ` David Lechner
@ 2019-02-08 16:27 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-08 16:27 UTC (permalink / raw)
To: David Lechner
Cc: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier, LKML, arm-soc
wt., 5 lut 2019 o 01:29 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > Modify the cp-intc driver to take all its configuration from the new
> > config structure. Stop referencing davinci_soc_info in any way.
> > Move the declaration for davinci_cp_intc_init() to
> > irq-davinci-cp-intc.h and make it take the new config structure as
> > parameter. Convert all users to the new version.
> >
> > Also: since the two da8xx SoCs default all irq priorities to 7, just
> > drop the priority configuration at all and hardcode the channels to 7.
>
> As mentioned in a comment on a different patch, this isn't strictly
> true (although in practice, it probably is).
>
> This patch deletes a code path with the comment "Default everything
> to channel 15 if priority not specified.", so it is possible (although
> unlikely) that this patch could change a priority of some IRQ that is
> being used.
>
This only happens if no priorities are specified. Otherwise we just
iterate over the provided array and set priorities for all interrupts.
Bart
> >
> > It will simplify the driver code and make our lives easier when it
> > comes to device-tree support.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> > ---
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure
2019-01-31 13:39 ` [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure Bartosz Golaszewski
2019-02-05 0:29 ` David Lechner
@ 2019-02-07 13:59 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 13:59 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> +static int __init davinci_cp_intc_of_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + struct davinci_cp_intc_config config = { };
> + int rv;
I think you agreed to use 'ret' elsewhere. If yes, please change this
too for consistency.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 26/35] ARM: davinci: cp-intc: improve coding style
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (24 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 25/35] ARM: davinci: cp-intc: use the new-style config structure Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:35 ` David Lechner
2019-01-31 13:39 ` [PATCH 27/35] ARM: davinci: cp-intc: unify error handling Bartosz Golaszewski
` (10 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Drop tabs from variable initialization. Arrange variables in reverse
christmas-tree order. Add a newline before a return.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 2ce0b7653c88..4cd515b507f4 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -76,12 +76,12 @@ static void cp_intc_unmask_irq(struct irq_data *d)
static int davinci_cp_intc_set_irq_type(struct irq_data *d,
unsigned int flow_type)
{
- unsigned reg = BIT_WORD(d->hwirq);
- unsigned mask = BIT_MASK(d->hwirq);
- unsigned polarity = davinci_cp_intc_read(
- DAVINCI_CP_INTC_SYS_POLARITY(reg));
- unsigned type = davinci_cp_intc_read(
- DAVINCI_CP_INTC_SYS_TYPE(reg));
+ unsigned int reg, mask, polarity, type;
+
+ reg = BIT_WORD(d->hwirq);
+ mask = BIT_MASK(d->hwirq);
+ polarity = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ type = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_TYPE(reg));
switch (flow_type) {
case IRQ_TYPE_EDGE_RISING:
@@ -137,6 +137,7 @@ static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_set_chip(virq, &davinci_cp_intc_irq_chip);
irq_set_probe(virq);
irq_set_handler(virq, handle_edge_irq);
+
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 26/35] ARM: davinci: cp-intc: improve coding style
2019-01-31 13:39 ` [PATCH 26/35] ARM: davinci: cp-intc: improve coding style Bartosz Golaszewski
@ 2019-02-05 0:35 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:35 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Drop tabs from variable initialization. Arrange variables in reverse
> christmas-tree order.
I'm not sure this description is correct.
> Add a newline before a return.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/cp_intc.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 2ce0b7653c88..4cd515b507f4 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -76,12 +76,12 @@ static void cp_intc_unmask_irq(struct irq_data *d)
> static int davinci_cp_intc_set_irq_type(struct irq_data *d,
> unsigned int flow_type)
> {
> - unsigned reg = BIT_WORD(d->hwirq);
> - unsigned mask = BIT_MASK(d->hwirq);
> - unsigned polarity = davinci_cp_intc_read(
> - DAVINCI_CP_INTC_SYS_POLARITY(reg));
> - unsigned type = davinci_cp_intc_read(
> - DAVINCI_CP_INTC_SYS_TYPE(reg));
> + unsigned int reg, mask, polarity, type;
> +
> + reg = BIT_WORD(d->hwirq);
> + mask = BIT_MASK(d->hwirq);
> + polarity = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_POLARITY(reg));
> + type = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_TYPE(reg));
>
> switch (flow_type) {
> case IRQ_TYPE_EDGE_RISING:
> @@ -137,6 +137,7 @@ static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> irq_set_chip(virq, &davinci_cp_intc_irq_chip);
> irq_set_probe(virq);
> irq_set_handler(virq, handle_edge_irq);
> +
> return 0;
> }
>
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 27/35] ARM: davinci: cp-intc: unify error handling
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (25 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 26/35] ARM: davinci: cp-intc: improve coding style Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:37 ` David Lechner
2019-01-31 13:39 ` [PATCH 28/35] ARM: davinci: cp-intc: remove unneeded include Bartosz Golaszewski
` (9 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Use WARN_ON() on eny error in cp-intc initialization and drop all
custom error messages.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 4cd515b507f4..8d751318682d 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -187,20 +187,16 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
DAVINCI_CP_INTC_CHAN_MAP(offset));
irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
- if (irq_base < 0) {
- pr_warn("Couldn't allocate IRQ numbers\n");
- irq_base = 0;
- }
+ if (WARN_ON(irq_base < 0))
+ return irq_base;
/* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
- if (!davinci_cp_intc_irq_domain) {
- pr_err("cp_intc: failed to allocate irq host!\n");
+ if (WARN_ON(!davinci_cp_intc_irq_domain))
return -EINVAL;
- }
set_handle_irq(davinci_cp_intc_handle_irq);
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 27/35] ARM: davinci: cp-intc: unify error handling
2019-01-31 13:39 ` [PATCH 27/35] ARM: davinci: cp-intc: unify error handling Bartosz Golaszewski
@ 2019-02-05 0:37 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:37 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Use WARN_ON() on eny error in cp-intc initialization and drop all
> custom error messages.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 28/35] ARM: davinci: cp-intc: remove unneeded include
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (26 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 27/35] ARM: davinci: cp-intc: unify error handling Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:39 ` David Lechner
2019-01-31 13:39 ` [PATCH 29/35] ARM: davinci: cp-intc: drop GPL license boilerplate Bartosz Golaszewski
` (8 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This header is no longer needed. Remove it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 8d751318682d..812e49fcaa8b 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -21,7 +21,6 @@
#include <linux/of_irq.h>
#include <asm/exception.h>
-#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 28/35] ARM: davinci: cp-intc: remove unneeded include
2019-01-31 13:39 ` [PATCH 28/35] ARM: davinci: cp-intc: remove unneeded include Bartosz Golaszewski
@ 2019-02-05 0:39 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:39 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This header is no longer needed. Remove it.
Is there another patch in this series that causes it to no
longer be needed? If so, this patch could be squashed into
that patch.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/cp_intc.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 8d751318682d..812e49fcaa8b 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -21,7 +21,6 @@
> #include <linux/of_irq.h>
>
> #include <asm/exception.h>
> -#include <mach/common.h>
>
> #define DAVINCI_CP_INTC_CTRL 0x04
> #define DAVINCI_CP_INTC_HOST_CTRL 0x0c
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 29/35] ARM: davinci: cp-intc: drop GPL license boilerplate
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (27 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 28/35] ARM: davinci: cp-intc: remove unneeded include Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:41 ` David Lechner
2019-01-31 13:39 ` [PATCH 30/35] ARM: davinci: cp-intc: remove redundant comments Bartosz Golaszewski
` (7 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Replace the GPLv2 license boilerplate with an SPDX identifier.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 812e49fcaa8b..780b3f57aa59 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -1,13 +1,11 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) driver
- *
- * Author: Steve Chen <schen@mvista.com>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Author: Steve Chen <schen@mvista.com>
+// Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
+// Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+// Copyright (C) 2019, Texas Instruments
+//
+// TI Common Platform Interrupt Controller (cp_intc) driver
#include <linux/export.h>
#include <linux/init.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 29/35] ARM: davinci: cp-intc: drop GPL license boilerplate
2019-01-31 13:39 ` [PATCH 29/35] ARM: davinci: cp-intc: drop GPL license boilerplate Bartosz Golaszewski
@ 2019-02-05 0:41 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:41 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Replace the GPLv2 license boilerplate with an SPDX identifier.
Should also mention that you are adding an author and copyright.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/cp_intc.c | 18 ++++++++----------
> 1 file changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 812e49fcaa8b..780b3f57aa59 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -1,13 +1,11 @@
> -/*
> - * TI Common Platform Interrupt Controller (cp_intc) driver
> - *
> - * Author: Steve Chen <schen@mvista.com>
> - * Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
> - *
> - * This file is licensed under the terms of the GNU General Public License
> - * version 2. This program is licensed "as is" without any warranty of any
> - * kind, whether express or implied.
> - */
> +// SPDX-License-Identifier: GPL-2.0
GPL-2.0-only ?
> +//
> +// Author: Steve Chen <schen@mvista.com>
> +// Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
> +// Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> +// Copyright (C) 2019, Texas Instruments
> +//
> +// TI Common Platform Interrupt Controller (cp_intc) driver
>
> #include <linux/export.h>
> #include <linux/init.h>
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 30/35] ARM: davinci: cp-intc: remove redundant comments
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (28 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 29/35] ARM: davinci: cp-intc: drop GPL license boilerplate Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:42 ` David Lechner
2019-01-31 13:39 ` [PATCH 31/35] irqchip: davinci-cp-intc: move the driver to drivers/irqchip Bartosz Golaszewski
` (6 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We don't need comments explaining what functions with obvious names do.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/cp_intc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 780b3f57aa59..b5ace86c419f 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -55,7 +55,6 @@ static void davinci_cp_intc_ack_irq(struct irq_data *d)
davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
}
-/* Disable interrupt */
static void davinci_cp_intc_mask_irq(struct irq_data *d)
{
/* XXX don't know why we need to disable nIRQ here... */
@@ -64,7 +63,6 @@ static void davinci_cp_intc_mask_irq(struct irq_data *d)
davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
}
-/* Enable interrupt */
static void cp_intc_unmask_irq(struct irq_data *d)
{
davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
@@ -187,7 +185,6 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
if (WARN_ON(irq_base < 0))
return irq_base;
- /* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* [PATCH 31/35] irqchip: davinci-cp-intc: move the driver to drivers/irqchip
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (29 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 30/35] ARM: davinci: cp-intc: remove redundant comments Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:44 ` David Lechner
2019-01-31 13:39 ` [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info Bartosz Golaszewski
` (5 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The cp-intc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/Kconfig | 8 ++------
arch/arm/mach-davinci/Makefile | 2 --
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 1 +
.../cp_intc.c => drivers/irqchip/irq-davinci-cp-intc.c | 0
5 files changed, 8 insertions(+), 8 deletions(-)
rename arch/arm/mach-davinci/cp_intc.c => drivers/irqchip/irq-davinci-cp-intc.c (100%)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 71a4d875dd39..5a59cebc7d0a 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -1,10 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
if ARCH_DAVINCI
-config CP_INTC
- bool
- select IRQ_DOMAIN
-
config ARCH_DAVINCI_DMx
bool
@@ -33,13 +29,13 @@ config ARCH_DAVINCI_DA830
select ARCH_DAVINCI_DA8XX
# needed on silicon revs 1.0, 1.1:
select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT)
select ARCH_DAVINCI_DA8XX
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA8XX
bool
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 983865a99616..f76a8482784f 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -18,8 +18,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o
obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_CP_INTC) += cp_intc.o
-
# Board specific
obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o
obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index ea0eb82bf1d2..48fc5024c073 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -134,6 +134,11 @@ config DAVINCI_AINTC
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
+config DAVINCI_CP_INTC
+ bool
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
config DW_APB_ICTL
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 623e0ec5f9d0..e6cd0c98eff2 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
+obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
diff --git a/arch/arm/mach-davinci/cp_intc.c b/drivers/irqchip/irq-davinci-cp-intc.c
similarity index 100%
rename from arch/arm/mach-davinci/cp_intc.c
rename to drivers/irqchip/irq-davinci-cp-intc.c
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 31/35] irqchip: davinci-cp-intc: move the driver to drivers/irqchip
2019-01-31 13:39 ` [PATCH 31/35] irqchip: davinci-cp-intc: move the driver to drivers/irqchip Bartosz Golaszewski
@ 2019-02-05 0:44 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:44 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> The cp-intc driver has now been cleaned up. Move it to drivers/irqchip
> where it belongs.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -134,6 +134,11 @@ config DAVINCI_AINTC
> select GENERIC_IRQ_CHIP
> select IRQ_DOMAIN
>
> +config DAVINCI_CP_INTC
> + bool
> + select GENERIC_IRQ_CHIP
> + select IRQ_DOMAIN
A little help section would be nice.
> +
> config DW_APB_ICTL
> bool
> select GENERIC_IRQ_CHIP
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (30 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 31/35] irqchip: davinci-cp-intc: move the driver to drivers/irqchip Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 0:48 ` David Lechner
2019-02-07 14:04 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 33/35] ARM: davinci: prepare to remove mach/irqs.h Bartosz Golaszewski
` (4 subsequent siblings)
36 siblings, 2 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
These are no longer used. Remove them.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/da830.c | 19 -------------------
arch/arm/mach-davinci/da850.c | 20 --------------------
arch/arm/mach-davinci/dm355.c | 3 ---
arch/arm/mach-davinci/dm365.c | 3 ---
arch/arm/mach-davinci/dm644x.c | 3 ---
arch/arm/mach-davinci/dm646x.c | 3 ---
arch/arm/mach-davinci/include/mach/common.h | 3 ---
7 files changed, 54 deletions(-)
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index bdbd66ffd2ea..9cf9b090efeb 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -624,22 +624,6 @@ const short da830_eqep1_pins[] __initconst = {
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_cp_intc_prios[] = {
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
-};
-
static struct map_desc da830_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -728,9 +712,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da830_cp_intc_prios,
- .intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
.emac_pdata = &da8xx_emac_pdata,
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index fe370e85aeb1..b9ebdcde68eb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -299,23 +299,6 @@ const short da850_vpif_display_pins[] __initconst = {
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da850_cp_intc_prios[] = {
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7,
-};
-
static struct map_desc da850_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -651,9 +634,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da850_cp_intc_prios,
- .intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
.emac_pdata = &da8xx_emac_pdata,
.sram_dma = DA8XX_SHARED_RAM_BASE,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a0bfb3602136..5573f53b47f9 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -651,9 +651,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm355_aintc_prios,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
.sram_dma = 0x00010000,
.sram_len = SZ_32K,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index eab575873255..6d9bf292f4c6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -666,9 +666,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm365_aintc_prios,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
.emac_pdata = &dm365_emac_pdata,
.sram_dma = 0x00010000,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index beb97101c881..2f181b4149c1 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -591,9 +591,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm644x_aintc_prios,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
.emac_pdata = &dm644x_emac_pdata,
.sram_dma = 0x00008000,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 70505c92d5fb..4ce2c8c6b945 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -531,9 +531,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm646x_aintc_prios,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
.emac_pdata = &dm646x_emac_pdata,
.sram_dma = 0x10010000,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 9e06974c85bb..2b986d32049f 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -53,9 +53,6 @@ struct davinci_soc_info {
u32 pinmux_base;
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
- u32 intc_base;
- u8 *intc_irq_prios;
- unsigned long intc_irq_num;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info
2019-01-31 13:39 ` [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info Bartosz Golaszewski
@ 2019-02-05 0:48 ` David Lechner
2019-02-07 14:04 ` Sekhar Nori
1 sibling, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 0:48 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> These are no longer used. Remove them.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info
2019-01-31 13:39 ` [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info Bartosz Golaszewski
2019-02-05 0:48 ` David Lechner
@ 2019-02-07 14:04 ` Sekhar Nori
2019-02-08 16:41 ` Bartosz Golaszewski
1 sibling, 1 reply; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 14:04 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> These are no longer used. Remove them.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
I assume you are going to drop this patch and keep the priority setting
code around?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info
2019-02-07 14:04 ` Sekhar Nori
@ 2019-02-08 16:41 ` Bartosz Golaszewski
0 siblings, 0 replies; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-08 16:41 UTC (permalink / raw)
To: Sekhar Nori
Cc: Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Linux ARM, Linux Kernel Mailing List, Bartosz Golaszewski
czw., 7 lut 2019 o 15:04 Sekhar Nori <nsekhar@ti.com> napisał(a):
>
> On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > These are no longer used. Remove them.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> I assume you are going to drop this patch and keep the priority setting
> code around?
>
> Thanks,
> Sekhar
I'm still going to drop it from da8xx as it's no needed AFAICT. Both
SoCs use 7 as the priority for all interrupts. I'm just going to keep
the defines for offsets.
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 33/35] ARM: davinci: prepare to remove mach/irqs.h
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (31 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 32/35] ARM: davinci: remove intc related fields from davinci_soc_info Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-07 14:07 ` Sekhar Nori
2019-01-31 13:39 ` [PATCH 34/35] ARM: davinci: stop using defines from mach/irqs.h Bartosz Golaszewski
` (3 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Since we now select SPARSE_IRQ in davinci, the mach/irqs.h header is
no longer included from asm/irq.h. All interrupt numbers for devices
should be defined as platform device resources. Let's prepare for the
removal of mach/irqs.h by moving all defines that we want to keep to
relevant headers (davinci.h, common.h) and replacing others with
simple literals.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 4 ++--
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 2 +-
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 ++
arch/arm/mach-davinci/include/mach/common.h | 5 +++++
arch/arm/mach-davinci/include/mach/irqs.h | 18 ------------------
9 files changed, 14 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index b3a0148f7f1a..950e98e4eda5 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -488,7 +488,7 @@ static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
}
static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
- .gpio_base = DAVINCI_N_GPIO,
+ .gpio_base = 144,
.setup = da830_evm_ui_expander_setup,
.teardown = da830_evm_ui_expander_teardown,
};
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index efc9a33da6e1..27acba6fe5f8 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -562,7 +562,7 @@ static int da850_evm_ui_expander_teardown(struct i2c_client *client,
/* assign the baseboard expander's GPIOs after the UI board's */
#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
-#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
+#define DA850_BB_EXPANDER_GPIO_BASE (144 + DA850_UI_EXPANDER_N_GPIOS)
enum da850_evm_bb_exp_pins {
DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
@@ -735,7 +735,7 @@ static int da850_evm_bb_expander_teardown(struct i2c_client *client,
}
static struct pca953x_platform_data da850_evm_ui_expander_info = {
- .gpio_base = DAVINCI_N_GPIO,
+ .gpio_base = 144,
.setup = da850_evm_ui_expander_setup,
.teardown = da850_evm_ui_expander_teardown,
.names = da850_evm_ui_exp,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index f23a29e5116f..d04ce0c206b6 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -310,7 +310,7 @@ static struct platform_device rtc_dev = {
* I2C GPIO expanders
*/
-#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
+#define PCF_Uxx_BASE(x) (144 + ((x) * 8))
/* U2 -- LEDs */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index ebf07d92224e..2ddc03a95acd 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -333,7 +333,7 @@ static int evm_pcf_teardown(struct i2c_client *client, int gpio,
}
static struct pcf857x_platform_data pcf_data = {
- .gpio_base = DAVINCI_N_GPIO+1,
+ .gpio_base = 145,
.setup = evm_pcf_setup,
.teardown = evm_pcf_teardown,
};
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 9cf9b090efeb..74cbab153e59 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -730,7 +730,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
.end = DA8XX_CP_INTC_BASE + SZ_8K,
.flags = IORESOURCE_MEM,
},
- .num_irqs = DA830_N_CP_INTC_IRQ,
+ .num_irqs = 96,
};
void __init da830_init_irqs(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b9ebdcde68eb..644f4eec8d5c 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -658,7 +658,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
.end = DA8XX_CP_INTC_BASE + SZ_8K,
.flags = IORESOURCE_MEM,
},
- .num_irqs = DA850_N_CP_INTC_IRQ,
+ .num_irqs = 101,
};
void __init da850_init_irqs(void)
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 49958cc161d7..d5bffd3751f9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -39,6 +39,8 @@
#define DAVINCI_PLL2_BASE 0x01c40c00
#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000
+#define DAVINCI_ARM_INTC_BASE 0x01c48000
+
#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
#define SYSMOD_VDAC_CONFIG 0x2c
#define SYSMOD_VIDCLKCTL 0x38
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 2b986d32049f..9526e5da0d33 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,6 +17,11 @@
#include <linux/types.h>
#include <linux/reboot.h>
+#include <asm/irq.h>
+
+#define DAVINCI_INTC_START NR_IRQS
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 317cbc42e5cd..27c9f89f2a7f 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -29,12 +29,6 @@
#include <asm/irq.h>
-/* Base address */
-#define DAVINCI_ARM_INTC_BASE 0x01C48000
-
-#define DAVINCI_INTC_START NR_IRQS
-#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
-
/* Interrupt lines */
#define IRQ_VDINT0 DAVINCI_INTC_IRQ(0)
#define IRQ_VDINT1 DAVINCI_INTC_IRQ(1)
@@ -100,10 +94,6 @@
#define IRQ_COMMRX DAVINCI_INTC_IRQ(62)
#define IRQ_EMUINT DAVINCI_INTC_IRQ(63)
-#define DAVINCI_N_AINTC_IRQ 64
-
-#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
-
/* DaVinci DM6467-specific Interrupts */
#define IRQ_DM646X_VP_VERTINT0 DAVINCI_INTC_IRQ(0)
#define IRQ_DM646X_VP_VERTINT1 DAVINCI_INTC_IRQ(1)
@@ -344,8 +334,6 @@
#define IRQ_DA830_T12CMPINT6_1 DAVINCI_INTC_IRQ(88)
#define IRQ_DA830_T12CMPINT7_1 DAVINCI_INTC_IRQ(89)
-#define DA830_N_CP_INTC_IRQ 96
-
/* DA850 speicific interrupts */
#define IRQ_DA850_MPUADDRERR0 DAVINCI_INTC_IRQ(27)
#define IRQ_DA850_MPUPROTERR0 DAVINCI_INTC_IRQ(27)
@@ -401,10 +389,4 @@
#define IRQ_DA850_MCBSP1RINT DAVINCI_INTC_IRQ(99)
#define IRQ_DA850_MCBSP1XINT DAVINCI_INTC_IRQ(100)
-#define DA850_N_CP_INTC_IRQ 101
-
-/* da850 currently has the most gpio pins (144) */
-#define DAVINCI_N_GPIO 144
-/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
-
#endif /* __ASM_ARCH_IRQS_H */
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 33/35] ARM: davinci: prepare to remove mach/irqs.h
2019-01-31 13:39 ` [PATCH 33/35] ARM: davinci: prepare to remove mach/irqs.h Bartosz Golaszewski
@ 2019-02-07 14:07 ` Sekhar Nori
0 siblings, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 14:07 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
On 31/01/19 7:09 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> Since we now select SPARSE_IRQ in davinci, the mach/irqs.h header is
> no longer included from asm/irq.h. All interrupt numbers for devices
> should be defined as platform device resources. Let's prepare for the
> removal of mach/irqs.h by moving all defines that we want to keep to
> relevant headers (davinci.h, common.h) and replacing others with
> simple literals.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/board-da830-evm.c | 2 +-
> arch/arm/mach-davinci/board-da850-evm.c | 4 ++--
> arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
> arch/arm/mach-davinci/board-dm646x-evm.c | 2 +-
> arch/arm/mach-davinci/da830.c | 2 +-
> arch/arm/mach-davinci/da850.c | 2 +-
> arch/arm/mach-davinci/davinci.h | 2 ++
> arch/arm/mach-davinci/include/mach/common.h | 5 +++++
> arch/arm/mach-davinci/include/mach/irqs.h | 18 ------------------
> 9 files changed, 14 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
> index b3a0148f7f1a..950e98e4eda5 100644
> --- a/arch/arm/mach-davinci/board-da830-evm.c
> +++ b/arch/arm/mach-davinci/board-da830-evm.c
> @@ -488,7 +488,7 @@ static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
> }
>
> static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
> - .gpio_base = DAVINCI_N_GPIO,
> + .gpio_base = 144,
Why drop DAVINCI_N_GPIO instead of just moving it to a local header file?
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 34/35] ARM: davinci: stop using defines from mach/irqs.h
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (32 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 33/35] ARM: davinci: prepare to remove mach/irqs.h Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 1:05 ` David Lechner
2019-01-31 13:39 ` [PATCH 35/35] ARM: davinci: remove mach/irqs.h Bartosz Golaszewski
` (2 subsequent siblings)
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
As the second step in preparation for mach/irqs.h removal - replace
all constants defined there with the DAVINCI_INTC_IRQ() macro which
takes the NR_IRQS offset into account.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/asp.h | 8 +-
arch/arm/mach-davinci/da830.c | 12 +--
arch/arm/mach-davinci/da850.c | 28 ++---
arch/arm/mach-davinci/devices-da8xx.c | 146 +++++++++++++-------------
arch/arm/mach-davinci/devices.c | 30 +++---
arch/arm/mach-davinci/dm355.c | 56 +++++-----
arch/arm/mach-davinci/dm365.c | 80 +++++++-------
arch/arm/mach-davinci/dm644x.c | 48 ++++-----
arch/arm/mach-davinci/dm646x.c | 62 +++++------
arch/arm/mach-davinci/usb-da8xx.c | 6 +-
arch/arm/mach-davinci/usb.c | 6 +-
11 files changed, 241 insertions(+), 241 deletions(-)
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h
index 495aa6907cbc..17013e27152e 100644
--- a/arch/arm/mach-davinci/asp.h
+++ b/arch/arm/mach-davinci/asp.h
@@ -49,9 +49,9 @@
#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5
/* Interrupts */
-#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
-#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
+#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(25)
+#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(24)
+#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(25)
+#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(24)
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 74cbab153e59..a8407c1d1a68 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -678,17 +678,17 @@ int __init da830_register_gpio(void)
static struct davinci_timer_instance da830_timer_instance[2] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(21),
+ .top_irq = DAVINCI_INTC_IRQ(22),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
+ .cmp_irq = DAVINCI_INTC_IRQ(74),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(23),
+ .top_irq = DAVINCI_INTC_IRQ(24),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
+ .cmp_irq = DAVINCI_INTC_IRQ(82),
},
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 644f4eec8d5c..84b30c70ddf1 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -335,23 +335,23 @@ static struct davinci_id da850_ids[] = {
static struct davinci_timer_instance da850_timer_instance[4] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(21),
+ .top_irq = DAVINCI_INTC_IRQ(22),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(23),
+ .top_irq = DAVINCI_INTC_IRQ(24),
},
{
.base = DA850_TIMER64P2_BASE,
- .bottom_irq = IRQ_DA850_TINT12_2,
- .top_irq = IRQ_DA850_TINT34_2,
+ .bottom_irq = DAVINCI_INTC_IRQ(68),
+ .top_irq = DAVINCI_INTC_IRQ(68),
},
{
.base = DA850_TIMER64P3_BASE,
- .bottom_irq = IRQ_DA850_TINT12_3,
- .top_irq = IRQ_DA850_TINT34_3,
+ .bottom_irq = DAVINCI_INTC_IRQ(96),
+ .top_irq = DAVINCI_INTC_IRQ(96),
},
};
@@ -554,8 +554,8 @@ static struct platform_device da850_vpif_dev = {
static struct resource da850_vpif_display_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(92),
+ .end = DAVINCI_INTC_IRQ(92),
.flags = IORESOURCE_IRQ,
},
};
@@ -573,13 +573,13 @@ static struct platform_device da850_vpif_display_dev = {
static struct resource da850_vpif_capture_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(92),
+ .end = DAVINCI_INTC_IRQ(92),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(92),
+ .end = DAVINCI_INTC_IRQ(92),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 65edd2aa9db5..fda6d35c415c 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -65,7 +65,7 @@ void __iomem *da8xx_syscfg1_base;
static struct plat_serial8250_port da8xx_serial0_pdata[] = {
{
.mapbase = DA8XX_UART0_BASE,
- .irq = IRQ_DA8XX_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(25),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -78,7 +78,7 @@ static struct plat_serial8250_port da8xx_serial0_pdata[] = {
static struct plat_serial8250_port da8xx_serial1_pdata[] = {
{
.mapbase = DA8XX_UART1_BASE,
- .irq = IRQ_DA8XX_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(53),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -91,7 +91,7 @@ static struct plat_serial8250_port da8xx_serial1_pdata[] = {
static struct plat_serial8250_port da8xx_serial2_pdata[] = {
{
.mapbase = DA8XX_UART2_BASE,
- .irq = IRQ_DA8XX_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(61),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -172,12 +172,12 @@ static struct resource da8xx_edma0_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_DA8XX_CCINT0,
+ .start = DAVINCI_INTC_IRQ(11),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA8XX_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(12),
.flags = IORESOURCE_IRQ,
},
};
@@ -197,12 +197,12 @@ static struct resource da850_edma1_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_DA850_CCINT1,
+ .start = DAVINCI_INTC_IRQ(93),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA850_CCERRINT1,
+ .start = DAVINCI_INTC_IRQ(94),
.flags = IORESOURCE_IRQ,
},
};
@@ -307,8 +307,8 @@ static struct resource da8xx_i2c_resources0[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT0,
- .end = IRQ_DA8XX_I2CINT0,
+ .start = DAVINCI_INTC_IRQ(15),
+ .end = DAVINCI_INTC_IRQ(15),
.flags = IORESOURCE_IRQ,
},
};
@@ -327,8 +327,8 @@ static struct resource da8xx_i2c_resources1[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT1,
- .end = IRQ_DA8XX_I2CINT1,
+ .start = DAVINCI_INTC_IRQ(51),
+ .end = DAVINCI_INTC_IRQ(51),
.flags = IORESOURCE_IRQ,
},
};
@@ -383,23 +383,23 @@ static struct resource da8xx_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+ .start = DAVINCI_INTC_IRQ(33),
+ .end = DAVINCI_INTC_IRQ(33),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_RX_PULSE,
- .end = IRQ_DA8XX_C0_RX_PULSE,
+ .start = DAVINCI_INTC_IRQ(34),
+ .end = DAVINCI_INTC_IRQ(34),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_TX_PULSE,
- .end = IRQ_DA8XX_C0_TX_PULSE,
+ .start = DAVINCI_INTC_IRQ(35),
+ .end = DAVINCI_INTC_IRQ(35),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_MISC_PULSE,
- .end = IRQ_DA8XX_C0_MISC_PULSE,
+ .start = DAVINCI_INTC_IRQ(36),
+ .end = DAVINCI_INTC_IRQ(36),
.flags = IORESOURCE_IRQ,
},
};
@@ -471,7 +471,7 @@ static struct resource da830_mcasp1_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(54),
.flags = IORESOURCE_IRQ,
},
};
@@ -506,7 +506,7 @@ static struct resource da830_mcasp2_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(54),
.flags = IORESOURCE_IRQ,
},
};
@@ -541,7 +541,7 @@ static struct resource da850_mcasp_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(54),
.flags = IORESOURCE_IRQ,
},
};
@@ -589,43 +589,43 @@ static struct resource da8xx_pruss_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_EVTOUT0,
- .end = IRQ_DA8XX_EVTOUT0,
+ .start = DAVINCI_INTC_IRQ(3),
+ .end = DAVINCI_INTC_IRQ(3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT1,
- .end = IRQ_DA8XX_EVTOUT1,
+ .start = DAVINCI_INTC_IRQ(4),
+ .end = DAVINCI_INTC_IRQ(4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT2,
- .end = IRQ_DA8XX_EVTOUT2,
+ .start = DAVINCI_INTC_IRQ(5),
+ .end = DAVINCI_INTC_IRQ(5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT3,
- .end = IRQ_DA8XX_EVTOUT3,
+ .start = DAVINCI_INTC_IRQ(6),
+ .end = DAVINCI_INTC_IRQ(6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT4,
- .end = IRQ_DA8XX_EVTOUT4,
+ .start = DAVINCI_INTC_IRQ(7),
+ .end = DAVINCI_INTC_IRQ(7),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT5,
- .end = IRQ_DA8XX_EVTOUT5,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT6,
- .end = IRQ_DA8XX_EVTOUT6,
+ .start = DAVINCI_INTC_IRQ(9),
+ .end = DAVINCI_INTC_IRQ(9),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT7,
- .end = IRQ_DA8XX_EVTOUT7,
+ .start = DAVINCI_INTC_IRQ(10),
+ .end = DAVINCI_INTC_IRQ(10),
.flags = IORESOURCE_IRQ,
},
};
@@ -675,8 +675,8 @@ static struct resource da8xx_lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = { /* interrupt */
- .start = IRQ_DA8XX_LCDINT,
- .end = IRQ_DA8XX_LCDINT,
+ .start = DAVINCI_INTC_IRQ(52),
+ .end = DAVINCI_INTC_IRQ(52),
.flags = IORESOURCE_IRQ,
},
};
@@ -701,48 +701,48 @@ static struct resource da8xx_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_GPIO0,
- .end = IRQ_DA8XX_GPIO0,
+ .start = DAVINCI_INTC_IRQ(42),
+ .end = DAVINCI_INTC_IRQ(42),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO1,
- .end = IRQ_DA8XX_GPIO1,
+ .start = DAVINCI_INTC_IRQ(43),
+ .end = DAVINCI_INTC_IRQ(43),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO2,
- .end = IRQ_DA8XX_GPIO2,
+ .start = DAVINCI_INTC_IRQ(44),
+ .end = DAVINCI_INTC_IRQ(44),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO3,
- .end = IRQ_DA8XX_GPIO3,
+ .start = DAVINCI_INTC_IRQ(45),
+ .end = DAVINCI_INTC_IRQ(45),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO4,
- .end = IRQ_DA8XX_GPIO4,
+ .start = DAVINCI_INTC_IRQ(46),
+ .end = DAVINCI_INTC_IRQ(46),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO5,
- .end = IRQ_DA8XX_GPIO5,
+ .start = DAVINCI_INTC_IRQ(47),
+ .end = DAVINCI_INTC_IRQ(47),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO6,
- .end = IRQ_DA8XX_GPIO6,
+ .start = DAVINCI_INTC_IRQ(48),
+ .end = DAVINCI_INTC_IRQ(48),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO7,
- .end = IRQ_DA8XX_GPIO7,
+ .start = DAVINCI_INTC_IRQ(49),
+ .end = DAVINCI_INTC_IRQ(49),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO8,
- .end = IRQ_DA8XX_GPIO8,
+ .start = DAVINCI_INTC_IRQ(50),
+ .end = DAVINCI_INTC_IRQ(50),
.flags = IORESOURCE_IRQ,
},
};
@@ -767,8 +767,8 @@ static struct resource da8xx_mmcsd0_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_MMCSDINT0,
- .end = IRQ_DA8XX_MMCSDINT0,
+ .start = DAVINCI_INTC_IRQ(16),
+ .end = DAVINCI_INTC_IRQ(16),
.flags = IORESOURCE_IRQ,
},
};
@@ -794,8 +794,8 @@ static struct resource da850_mmcsd1_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA850_MMCSDINT0_1,
- .end = IRQ_DA850_MMCSDINT0_1,
+ .start = DAVINCI_INTC_IRQ(72),
+ .end = DAVINCI_INTC_IRQ(72),
.flags = IORESOURCE_IRQ,
},
};
@@ -846,8 +846,8 @@ static struct resource da8xx_rproc_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* dsp irq */
- .start = IRQ_DA8XX_CHIPINT0,
- .end = IRQ_DA8XX_CHIPINT0,
+ .start = DAVINCI_INTC_IRQ(28),
+ .end = DAVINCI_INTC_IRQ(28),
.flags = IORESOURCE_IRQ,
},
};
@@ -937,13 +937,13 @@ static struct resource da8xx_rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* timer irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(19),
+ .end = DAVINCI_INTC_IRQ(19),
.flags = IORESOURCE_IRQ,
},
{ /* alarm irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(19),
+ .end = DAVINCI_INTC_IRQ(19),
.flags = IORESOURCE_IRQ,
},
};
@@ -1010,8 +1010,8 @@ static struct resource da8xx_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT0,
- .end = IRQ_DA8XX_SPINT0,
+ .start = DAVINCI_INTC_IRQ(20),
+ .end = DAVINCI_INTC_IRQ(20),
.flags = IORESOURCE_IRQ,
},
};
@@ -1023,8 +1023,8 @@ static struct resource da8xx_spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT1,
- .end = IRQ_DA8XX_SPINT1,
+ .start = DAVINCI_INTC_IRQ(56),
+ .end = DAVINCI_INTC_IRQ(56),
.flags = IORESOURCE_IRQ,
},
};
@@ -1104,7 +1104,7 @@ static struct resource da850_sata_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA850_SATAINT,
+ .start = DAVINCI_INTC_IRQ(67),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index e8dbbb7479ab..b8e5c5998872 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -56,7 +56,7 @@ static struct resource i2c_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_I2C,
+ .start = DAVINCI_INTC_IRQ(39),
.flags = IORESOURCE_IRQ,
},
};
@@ -84,8 +84,8 @@ static struct resource ide_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_IDE,
- .end = IRQ_IDE,
+ .start = DAVINCI_INTC_IRQ(22),
+ .end = DAVINCI_INTC_IRQ(22),
.flags = IORESOURCE_IRQ,
},
};
@@ -110,7 +110,7 @@ void __init davinci_init_ide(void)
davinci_cfg_reg(DM644X_ATAEN);
davinci_cfg_reg(DM644X_HDIREN);
} else if (cpu_is_davinci_dm646x()) {
- /* IRQ_DM646X_IDE is the same as IRQ_IDE */
+ /* DAVINCI_INTC_IRQ(22) is the same as DAVINCI_INTC_IRQ(22) */
davinci_cfg_reg(DM646X_ATAEN);
} else {
WARN_ON(1);
@@ -133,11 +133,11 @@ static struct resource mmcsd0_resources[] = {
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_MMCINT,
+ .start = DAVINCI_INTC_IRQ(26),
.flags = IORESOURCE_IRQ,
}, {
/* different on dm355 */
- .start = IRQ_SDIOINT,
+ .start = DAVINCI_INTC_IRQ(27),
.flags = IORESOURCE_IRQ,
},
};
@@ -163,10 +163,10 @@ static struct resource mmcsd1_resources[] = {
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_DM355_MMCINT1,
+ .start = DAVINCI_INTC_IRQ(27),
.flags = IORESOURCE_IRQ,
}, {
- .start = IRQ_DM355_SDIOINT1,
+ .start = DAVINCI_INTC_IRQ(31),
.flags = IORESOURCE_IRQ,
},
};
@@ -219,7 +219,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
- mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
+ mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(31);
davinci_mmcsd1_device.name = "da830-mmc";
} else
break;
@@ -230,7 +230,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
if (cpu_is_davinci_dm355()) {
mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(23);
/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
davinci_cfg_reg(DM355_MMCSD0);
@@ -241,7 +241,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(23);
davinci_mmcsd0_device.name = "da830-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
@@ -313,13 +313,13 @@ int davinci_gpio_register(struct resource *res, int size, void *pdata)
struct davinci_timer_instance davinci_timer_instance[2] = {
{
.base = DAVINCI_TIMER0_BASE,
- .bottom_irq = IRQ_TINT0_TINT12,
- .top_irq = IRQ_TINT0_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(32),
+ .top_irq = DAVINCI_INTC_IRQ(33),
},
{
.base = DAVINCI_TIMER1_BASE,
- .bottom_irq = IRQ_TINT1_TINT12,
- .top_irq = IRQ_TINT1_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(34),
+ .top_irq = DAVINCI_INTC_IRQ(35),
},
};
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 5573f53b47f9..8d53d0c0a4a2 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -54,7 +54,7 @@ static struct resource dm355_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM355_SPINT0_0,
+ .start = DAVINCI_INTC_IRQ(42),
.flags = IORESOURCE_IRQ,
},
};
@@ -220,12 +220,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(16),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(17),
.flags = IORESOURCE_IRQ,
},
/* not using (or muxing) TC*_ERR */
@@ -305,13 +305,13 @@ static struct platform_device dm355_vpss_device = {
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(0),
+ .end = DAVINCI_INTC_IRQ(0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(1),
+ .end = DAVINCI_INTC_IRQ(1),
.flags = IORESOURCE_IRQ,
},
};
@@ -369,8 +369,8 @@ static struct platform_device dm355_osd_dev = {
static struct resource dm355_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -389,8 +389,8 @@ static struct resource dm355_venc_resources[] = {
static struct resource dm355_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -494,38 +494,38 @@ static struct resource dm355_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM355_GPIOBNK0,
- .end = IRQ_DM355_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(54),
+ .end = DAVINCI_INTC_IRQ(54),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK1,
- .end = IRQ_DM355_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(55),
+ .end = DAVINCI_INTC_IRQ(55),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK2,
- .end = IRQ_DM355_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(56),
+ .end = DAVINCI_INTC_IRQ(56),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK3,
- .end = IRQ_DM355_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(57),
+ .end = DAVINCI_INTC_IRQ(57),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK4,
- .end = IRQ_DM355_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(58),
+ .end = DAVINCI_INTC_IRQ(58),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK5,
- .end = IRQ_DM355_GPIOBNK5,
+ .start = DAVINCI_INTC_IRQ(59),
+ .end = DAVINCI_INTC_IRQ(59),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK6,
- .end = IRQ_DM355_GPIOBNK6,
+ .start = DAVINCI_INTC_IRQ(60),
+ .end = DAVINCI_INTC_IRQ(60),
.flags = IORESOURCE_IRQ,
},
};
@@ -579,7 +579,7 @@ static struct davinci_timer_info dm355_timer_info = {
static struct plat_serial8250_port dm355_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(40),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -592,7 +592,7 @@ static struct plat_serial8250_port dm355_serial0_platform_data[] = {
static struct plat_serial8250_port dm355_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(41),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -605,7 +605,7 @@ static struct plat_serial8250_port dm355_serial1_platform_data[] = {
static struct plat_serial8250_port dm355_serial2_platform_data[] = {
{
.mapbase = DM355_UART2_BASE,
- .irq = IRQ_DM355_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(14),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6d9bf292f4c6..00d90cf81e7f 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -225,7 +225,7 @@ static struct resource dm365_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_SPIINT0_0,
+ .start = DAVINCI_INTC_IRQ(42),
.flags = IORESOURCE_IRQ,
},
};
@@ -267,43 +267,43 @@ static struct resource dm365_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM365_GPIO0,
- .end = IRQ_DM365_GPIO0,
+ .start = DAVINCI_INTC_IRQ(44),
+ .end = DAVINCI_INTC_IRQ(44),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO1,
- .end = IRQ_DM365_GPIO1,
+ .start = DAVINCI_INTC_IRQ(45),
+ .end = DAVINCI_INTC_IRQ(45),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO2,
- .end = IRQ_DM365_GPIO2,
+ .start = DAVINCI_INTC_IRQ(46),
+ .end = DAVINCI_INTC_IRQ(46),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO3,
- .end = IRQ_DM365_GPIO3,
+ .start = DAVINCI_INTC_IRQ(47),
+ .end = DAVINCI_INTC_IRQ(47),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO4,
- .end = IRQ_DM365_GPIO4,
+ .start = DAVINCI_INTC_IRQ(48),
+ .end = DAVINCI_INTC_IRQ(48),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO5,
- .end = IRQ_DM365_GPIO5,
+ .start = DAVINCI_INTC_IRQ(49),
+ .end = DAVINCI_INTC_IRQ(49),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO6,
- .end = IRQ_DM365_GPIO6,
+ .start = DAVINCI_INTC_IRQ(50),
+ .end = DAVINCI_INTC_IRQ(50),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO7,
- .end = IRQ_DM365_GPIO7,
+ .start = DAVINCI_INTC_IRQ(51),
+ .end = DAVINCI_INTC_IRQ(51),
.flags = IORESOURCE_IRQ,
},
};
@@ -337,23 +337,23 @@ static struct resource dm365_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_EMAC_RXTHRESH,
- .end = IRQ_DM365_EMAC_RXTHRESH,
+ .start = DAVINCI_INTC_IRQ(52),
+ .end = DAVINCI_INTC_IRQ(52),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_RXPULSE,
- .end = IRQ_DM365_EMAC_RXPULSE,
+ .start = DAVINCI_INTC_IRQ(53),
+ .end = DAVINCI_INTC_IRQ(53),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_TXPULSE,
- .end = IRQ_DM365_EMAC_TXPULSE,
+ .start = DAVINCI_INTC_IRQ(54),
+ .end = DAVINCI_INTC_IRQ(54),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_MISCPULSE,
- .end = IRQ_DM365_EMAC_MISCPULSE,
+ .start = DAVINCI_INTC_IRQ(55),
+ .end = DAVINCI_INTC_IRQ(55),
.flags = IORESOURCE_IRQ,
},
};
@@ -463,12 +463,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(16),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(17),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -542,7 +542,7 @@ static struct resource dm365_rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_RTCINT,
+ .start = DAVINCI_INTC_IRQ(29),
.flags = IORESOURCE_IRQ,
},
};
@@ -572,8 +572,8 @@ static struct resource dm365_ks_resources[] = {
},
{
/* interrupt */
- .start = IRQ_DM365_KEYINT,
- .end = IRQ_DM365_KEYINT,
+ .start = DAVINCI_INTC_IRQ(60),
+ .end = DAVINCI_INTC_IRQ(60),
.flags = IORESOURCE_IRQ,
},
};
@@ -614,7 +614,7 @@ static struct davinci_timer_info dm365_timer_info = {
static struct plat_serial8250_port dm365_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(40),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -627,7 +627,7 @@ static struct plat_serial8250_port dm365_serial0_platform_data[] = {
static struct plat_serial8250_port dm365_serial1_platform_data[] = {
{
.mapbase = DM365_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(41),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -763,13 +763,13 @@ static struct platform_device dm365_vpss_device = {
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(0),
+ .end = DAVINCI_INTC_IRQ(0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(1),
+ .end = DAVINCI_INTC_IRQ(1),
.flags = IORESOURCE_IRQ,
},
};
@@ -850,8 +850,8 @@ static struct platform_device dm365_osd_dev = {
static struct resource dm365_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -870,8 +870,8 @@ static struct resource dm365_venc_resources[] = {
static struct resource dm365_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2f181b4149c1..a17ae9d66c53 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -61,8 +61,8 @@ static struct resource dm644x_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_EMACINT,
- .end = IRQ_EMACINT,
+ .start = DAVINCI_INTC_IRQ(13),
+ .end = DAVINCI_INTC_IRQ(13),
.flags = IORESOURCE_IRQ,
},
};
@@ -206,12 +206,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(16),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(17),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -276,13 +276,13 @@ static struct platform_device dm644x_vpss_device = {
static struct resource dm644x_vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(0),
+ .end = DAVINCI_INTC_IRQ(0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(1),
+ .end = DAVINCI_INTC_IRQ(1),
.flags = IORESOURCE_IRQ,
},
};
@@ -388,8 +388,8 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
static struct resource dm644x_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(8),
+ .end = DAVINCI_INTC_IRQ(8),
.flags = IORESOURCE_IRQ,
},
};
@@ -437,28 +437,28 @@ static struct resource dm644_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_GPIOBNK0,
- .end = IRQ_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(56),
+ .end = DAVINCI_INTC_IRQ(56),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK1,
- .end = IRQ_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(57),
+ .end = DAVINCI_INTC_IRQ(57),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK2,
- .end = IRQ_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(58),
+ .end = DAVINCI_INTC_IRQ(58),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK3,
- .end = IRQ_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(59),
+ .end = DAVINCI_INTC_IRQ(59),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK4,
- .end = IRQ_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(60),
+ .end = DAVINCI_INTC_IRQ(60),
.flags = IORESOURCE_IRQ,
},
};
@@ -519,7 +519,7 @@ static struct davinci_timer_info dm644x_timer_info = {
static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(40),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -532,7 +532,7 @@ static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(41),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -545,7 +545,7 @@ static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
static struct plat_serial8250_port dm644x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(42),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -615,7 +615,7 @@ void __init dm644x_init_time(void)
struct clk *clk;
/* Needed by the dsp. */
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ irq_set_handler(DAVINCI_INTC_IRQ(35), handle_level_irq);
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 4ce2c8c6b945..f5506216321e 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -64,23 +64,23 @@ static struct resource dm646x_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM646X_EMACRXTHINT,
- .end = IRQ_DM646X_EMACRXTHINT,
+ .start = DAVINCI_INTC_IRQ(24),
+ .end = DAVINCI_INTC_IRQ(24),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACRXINT,
- .end = IRQ_DM646X_EMACRXINT,
+ .start = DAVINCI_INTC_IRQ(25),
+ .end = DAVINCI_INTC_IRQ(25),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACTXINT,
- .end = IRQ_DM646X_EMACTXINT,
+ .start = DAVINCI_INTC_IRQ(26),
+ .end = DAVINCI_INTC_IRQ(26),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACMISCINT,
- .end = IRQ_DM646X_EMACMISCINT,
+ .start = DAVINCI_INTC_IRQ(27),
+ .end = DAVINCI_INTC_IRQ(27),
.flags = IORESOURCE_IRQ,
},
};
@@ -219,12 +219,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(16),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(17),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -261,12 +261,12 @@ static struct resource dm646x_mcasp0_resources[] = {
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP0TXINT,
+ .start = DAVINCI_INTC_IRQ(28),
.flags = IORESOURCE_IRQ,
},
{
.name = "rx",
- .start = IRQ_DM646X_MCASP0RXINT,
+ .start = DAVINCI_INTC_IRQ(29),
.flags = IORESOURCE_IRQ,
},
};
@@ -287,7 +287,7 @@ static struct resource dm646x_mcasp1_resources[] = {
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP1TXINT,
+ .start = DAVINCI_INTC_IRQ(30),
.flags = IORESOURCE_IRQ,
},
};
@@ -334,13 +334,13 @@ static struct platform_device vpif_dev = {
static struct resource vpif_display_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT2,
- .end = IRQ_DM646X_VP_VERTINT2,
+ .start = DAVINCI_INTC_IRQ(2),
+ .end = DAVINCI_INTC_IRQ(2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT3,
- .end = IRQ_DM646X_VP_VERTINT3,
+ .start = DAVINCI_INTC_IRQ(3),
+ .end = DAVINCI_INTC_IRQ(3),
.flags = IORESOURCE_IRQ,
},
};
@@ -358,13 +358,13 @@ static struct platform_device vpif_display_dev = {
static struct resource vpif_capture_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT0,
- .end = IRQ_DM646X_VP_VERTINT0,
+ .start = DAVINCI_INTC_IRQ(0),
+ .end = DAVINCI_INTC_IRQ(0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT1,
- .end = IRQ_DM646X_VP_VERTINT1,
+ .start = DAVINCI_INTC_IRQ(1),
+ .end = DAVINCI_INTC_IRQ(1),
.flags = IORESOURCE_IRQ,
},
};
@@ -387,18 +387,18 @@ static struct resource dm646x_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM646X_GPIOBNK0,
- .end = IRQ_DM646X_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(56),
+ .end = DAVINCI_INTC_IRQ(56),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK1,
- .end = IRQ_DM646X_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(57),
+ .end = DAVINCI_INTC_IRQ(57),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK2,
- .end = IRQ_DM646X_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(58),
+ .end = DAVINCI_INTC_IRQ(58),
.flags = IORESOURCE_IRQ,
},
};
@@ -459,7 +459,7 @@ static struct davinci_timer_info dm646x_timer_info = {
static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(40),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -472,7 +472,7 @@ static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(41),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -485,7 +485,7 @@ static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_DM646X_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(42),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -598,7 +598,7 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
struct clk *clk;
/* Needed by the dsp. */
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ irq_set_handler(DAVINCI_INTC_IRQ(35), handle_level_irq);
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index c17ce66a3d95..fdfe03669d9f 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -70,7 +70,7 @@ static struct resource da8xx_usb20_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_USB_INT,
+ .start = DAVINCI_INTC_IRQ(58),
.flags = IORESOURCE_IRQ,
.name = "mc",
},
@@ -105,8 +105,8 @@ static struct resource da8xx_usb11_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_IRQN,
- .end = IRQ_DA8XX_IRQN,
+ .start = DAVINCI_INTC_IRQ(59),
+ .end = DAVINCI_INTC_IRQ(59),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 31ed7aa47227..feb300670f43 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -38,7 +38,7 @@ static struct resource usb_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_USBINT,
+ .start = DAVINCI_INTC_IRQ(12),
.flags = IORESOURCE_IRQ,
.name = "mc"
},
@@ -70,8 +70,8 @@ void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
if (cpu_is_davinci_dm646x()) {
/* Override the defaults as DM6467 uses different IRQs. */
- usb_dev.resource[1].start = IRQ_DM646X_USBINT;
- usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT;
+ usb_dev.resource[1].start = DAVINCI_INTC_IRQ(13);
+ usb_dev.resource[2].start = DAVINCI_INTC_IRQ(14);
} else /* other devices don't have dedicated CPPI IRQ */
usb_dev.num_resources = 2;
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 34/35] ARM: davinci: stop using defines from mach/irqs.h
2019-01-31 13:39 ` [PATCH 34/35] ARM: davinci: stop using defines from mach/irqs.h Bartosz Golaszewski
@ 2019-02-05 1:05 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 1:05 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> As the second step in preparation for mach/irqs.h removal - replace
> all constants defined there with the DAVINCI_INTC_IRQ() macro which
> takes the NR_IRQS offset into account.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
> diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> index e8dbbb7479ab..b8e5c5998872 100644
> --- a/arch/arm/mach-davinci/devices.c
> +++ b/arch/arm/mach-davinci/devices.c
...
> @@ -110,7 +110,7 @@ void __init davinci_init_ide(void)
> davinci_cfg_reg(DM644X_ATAEN);
> davinci_cfg_reg(DM644X_HDIREN);
> } else if (cpu_is_davinci_dm646x()) {
> - /* IRQ_DM646X_IDE is the same as IRQ_IDE */
> + /* DAVINCI_INTC_IRQ(22) is the same as DAVINCI_INTC_IRQ(22) */
This comment can be dropped.
> davinci_cfg_reg(DM646X_ATAEN);
> } else {
> WARN_ON(1);
^ permalink raw reply [flat|nested] 97+ messages in thread
* [PATCH 35/35] ARM: davinci: remove mach/irqs.h
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (33 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 34/35] ARM: davinci: stop using defines from mach/irqs.h Bartosz Golaszewski
@ 2019-01-31 13:39 ` Bartosz Golaszewski
2019-02-05 1:06 ` David Lechner
2019-02-04 21:49 ` [PATCH 00/35] ARM: davinci: modernize the irq support David Lechner
2019-02-07 15:24 ` Sekhar Nori
36 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-01-31 13:39 UTC (permalink / raw)
To: Sekhar Nori, Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We can now remove mach/irqs.h as there are no more users.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 1 -
arch/arm/mach-davinci/board-da850-evm.c | 1 -
arch/arm/mach-davinci/board-dm644x-evm.c | 1 -
arch/arm/mach-davinci/board-dm646x-evm.c | 1 -
arch/arm/mach-davinci/da830.c | 1 -
arch/arm/mach-davinci/da850.c | 1 -
arch/arm/mach-davinci/devices-da8xx.c | 1 -
arch/arm/mach-davinci/devices.c | 1 -
arch/arm/mach-davinci/dm355.c | 1 -
arch/arm/mach-davinci/dm365.c | 1 -
arch/arm/mach-davinci/dm644x.c | 1 -
arch/arm/mach-davinci/dm646x.c | 1 -
arch/arm/mach-davinci/include/mach/irqs.h | 392 ----------------------
arch/arm/mach-davinci/usb-da8xx.c | 1 -
arch/arm/mach-davinci/usb.c | 1 -
15 files changed, 406 deletions(-)
delete mode 100644 arch/arm/mach-davinci/include/mach/irqs.h
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 950e98e4eda5..123b424058e2 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -36,7 +36,6 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/da8xx.h>
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 27acba6fe5f8..1da3d79f2757 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -45,7 +45,6 @@
#include <mach/common.h>
#include <mach/da8xx.h>
#include <mach/mux.h>
-#include <mach/irqs.h>
#include "sram.h"
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index d04ce0c206b6..dac5ad9ff91c 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -36,7 +36,6 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/serial.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 2ddc03a95acd..b8c7c50212bc 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -44,7 +44,6 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/serial.h>
#include "davinci.h"
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a8407c1d1a68..e4d781a36aa1 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -20,7 +20,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#include <mach/time.h>
#include "mux.h"
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 84b30c70ddf1..3872eedb0b23 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -33,7 +33,6 @@
#include <mach/cpufreq.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#include <mach/pm.h>
#include <mach/time.h>
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index fda6d35c415c..262dcd0a3528 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -25,7 +25,6 @@
#include <mach/cputype.h>
#include <mach/da8xx.h>
#include <mach/time.h>
-#include <mach/irqs.h>
#include "asp.h"
#include "cpuidle.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index b8e5c5998872..1337630868f0 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -17,7 +17,6 @@
#include <mach/hardware.h>
#include <linux/platform_data/i2c-davinci.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <linux/platform_data/mmc-davinci.h>
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 8d53d0c0a4a2..a653defd6418 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -27,7 +27,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 00d90cf81e7f..35e547a145a9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -32,7 +32,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index a17ae9d66c53..a86b20ff2966 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -25,7 +25,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index f5506216321e..80193b8bd92a 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -26,7 +26,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
deleted file mode 100644
index 27c9f89f2a7f..000000000000
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ /dev/null
@@ -1,392 +0,0 @@
-/*
- * DaVinci interrupt controller definitions
- *
- * Copyright (C) 2006 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-#include <asm/irq.h>
-
-/* Interrupt lines */
-#define IRQ_VDINT0 DAVINCI_INTC_IRQ(0)
-#define IRQ_VDINT1 DAVINCI_INTC_IRQ(1)
-#define IRQ_VDINT2 DAVINCI_INTC_IRQ(2)
-#define IRQ_HISTINT DAVINCI_INTC_IRQ(3)
-#define IRQ_H3AINT DAVINCI_INTC_IRQ(4)
-#define IRQ_PRVUINT DAVINCI_INTC_IRQ(5)
-#define IRQ_RSZINT DAVINCI_INTC_IRQ(6)
-#define IRQ_VFOCINT DAVINCI_INTC_IRQ(7)
-#define IRQ_VENCINT DAVINCI_INTC_IRQ(8)
-#define IRQ_ASQINT DAVINCI_INTC_IRQ(9)
-#define IRQ_IMXINT DAVINCI_INTC_IRQ(10)
-#define IRQ_VLCDINT DAVINCI_INTC_IRQ(11)
-#define IRQ_USBINT DAVINCI_INTC_IRQ(12)
-#define IRQ_EMACINT DAVINCI_INTC_IRQ(13)
-
-#define IRQ_CCINT0 DAVINCI_INTC_IRQ(16)
-#define IRQ_CCERRINT DAVINCI_INTC_IRQ(17)
-#define IRQ_TCERRINT0 DAVINCI_INTC_IRQ(18)
-#define IRQ_TCERRINT DAVINCI_INTC_IRQ(19)
-#define IRQ_PSCIN DAVINCI_INTC_IRQ(20)
-
-#define IRQ_IDE DAVINCI_INTC_IRQ(22)
-#define IRQ_HPIINT DAVINCI_INTC_IRQ(23)
-#define IRQ_MBXINT DAVINCI_INTC_IRQ(24)
-#define IRQ_MBRINT DAVINCI_INTC_IRQ(25)
-#define IRQ_MMCINT DAVINCI_INTC_IRQ(26)
-#define IRQ_SDIOINT DAVINCI_INTC_IRQ(27)
-#define IRQ_MSINT DAVINCI_INTC_IRQ(28)
-#define IRQ_DDRINT DAVINCI_INTC_IRQ(29)
-#define IRQ_AEMIFINT DAVINCI_INTC_IRQ(30)
-#define IRQ_VLQINT DAVINCI_INTC_IRQ(31)
-#define IRQ_TINT0_TINT12 DAVINCI_INTC_IRQ(32)
-#define IRQ_TINT0_TINT34 DAVINCI_INTC_IRQ(33)
-#define IRQ_TINT1_TINT12 DAVINCI_INTC_IRQ(34)
-#define IRQ_TINT1_TINT34 DAVINCI_INTC_IRQ(35)
-#define IRQ_PWMINT0 DAVINCI_INTC_IRQ(36)
-#define IRQ_PWMINT1 DAVINCI_INTC_IRQ(37)
-#define IRQ_PWMINT2 DAVINCI_INTC_IRQ(38)
-#define IRQ_I2C DAVINCI_INTC_IRQ(39)
-#define IRQ_UARTINT0 DAVINCI_INTC_IRQ(40)
-#define IRQ_UARTINT1 DAVINCI_INTC_IRQ(41)
-#define IRQ_UARTINT2 DAVINCI_INTC_IRQ(42)
-#define IRQ_SPINT0 DAVINCI_INTC_IRQ(43)
-#define IRQ_SPINT1 DAVINCI_INTC_IRQ(44)
-
-#define IRQ_DSP2ARM0 DAVINCI_INTC_IRQ(46)
-#define IRQ_DSP2ARM1 DAVINCI_INTC_IRQ(47)
-#define IRQ_GPIO0 DAVINCI_INTC_IRQ(48)
-#define IRQ_GPIO1 DAVINCI_INTC_IRQ(49)
-#define IRQ_GPIO2 DAVINCI_INTC_IRQ(50)
-#define IRQ_GPIO3 DAVINCI_INTC_IRQ(51)
-#define IRQ_GPIO4 DAVINCI_INTC_IRQ(52)
-#define IRQ_GPIO5 DAVINCI_INTC_IRQ(53)
-#define IRQ_GPIO6 DAVINCI_INTC_IRQ(54)
-#define IRQ_GPIO7 DAVINCI_INTC_IRQ(55)
-#define IRQ_GPIOBNK0 DAVINCI_INTC_IRQ(56)
-#define IRQ_GPIOBNK1 DAVINCI_INTC_IRQ(57)
-#define IRQ_GPIOBNK2 DAVINCI_INTC_IRQ(58)
-#define IRQ_GPIOBNK3 DAVINCI_INTC_IRQ(59)
-#define IRQ_GPIOBNK4 DAVINCI_INTC_IRQ(60)
-#define IRQ_COMMTX DAVINCI_INTC_IRQ(61)
-#define IRQ_COMMRX DAVINCI_INTC_IRQ(62)
-#define IRQ_EMUINT DAVINCI_INTC_IRQ(63)
-
-/* DaVinci DM6467-specific Interrupts */
-#define IRQ_DM646X_VP_VERTINT0 DAVINCI_INTC_IRQ(0)
-#define IRQ_DM646X_VP_VERTINT1 DAVINCI_INTC_IRQ(1)
-#define IRQ_DM646X_VP_VERTINT2 DAVINCI_INTC_IRQ(2)
-#define IRQ_DM646X_VP_VERTINT3 DAVINCI_INTC_IRQ(3)
-#define IRQ_DM646X_VP_ERRINT DAVINCI_INTC_IRQ(4)
-#define IRQ_DM646X_RESERVED_1 DAVINCI_INTC_IRQ(5)
-#define IRQ_DM646X_RESERVED_2 DAVINCI_INTC_IRQ(6)
-#define IRQ_DM646X_WDINT DAVINCI_INTC_IRQ(7)
-#define IRQ_DM646X_CRGENINT0 DAVINCI_INTC_IRQ(8)
-#define IRQ_DM646X_CRGENINT1 DAVINCI_INTC_IRQ(9)
-#define IRQ_DM646X_TSIFINT0 DAVINCI_INTC_IRQ(10)
-#define IRQ_DM646X_TSIFINT1 DAVINCI_INTC_IRQ(11)
-#define IRQ_DM646X_VDCEINT DAVINCI_INTC_IRQ(12)
-#define IRQ_DM646X_USBINT DAVINCI_INTC_IRQ(13)
-#define IRQ_DM646X_USBDMAINT DAVINCI_INTC_IRQ(14)
-#define IRQ_DM646X_PCIINT DAVINCI_INTC_IRQ(15)
-#define IRQ_DM646X_TCERRINT2 DAVINCI_INTC_IRQ(20)
-#define IRQ_DM646X_TCERRINT3 DAVINCI_INTC_IRQ(21)
-#define IRQ_DM646X_IDE DAVINCI_INTC_IRQ(22)
-#define IRQ_DM646X_HPIINT DAVINCI_INTC_IRQ(23)
-#define IRQ_DM646X_EMACRXTHINT DAVINCI_INTC_IRQ(24)
-#define IRQ_DM646X_EMACRXINT DAVINCI_INTC_IRQ(25)
-#define IRQ_DM646X_EMACTXINT DAVINCI_INTC_IRQ(26)
-#define IRQ_DM646X_EMACMISCINT DAVINCI_INTC_IRQ(27)
-#define IRQ_DM646X_MCASP0TXINT DAVINCI_INTC_IRQ(28)
-#define IRQ_DM646X_MCASP0RXINT DAVINCI_INTC_IRQ(29)
-#define IRQ_DM646X_MCASP1TXINT DAVINCI_INTC_IRQ(30)
-#define IRQ_DM646X_RESERVED_3 DAVINCI_INTC_IRQ(31)
-#define IRQ_DM646X_VLQINT DAVINCI_INTC_IRQ(38)
-#define IRQ_DM646X_UARTINT2 DAVINCI_INTC_IRQ(42)
-#define IRQ_DM646X_SPINT0 DAVINCI_INTC_IRQ(43)
-#define IRQ_DM646X_SPINT1 DAVINCI_INTC_IRQ(44)
-#define IRQ_DM646X_DSP2ARMINT DAVINCI_INTC_IRQ(45)
-#define IRQ_DM646X_RESERVED_4 DAVINCI_INTC_IRQ(46)
-#define IRQ_DM646X_PSCINT DAVINCI_INTC_IRQ(47)
-#define IRQ_DM646X_GPIO0 DAVINCI_INTC_IRQ(48)
-#define IRQ_DM646X_GPIO1 DAVINCI_INTC_IRQ(49)
-#define IRQ_DM646X_GPIO2 DAVINCI_INTC_IRQ(50)
-#define IRQ_DM646X_GPIO3 DAVINCI_INTC_IRQ(51)
-#define IRQ_DM646X_GPIO4 DAVINCI_INTC_IRQ(52)
-#define IRQ_DM646X_GPIO5 DAVINCI_INTC_IRQ(53)
-#define IRQ_DM646X_GPIO6 DAVINCI_INTC_IRQ(54)
-#define IRQ_DM646X_GPIO7 DAVINCI_INTC_IRQ(55)
-#define IRQ_DM646X_GPIOBNK0 DAVINCI_INTC_IRQ(56)
-#define IRQ_DM646X_GPIOBNK1 DAVINCI_INTC_IRQ(57)
-#define IRQ_DM646X_GPIOBNK2 DAVINCI_INTC_IRQ(58)
-#define IRQ_DM646X_DDRINT DAVINCI_INTC_IRQ(59)
-#define IRQ_DM646X_AEMIFINT DAVINCI_INTC_IRQ(60)
-
-/* DaVinci DM355-specific Interrupts */
-#define IRQ_DM355_CCDC_VDINT0 DAVINCI_INTC_IRQ(0)
-#define IRQ_DM355_CCDC_VDINT1 DAVINCI_INTC_IRQ(1)
-#define IRQ_DM355_CCDC_VDINT2 DAVINCI_INTC_IRQ(2)
-#define IRQ_DM355_IPIPE_HST DAVINCI_INTC_IRQ(3)
-#define IRQ_DM355_H3AINT DAVINCI_INTC_IRQ(4)
-#define IRQ_DM355_IPIPE_SDR DAVINCI_INTC_IRQ(5)
-#define IRQ_DM355_IPIPEIFINT DAVINCI_INTC_IRQ(6)
-#define IRQ_DM355_OSDINT DAVINCI_INTC_IRQ(7)
-#define IRQ_DM355_VENCINT DAVINCI_INTC_IRQ(8)
-#define IRQ_DM355_IMCOPINT DAVINCI_INTC_IRQ(11)
-#define IRQ_DM355_RTOINT DAVINCI_INTC_IRQ(13)
-#define IRQ_DM355_TINT4 DAVINCI_INTC_IRQ(13)
-#define IRQ_DM355_TINT2_TINT12 DAVINCI_INTC_IRQ(13)
-#define IRQ_DM355_UARTINT2 DAVINCI_INTC_IRQ(14)
-#define IRQ_DM355_TINT5 DAVINCI_INTC_IRQ(14)
-#define IRQ_DM355_TINT2_TINT34 DAVINCI_INTC_IRQ(14)
-#define IRQ_DM355_TINT6 DAVINCI_INTC_IRQ(15)
-#define IRQ_DM355_TINT3_TINT12 DAVINCI_INTC_IRQ(15)
-#define IRQ_DM355_SPINT1_0 DAVINCI_INTC_IRQ(17)
-#define IRQ_DM355_SPINT1_1 DAVINCI_INTC_IRQ(18)
-#define IRQ_DM355_SPINT2_0 DAVINCI_INTC_IRQ(19)
-#define IRQ_DM355_SPINT2_1 DAVINCI_INTC_IRQ(21)
-#define IRQ_DM355_TINT7 DAVINCI_INTC_IRQ(22)
-#define IRQ_DM355_TINT3_TINT34 DAVINCI_INTC_IRQ(22)
-#define IRQ_DM355_SDIOINT0 DAVINCI_INTC_IRQ(23)
-#define IRQ_DM355_MMCINT0 DAVINCI_INTC_IRQ(26)
-#define IRQ_DM355_MSINT DAVINCI_INTC_IRQ(26)
-#define IRQ_DM355_MMCINT1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DM355_PWMINT3 DAVINCI_INTC_IRQ(28)
-#define IRQ_DM355_SDIOINT1 DAVINCI_INTC_IRQ(31)
-#define IRQ_DM355_SPINT0_0 DAVINCI_INTC_IRQ(42)
-#define IRQ_DM355_SPINT0_1 DAVINCI_INTC_IRQ(43)
-#define IRQ_DM355_GPIO0 DAVINCI_INTC_IRQ(44)
-#define IRQ_DM355_GPIO1 DAVINCI_INTC_IRQ(45)
-#define IRQ_DM355_GPIO2 DAVINCI_INTC_IRQ(46)
-#define IRQ_DM355_GPIO3 DAVINCI_INTC_IRQ(47)
-#define IRQ_DM355_GPIO4 DAVINCI_INTC_IRQ(48)
-#define IRQ_DM355_GPIO5 DAVINCI_INTC_IRQ(49)
-#define IRQ_DM355_GPIO6 DAVINCI_INTC_IRQ(50)
-#define IRQ_DM355_GPIO7 DAVINCI_INTC_IRQ(51)
-#define IRQ_DM355_GPIO8 DAVINCI_INTC_IRQ(52)
-#define IRQ_DM355_GPIO9 DAVINCI_INTC_IRQ(53)
-#define IRQ_DM355_GPIOBNK0 DAVINCI_INTC_IRQ(54)
-#define IRQ_DM355_GPIOBNK1 DAVINCI_INTC_IRQ(55)
-#define IRQ_DM355_GPIOBNK2 DAVINCI_INTC_IRQ(56)
-#define IRQ_DM355_GPIOBNK3 DAVINCI_INTC_IRQ(57)
-#define IRQ_DM355_GPIOBNK4 DAVINCI_INTC_IRQ(58)
-#define IRQ_DM355_GPIOBNK5 DAVINCI_INTC_IRQ(59)
-#define IRQ_DM355_GPIOBNK6 DAVINCI_INTC_IRQ(60)
-
-/* DaVinci DM365-specific Interrupts */
-#define IRQ_DM365_INSFINT DAVINCI_INTC_IRQ(7)
-#define IRQ_DM365_IMXINT1 DAVINCI_INTC_IRQ(8)
-#define IRQ_DM365_IMXINT0 DAVINCI_INTC_IRQ(10)
-#define IRQ_DM365_KLD_ARMINT DAVINCI_INTC_IRQ(10)
-#define IRQ_DM365_IMCOPINT DAVINCI_INTC_IRQ(11)
-#define IRQ_DM365_RTOINT DAVINCI_INTC_IRQ(13)
-#define IRQ_DM365_TINT5 DAVINCI_INTC_IRQ(14)
-#define IRQ_DM365_TINT6 DAVINCI_INTC_IRQ(15)
-#define IRQ_DM365_SPINT2_1 DAVINCI_INTC_IRQ(21)
-#define IRQ_DM365_TINT7 DAVINCI_INTC_IRQ(22)
-#define IRQ_DM365_SDIOINT0 DAVINCI_INTC_IRQ(23)
-#define IRQ_DM365_MMCINT1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DM365_PWMINT3 DAVINCI_INTC_IRQ(28)
-#define IRQ_DM365_RTCINT DAVINCI_INTC_IRQ(29)
-#define IRQ_DM365_SDIOINT1 DAVINCI_INTC_IRQ(31)
-#define IRQ_DM365_SPIINT0_0 DAVINCI_INTC_IRQ(42)
-#define IRQ_DM365_SPIINT3_0 DAVINCI_INTC_IRQ(43)
-#define IRQ_DM365_GPIO0 DAVINCI_INTC_IRQ(44)
-#define IRQ_DM365_GPIO1 DAVINCI_INTC_IRQ(45)
-#define IRQ_DM365_GPIO2 DAVINCI_INTC_IRQ(46)
-#define IRQ_DM365_GPIO3 DAVINCI_INTC_IRQ(47)
-#define IRQ_DM365_GPIO4 DAVINCI_INTC_IRQ(48)
-#define IRQ_DM365_GPIO5 DAVINCI_INTC_IRQ(49)
-#define IRQ_DM365_GPIO6 DAVINCI_INTC_IRQ(50)
-#define IRQ_DM365_GPIO7 DAVINCI_INTC_IRQ(51)
-#define IRQ_DM365_EMAC_RXTHRESH DAVINCI_INTC_IRQ(52)
-#define IRQ_DM365_EMAC_RXPULSE DAVINCI_INTC_IRQ(53)
-#define IRQ_DM365_EMAC_TXPULSE DAVINCI_INTC_IRQ(54)
-#define IRQ_DM365_EMAC_MISCPULSE DAVINCI_INTC_IRQ(55)
-#define IRQ_DM365_GPIO12 DAVINCI_INTC_IRQ(56)
-#define IRQ_DM365_GPIO13 DAVINCI_INTC_IRQ(57)
-#define IRQ_DM365_GPIO14 DAVINCI_INTC_IRQ(58)
-#define IRQ_DM365_GPIO15 DAVINCI_INTC_IRQ(59)
-#define IRQ_DM365_ADCINT DAVINCI_INTC_IRQ(59)
-#define IRQ_DM365_KEYINT DAVINCI_INTC_IRQ(60)
-#define IRQ_DM365_TCERRINT2 DAVINCI_INTC_IRQ(61)
-#define IRQ_DM365_TCERRINT3 DAVINCI_INTC_IRQ(62)
-#define IRQ_DM365_EMUINT DAVINCI_INTC_IRQ(63)
-
-/* DA8XX interrupts */
-#define IRQ_DA8XX_COMMTX DAVINCI_INTC_IRQ(0)
-#define IRQ_DA8XX_COMMRX DAVINCI_INTC_IRQ(1)
-#define IRQ_DA8XX_NINT DAVINCI_INTC_IRQ(2)
-#define IRQ_DA8XX_EVTOUT0 DAVINCI_INTC_IRQ(3)
-#define IRQ_DA8XX_EVTOUT1 DAVINCI_INTC_IRQ(4)
-#define IRQ_DA8XX_EVTOUT2 DAVINCI_INTC_IRQ(5)
-#define IRQ_DA8XX_EVTOUT3 DAVINCI_INTC_IRQ(6)
-#define IRQ_DA8XX_EVTOUT4 DAVINCI_INTC_IRQ(7)
-#define IRQ_DA8XX_EVTOUT5 DAVINCI_INTC_IRQ(8)
-#define IRQ_DA8XX_EVTOUT6 DAVINCI_INTC_IRQ(9)
-#define IRQ_DA8XX_EVTOUT7 DAVINCI_INTC_IRQ(10)
-#define IRQ_DA8XX_CCINT0 DAVINCI_INTC_IRQ(11)
-#define IRQ_DA8XX_CCERRINT DAVINCI_INTC_IRQ(12)
-#define IRQ_DA8XX_TCERRINT0 DAVINCI_INTC_IRQ(13)
-#define IRQ_DA8XX_AEMIFINT DAVINCI_INTC_IRQ(14)
-#define IRQ_DA8XX_I2CINT0 DAVINCI_INTC_IRQ(15)
-#define IRQ_DA8XX_MMCSDINT0 DAVINCI_INTC_IRQ(16)
-#define IRQ_DA8XX_MMCSDINT1 DAVINCI_INTC_IRQ(17)
-#define IRQ_DA8XX_ALLINT0 DAVINCI_INTC_IRQ(18)
-#define IRQ_DA8XX_RTC DAVINCI_INTC_IRQ(19)
-#define IRQ_DA8XX_SPINT0 DAVINCI_INTC_IRQ(20)
-#define IRQ_DA8XX_TINT12_0 DAVINCI_INTC_IRQ(21)
-#define IRQ_DA8XX_TINT34_0 DAVINCI_INTC_IRQ(22)
-#define IRQ_DA8XX_TINT12_1 DAVINCI_INTC_IRQ(23)
-#define IRQ_DA8XX_TINT34_1 DAVINCI_INTC_IRQ(24)
-#define IRQ_DA8XX_UARTINT0 DAVINCI_INTC_IRQ(25)
-#define IRQ_DA8XX_KEYMGRINT DAVINCI_INTC_IRQ(26)
-#define IRQ_DA8XX_SECINT DAVINCI_INTC_IRQ(26)
-#define IRQ_DA8XX_SECKEYERR DAVINCI_INTC_IRQ(26)
-#define IRQ_DA8XX_CHIPINT0 DAVINCI_INTC_IRQ(28)
-#define IRQ_DA8XX_CHIPINT1 DAVINCI_INTC_IRQ(29)
-#define IRQ_DA8XX_CHIPINT2 DAVINCI_INTC_IRQ(30)
-#define IRQ_DA8XX_CHIPINT3 DAVINCI_INTC_IRQ(31)
-#define IRQ_DA8XX_TCERRINT1 DAVINCI_INTC_IRQ(32)
-#define IRQ_DA8XX_C0_RX_THRESH_PULSE DAVINCI_INTC_IRQ(33)
-#define IRQ_DA8XX_C0_RX_PULSE DAVINCI_INTC_IRQ(34)
-#define IRQ_DA8XX_C0_TX_PULSE DAVINCI_INTC_IRQ(35)
-#define IRQ_DA8XX_C0_MISC_PULSE DAVINCI_INTC_IRQ(36)
-#define IRQ_DA8XX_C1_RX_THRESH_PULSE DAVINCI_INTC_IRQ(37)
-#define IRQ_DA8XX_C1_RX_PULSE DAVINCI_INTC_IRQ(38)
-#define IRQ_DA8XX_C1_TX_PULSE DAVINCI_INTC_IRQ(39)
-#define IRQ_DA8XX_C1_MISC_PULSE DAVINCI_INTC_IRQ(40)
-#define IRQ_DA8XX_MEMERR DAVINCI_INTC_IRQ(41)
-#define IRQ_DA8XX_GPIO0 DAVINCI_INTC_IRQ(42)
-#define IRQ_DA8XX_GPIO1 DAVINCI_INTC_IRQ(43)
-#define IRQ_DA8XX_GPIO2 DAVINCI_INTC_IRQ(44)
-#define IRQ_DA8XX_GPIO3 DAVINCI_INTC_IRQ(45)
-#define IRQ_DA8XX_GPIO4 DAVINCI_INTC_IRQ(46)
-#define IRQ_DA8XX_GPIO5 DAVINCI_INTC_IRQ(47)
-#define IRQ_DA8XX_GPIO6 DAVINCI_INTC_IRQ(48)
-#define IRQ_DA8XX_GPIO7 DAVINCI_INTC_IRQ(49)
-#define IRQ_DA8XX_GPIO8 DAVINCI_INTC_IRQ(50)
-#define IRQ_DA8XX_I2CINT1 DAVINCI_INTC_IRQ(51)
-#define IRQ_DA8XX_LCDINT DAVINCI_INTC_IRQ(52)
-#define IRQ_DA8XX_UARTINT1 DAVINCI_INTC_IRQ(53)
-#define IRQ_DA8XX_MCASPINT DAVINCI_INTC_IRQ(54)
-#define IRQ_DA8XX_ALLINT1 DAVINCI_INTC_IRQ(55)
-#define IRQ_DA8XX_SPINT1 DAVINCI_INTC_IRQ(56)
-#define IRQ_DA8XX_UHPI_INT1 DAVINCI_INTC_IRQ(57)
-#define IRQ_DA8XX_USB_INT DAVINCI_INTC_IRQ(58)
-#define IRQ_DA8XX_IRQN DAVINCI_INTC_IRQ(59)
-#define IRQ_DA8XX_RWAKEUP DAVINCI_INTC_IRQ(60)
-#define IRQ_DA8XX_UARTINT2 DAVINCI_INTC_IRQ(61)
-#define IRQ_DA8XX_DFTSSINT DAVINCI_INTC_IRQ(62)
-#define IRQ_DA8XX_EHRPWM0 DAVINCI_INTC_IRQ(63)
-#define IRQ_DA8XX_EHRPWM0TZ DAVINCI_INTC_IRQ(64)
-#define IRQ_DA8XX_EHRPWM1 DAVINCI_INTC_IRQ(65)
-#define IRQ_DA8XX_EHRPWM1TZ DAVINCI_INTC_IRQ(66)
-#define IRQ_DA8XX_ECAP0 DAVINCI_INTC_IRQ(69)
-#define IRQ_DA8XX_ECAP1 DAVINCI_INTC_IRQ(70)
-#define IRQ_DA8XX_ECAP2 DAVINCI_INTC_IRQ(71)
-#define IRQ_DA8XX_ARMCLKSTOPREQ DAVINCI_INTC_IRQ(90)
-
-/* DA830 specific interrupts */
-#define IRQ_DA830_MPUERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA830_IOPUERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA830_BOOTCFGERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA830_EHRPWM2 DAVINCI_INTC_IRQ(67)
-#define IRQ_DA830_EHRPWM2TZ DAVINCI_INTC_IRQ(68)
-#define IRQ_DA830_EQEP0 DAVINCI_INTC_IRQ(72)
-#define IRQ_DA830_EQEP1 DAVINCI_INTC_IRQ(73)
-#define IRQ_DA830_T12CMPINT0_0 DAVINCI_INTC_IRQ(74)
-#define IRQ_DA830_T12CMPINT1_0 DAVINCI_INTC_IRQ(75)
-#define IRQ_DA830_T12CMPINT2_0 DAVINCI_INTC_IRQ(76)
-#define IRQ_DA830_T12CMPINT3_0 DAVINCI_INTC_IRQ(77)
-#define IRQ_DA830_T12CMPINT4_0 DAVINCI_INTC_IRQ(78)
-#define IRQ_DA830_T12CMPINT5_0 DAVINCI_INTC_IRQ(79)
-#define IRQ_DA830_T12CMPINT6_0 DAVINCI_INTC_IRQ(80)
-#define IRQ_DA830_T12CMPINT7_0 DAVINCI_INTC_IRQ(81)
-#define IRQ_DA830_T12CMPINT0_1 DAVINCI_INTC_IRQ(82)
-#define IRQ_DA830_T12CMPINT1_1 DAVINCI_INTC_IRQ(83)
-#define IRQ_DA830_T12CMPINT2_1 DAVINCI_INTC_IRQ(84)
-#define IRQ_DA830_T12CMPINT3_1 DAVINCI_INTC_IRQ(85)
-#define IRQ_DA830_T12CMPINT4_1 DAVINCI_INTC_IRQ(86)
-#define IRQ_DA830_T12CMPINT5_1 DAVINCI_INTC_IRQ(87)
-#define IRQ_DA830_T12CMPINT6_1 DAVINCI_INTC_IRQ(88)
-#define IRQ_DA830_T12CMPINT7_1 DAVINCI_INTC_IRQ(89)
-
-/* DA850 speicific interrupts */
-#define IRQ_DA850_MPUADDRERR0 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_MPUPROTERR0 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR0 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR0 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR2 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR2 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_BOOTCFG_ADDR_ERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_BOOTCFG_PROT_ERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_MPUADDRERR1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_MPUPROTERR1 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR3 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR3 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR4 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR4 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUADDRERR5 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_IOPUPROTERR5 DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_MIOPU_BOOTCFG_ERR DAVINCI_INTC_IRQ(27)
-#define IRQ_DA850_SATAINT DAVINCI_INTC_IRQ(67)
-#define IRQ_DA850_TINT12_2 DAVINCI_INTC_IRQ(68)
-#define IRQ_DA850_TINT34_2 DAVINCI_INTC_IRQ(68)
-#define IRQ_DA850_TINTALL_2 DAVINCI_INTC_IRQ(68)
-#define IRQ_DA850_MMCSDINT0_1 DAVINCI_INTC_IRQ(72)
-#define IRQ_DA850_MMCSDINT1_1 DAVINCI_INTC_IRQ(73)
-#define IRQ_DA850_T12CMPINT0_2 DAVINCI_INTC_IRQ(74)
-#define IRQ_DA850_T12CMPINT1_2 DAVINCI_INTC_IRQ(75)
-#define IRQ_DA850_T12CMPINT2_2 DAVINCI_INTC_IRQ(76)
-#define IRQ_DA850_T12CMPINT3_2 DAVINCI_INTC_IRQ(77)
-#define IRQ_DA850_T12CMPINT4_2 DAVINCI_INTC_IRQ(78)
-#define IRQ_DA850_T12CMPINT5_2 DAVINCI_INTC_IRQ(79)
-#define IRQ_DA850_T12CMPINT6_2 DAVINCI_INTC_IRQ(80)
-#define IRQ_DA850_T12CMPINT7_2 DAVINCI_INTC_IRQ(81)
-#define IRQ_DA850_T12CMPINT0_3 DAVINCI_INTC_IRQ(82)
-#define IRQ_DA850_T12CMPINT1_3 DAVINCI_INTC_IRQ(83)
-#define IRQ_DA850_T12CMPINT2_3 DAVINCI_INTC_IRQ(84)
-#define IRQ_DA850_T12CMPINT3_3 DAVINCI_INTC_IRQ(85)
-#define IRQ_DA850_T12CMPINT4_3 DAVINCI_INTC_IRQ(86)
-#define IRQ_DA850_T12CMPINT5_3 DAVINCI_INTC_IRQ(87)
-#define IRQ_DA850_T12CMPINT6_3 DAVINCI_INTC_IRQ(88)
-#define IRQ_DA850_T12CMPINT7_3 DAVINCI_INTC_IRQ(89)
-#define IRQ_DA850_RPIINT DAVINCI_INTC_IRQ(91)
-#define IRQ_DA850_VPIFINT DAVINCI_INTC_IRQ(92)
-#define IRQ_DA850_CCINT1 DAVINCI_INTC_IRQ(93)
-#define IRQ_DA850_CCERRINT1 DAVINCI_INTC_IRQ(94)
-#define IRQ_DA850_TCERRINT2 DAVINCI_INTC_IRQ(95)
-#define IRQ_DA850_TINT12_3 DAVINCI_INTC_IRQ(96)
-#define IRQ_DA850_TINT34_3 DAVINCI_INTC_IRQ(96)
-#define IRQ_DA850_TINTALL_3 DAVINCI_INTC_IRQ(96)
-#define IRQ_DA850_MCBSP0RINT DAVINCI_INTC_IRQ(97)
-#define IRQ_DA850_MCBSP0XINT DAVINCI_INTC_IRQ(98)
-#define IRQ_DA850_MCBSP1RINT DAVINCI_INTC_IRQ(99)
-#define IRQ_DA850_MCBSP1XINT DAVINCI_INTC_IRQ(100)
-
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index fdfe03669d9f..eec6a14d034a 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -18,7 +18,6 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index feb300670f43..42ffc6c7e5d8 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -9,7 +9,6 @@
#include <linux/usb/musb.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
#include <linux/platform_data/usb-davinci.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 97+ messages in thread* Re: [PATCH 35/35] ARM: davinci: remove mach/irqs.h
2019-01-31 13:39 ` [PATCH 35/35] ARM: davinci: remove mach/irqs.h Bartosz Golaszewski
@ 2019-02-05 1:06 ` David Lechner
0 siblings, 0 replies; 97+ messages in thread
From: David Lechner @ 2019-02-05 1:06 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> We can now remove mach/irqs.h as there are no more users.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
Reviewed-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (34 preceding siblings ...)
2019-01-31 13:39 ` [PATCH 35/35] ARM: davinci: remove mach/irqs.h Bartosz Golaszewski
@ 2019-02-04 21:49 ` David Lechner
2019-02-05 16:11 ` Bartosz Golaszewski
2019-02-07 15:24 ` Sekhar Nori
36 siblings, 1 reply; 97+ messages in thread
From: David Lechner @ 2019-02-04 21:49 UTC (permalink / raw)
To: Bartosz Golaszewski, Sekhar Nori, Kevin Hilman, Thomas Gleixner,
Jason Cooper, Marc Zyngier
Cc: Bartosz Golaszewski, linux-kernel, linux-arm-kernel
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> the irqchip drivers and moves them over to drivers/irqchip.
>
This has been on my todo list for years, but I've never had enough
time to figure it out. Nice to see it finally getting done!
Series tested on LEGO MINDSTORMS EV3 (da850-like). I can now use
IIO triggers without having to patch the kernel to add extra
interrupts.
Tested-by: David Lechner <david@lechnology.com>
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-02-04 21:49 ` [PATCH 00/35] ARM: davinci: modernize the irq support David Lechner
@ 2019-02-05 16:11 ` Bartosz Golaszewski
2019-02-08 11:43 ` Sekhar Nori
0 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-05 16:11 UTC (permalink / raw)
To: David Lechner, Sekhar Nori
Cc: Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Bartosz Golaszewski, Linux Kernel Mailing List, Linux ARM
pon., 4 lut 2019 o 22:49 David Lechner <david@lechnology.com> napisał(a):
>
> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >
> > This series ports the davinci platform to using SPARSE_IRQ, cleans up
> > the irqchip drivers and moves them over to drivers/irqchip.
> >
>
> This has been on my todo list for years, but I've never had enough
> time to figure it out. Nice to see it finally getting done!
>
> Series tested on LEGO MINDSTORMS EV3 (da850-like). I can now use
> IIO triggers without having to patch the kernel to add extra
> interrupts.
>
> Tested-by: David Lechner <david@lechnology.com>
>
>
Wow thanks for taking the time to review it!
I'll address certain remarks - for those unaddressed - I'll fix them in v2.
Sekhar: are you fine with sending both the clocksource and interrupt
series together next time with additional patches on top making
davinci part of multi_v5_defconfig?
Best regards,
Bartosz Golaszewski
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-02-05 16:11 ` Bartosz Golaszewski
@ 2019-02-08 11:43 ` Sekhar Nori
2019-02-08 12:27 ` Bartosz Golaszewski
0 siblings, 1 reply; 97+ messages in thread
From: Sekhar Nori @ 2019-02-08 11:43 UTC (permalink / raw)
To: Bartosz Golaszewski, David Lechner
Cc: Kevin Hilman, Thomas Gleixner, Jason Cooper, Marc Zyngier,
Bartosz Golaszewski, Linux Kernel Mailing List, Linux ARM
On 05/02/19 9:41 PM, Bartosz Golaszewski wrote:
> pon., 4 lut 2019 o 22:49 David Lechner <david@lechnology.com> napisał(a):
>>
>> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>>>
>>> This series ports the davinci platform to using SPARSE_IRQ, cleans up
>>> the irqchip drivers and moves them over to drivers/irqchip.
>>>
>>
>> This has been on my todo list for years, but I've never had enough
>> time to figure it out. Nice to see it finally getting done!
>>
>> Series tested on LEGO MINDSTORMS EV3 (da850-like). I can now use
>> IIO triggers without having to patch the kernel to add extra
>> interrupts.
>>
>> Tested-by: David Lechner <david@lechnology.com>
>>
>>
>
> Wow thanks for taking the time to review it!
>
> I'll address certain remarks - for those unaddressed - I'll fix them in v2.
>
> Sekhar: are you fine with sending both the clocksource and interrupt
> series together next time with additional patches on top making
> davinci part of multi_v5_defconfig?
I think its better to keep them separate. You can base both on latest
mainline.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-02-08 11:43 ` Sekhar Nori
@ 2019-02-08 12:27 ` Bartosz Golaszewski
2019-02-08 12:29 ` Sekhar Nori
0 siblings, 1 reply; 97+ messages in thread
From: Bartosz Golaszewski @ 2019-02-08 12:27 UTC (permalink / raw)
To: Sekhar Nori
Cc: David Lechner, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
pt., 8 lut 2019 o 12:43 Sekhar Nori <nsekhar@ti.com> napisał(a):
>
> On 05/02/19 9:41 PM, Bartosz Golaszewski wrote:
> > pon., 4 lut 2019 o 22:49 David Lechner <david@lechnology.com> napisał(a):
> >>
> >> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
> >>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> >>>
> >>> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> >>> the irqchip drivers and moves them over to drivers/irqchip.
> >>>
> >>
> >> This has been on my todo list for years, but I've never had enough
> >> time to figure it out. Nice to see it finally getting done!
> >>
> >> Series tested on LEGO MINDSTORMS EV3 (da850-like). I can now use
> >> IIO triggers without having to patch the kernel to add extra
> >> interrupts.
> >>
> >> Tested-by: David Lechner <david@lechnology.com>
> >>
> >>
> >
> > Wow thanks for taking the time to review it!
> >
> > I'll address certain remarks - for those unaddressed - I'll fix them in v2.
> >
> > Sekhar: are you fine with sending both the clocksource and interrupt
> > series together next time with additional patches on top making
> > davinci part of multi_v5_defconfig?
>
> I think its better to keep them separate. You can base both on latest
> mainline.
>
> Thanks,
> Sekhar
If you prefer I can keep them separate, although there were a couple
conflicts when I merged them in my tree, which are now resolved.
Let's maybe start with the interrupts (I'll send a v2 tonight if you
don't have any more comments), and once you have that in your tree, I
will rebase the timer code and then the multi_v5 series.
Bart
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-02-08 12:27 ` Bartosz Golaszewski
@ 2019-02-08 12:29 ` Sekhar Nori
0 siblings, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-08 12:29 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: David Lechner, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier, Bartosz Golaszewski, Linux Kernel Mailing List,
Linux ARM
On 08/02/19 5:57 PM, Bartosz Golaszewski wrote:
> pt., 8 lut 2019 o 12:43 Sekhar Nori <nsekhar@ti.com> napisał(a):
>>
>> On 05/02/19 9:41 PM, Bartosz Golaszewski wrote:
>>> pon., 4 lut 2019 o 22:49 David Lechner <david@lechnology.com> napisał(a):
>>>>
>>>> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
>>>>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>>>>>
>>>>> This series ports the davinci platform to using SPARSE_IRQ, cleans up
>>>>> the irqchip drivers and moves them over to drivers/irqchip.
>>>>>
>>>>
>>>> This has been on my todo list for years, but I've never had enough
>>>> time to figure it out. Nice to see it finally getting done!
>>>>
>>>> Series tested on LEGO MINDSTORMS EV3 (da850-like). I can now use
>>>> IIO triggers without having to patch the kernel to add extra
>>>> interrupts.
>>>>
>>>> Tested-by: David Lechner <david@lechnology.com>
>>>>
>>>>
>>>
>>> Wow thanks for taking the time to review it!
>>>
>>> I'll address certain remarks - for those unaddressed - I'll fix them in v2.
>>>
>>> Sekhar: are you fine with sending both the clocksource and interrupt
>>> series together next time with additional patches on top making
>>> davinci part of multi_v5_defconfig?
>>
>> I think its better to keep them separate. You can base both on latest
>> mainline.
>>
>> Thanks,
>> Sekhar
>
> If you prefer I can keep them separate, although there were a couple
> conflicts when I merged them in my tree, which are now resolved.
>
> Let's maybe start with the interrupts (I'll send a v2 tonight if you
> don't have any more comments), and once you have that in your tree, I
> will rebase the timer code and then the multi_v5 series.
Sounds good. I have no more comments on the interrupt series. We will
need acks from irqchip maintainers before merging though.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [PATCH 00/35] ARM: davinci: modernize the irq support
2019-01-31 13:38 [PATCH 00/35] ARM: davinci: modernize the irq support Bartosz Golaszewski
` (35 preceding siblings ...)
2019-02-04 21:49 ` [PATCH 00/35] ARM: davinci: modernize the irq support David Lechner
@ 2019-02-07 15:24 ` Sekhar Nori
36 siblings, 0 replies; 97+ messages in thread
From: Sekhar Nori @ 2019-02-07 15:24 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Thomas Gleixner, Jason Cooper,
Marc Zyngier
Cc: linux-arm-kernel, linux-kernel, Bartosz Golaszewski
Hi Bartosz,
On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> the irqchip drivers and moves them over to drivers/irqchip.
>
> The series can be logically split into four parts. The first (1-8) aims
> at introducing support for SPARSE_IRQ. It contains a couple changes
> required for that functionality and the final patch actually selecting
> it.
>
> Second part (9-18) makes the aintc driver suitable for drivers/irqchip
> and eventually moves it over there.
>
> Part 3 (19-31) does the same for the cp-intc driver.
>
> Last part (32-35) aims at removing mach/irqs.h as it's no longer needed
> with SPARSE_IRQ selected.
>
> The series has been tested on da850-lcdk (for cp-intc) and
> dm365-evm (for aintc).
Looks good to me overall, apart from some comments on individual
patches. I boot tested on all 6 DaVinci SoCs. Also did a basic iperf
test on DA850 to check that performance remains same as before.
Nice work!
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 97+ messages in thread