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From: Borislav Petkov <bp@alien8.de>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Yash Shah <yash.shah@sifive.com>,
	linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org,
	palmer@sifive.com, linux-kernel@vger.kernel.org,
	robh+dt@kernel.org, mark.rutland@arm.com, aou@eecs.berkeley.edu,
	mchehab@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller
Date: Mon, 25 Mar 2019 07:54:54 +0100	[thread overview]
Message-ID: <20190325065453.GC12016@zn.tnic> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1903241705460.8028@viisi.sifive.com>

On Sun, Mar 24, 2019 at 05:16:17PM -0700, Paul Walmsley wrote:
> Looking at the Synopsys,

Look again at synopsys_edac.

>  Highbank,

Yes, that one and octeon.

> PowerPC 4xx, and

also a single ppc4xx_edac driver.

> TI EDAC drivers,

There's TI drivers, plural? I see only ti_edac.c. Also, per-vendor.

> all of those are clearly for IP block error management, rather than
> platform error management. Has the upstream guidance changed since
> those drivers were merged?

There are others which are per-platform and work just fine this way:
xgene_edac, altera_edac, layerscape_edac, qcom_edac, synopsys_edac...

The problem with per IP block is that if those compilation units would
need to share info or communicate, then that is impossible nowadays and
you'd need to build something on your own.

Also, the EDAC core supports only one driver.

> The core issue for us is that we don't have a generalized "ECC management" 
> IP block.  And I would just as soon not fake one in the DT data, since the 
> general DT guidance is that the data in DT is meant to describe the actual 
> hardware.

Look at how the others I mentioned above do it.

> Would it make more sense to put this driver outside of drivers/edac?

If you're not going to need any EDAC facilities - which are not a lot,
btw :) - you can do whatever you prefer.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

  reply	other threads:[~2019-03-25  6:54 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-12  9:20 [PATCH 0/2] L2 Cache EDAC Support for HiFive Unleashed Yash Shah
2019-03-12  9:21 ` [PATCH 1/2] edac: sifive: Add DT documentation for SiFive L2 cache Controller Yash Shah
2019-03-28 13:16   ` Rob Herring
2019-03-28 18:47     ` James Morse
2019-03-29 14:11       ` Rob Herring
2019-03-29 14:27         ` Borislav Petkov
2019-03-29 19:41           ` Rob Herring
2019-03-29 20:24             ` Borislav Petkov
2019-04-04  1:04               ` Rob Herring
2019-04-01 16:36         ` James Morse
2019-04-04  1:17           ` Rob Herring
2019-03-12  9:21 ` [PATCH 2/2] sifive: edac: Add EDAC driver for Sifive l2 Cache Controller Yash Shah
2019-03-12  9:28   ` Borislav Petkov
2019-03-25  0:16     ` Paul Walmsley
2019-03-25  6:54       ` Borislav Petkov [this message]
2019-03-25 21:18         ` Paul Walmsley
2019-03-25 21:47           ` Borislav Petkov
2019-03-12 16:31   ` Paul Walmsley
2019-03-12 16:32 ` [PATCH 0/2] L2 Cache EDAC Support for HiFive Unleashed Paul Walmsley

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