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* [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature
@ 2019-12-09 14:50 Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Hsin-Yi Wang
                   ` (3 more replies)
  0 siblings, 4 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 14:50 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

[Resend to cc more reviewers]

This series is to add anx7688 bridge driver. It is extended from
previous work[1].

The first 2 patches are same as previous version, with some modification
due to drm core function changes and use regmap abstraction.

We add an optional feature bypass-gpios so that driver can decide if it serves
as simple pass-thru by reading GPIO values, which is controlled by
hardware.

[1] https://lore.kernel.org/lkml/1467013727-11482-1-git-send-email-drinkcat@chromium.org/

Hsin-Yi Wang (2):
  dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  drm: bridge: anx7688: Support bypass GPIO feature

Nicolas Boichat (2):
  dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter
    binding
  drm: bridge: anx7688: Add anx7688 bridge driver support.

 .../bindings/display/bridge/anx7688.txt       |  70 +++++
 drivers/gpu/drm/bridge/Kconfig                |   9 +
 drivers/gpu/drm/bridge/Makefile               |   1 +
 drivers/gpu/drm/bridge/analogix-anx7688.c     | 260 ++++++++++++++++++
 4 files changed, 340 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/anx7688.txt
 create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c

-- 
2.24.0.393.g34dc348eaf-goog


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding
  2019-12-09 14:50 [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature Hsin-Yi Wang
@ 2019-12-09 14:50 ` Hsin-Yi Wang
  2019-12-09 14:53   ` Laurent Pinchart
  2019-12-09 14:50 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 14:50 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

From: Nicolas Boichat <drinkcat@chromium.org>

Add support for analogix,anx7688

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 .../bindings/display/bridge/anx7688.txt       | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/anx7688.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.txt b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
new file mode 100644
index 000000000000..78b55bdb18f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
@@ -0,0 +1,32 @@
+Analogix ANX7688 SlimPort (Single-Chip Transmitter for DP over USB-C)
+---------------------------------------------------------------------
+
+The ANX7688 is a single-chip mobile transmitter to support 4K 60 frames per
+second (4096x2160p60) or FHD 120 frames per second (1920x1080p120) video
+resolution from a smartphone or tablet with full function USB-C.
+
+This binding only describes the HDMI to DP display bridge.
+
+Required properties:
+
+ - compatible          : "analogix,anx7688"
+ - reg                 : I2C address of the device (fixed at 0x2c)
+
+Optional properties:
+
+ - Video port for HDMI input, using the DT bindings defined in [1].
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+	anx7688: anx7688@2c {
+		compatible = "analogix,anx7688";
+		reg = <0x2c>;
+
+		port {
+			anx7688_in: endpoint {
+				remote-endpoint = <&hdmi0_out>;
+			};
+		};
+	};
-- 
2.24.0.393.g34dc348eaf-goog


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-09 14:50 [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Hsin-Yi Wang
@ 2019-12-09 14:50 ` Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 4/4] drm: bridge: anx7688: Support bypass GPIO feature Hsin-Yi Wang
  3 siblings, 0 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 14:50 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

From: Nicolas Boichat <drinkcat@chromium.org>

ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
that has an internal microcontroller.

The only reason a Linux kernel driver is necessary is to reject
resolutions that require more bandwidth than what is available on
the DP side. DP bandwidth and lane count are reported by the bridge
via 2 registers on I2C.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 drivers/gpu/drm/bridge/Kconfig            |   9 +
 drivers/gpu/drm/bridge/Makefile           |   1 +
 drivers/gpu/drm/bridge/analogix-anx7688.c | 203 ++++++++++++++++++++++
 3 files changed, 213 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 34362976cd6f..1f3fc6bec842 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
 menu "Display Interface Bridges"
 	depends on DRM && DRM_BRIDGE
 
+config DRM_ANALOGIX_ANX7688
+	tristate "Analogix ANX7688 bridge"
+	select DRM_KMS_HELPER
+	select REGMAP_I2C
+	---help---
+	  ANX7688 is a transmitter to support DisplayPort over USB-C for
+	  smartphone and tablets.
+	  This driver only supports the HDMI to DP component of the chip.
+
 config DRM_ANALOGIX_ANX78XX
 	tristate "Analogix ANX78XX bridge"
 	select DRM_KMS_HELPER
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 4934fcf5a6f8..7a1e0ec032e6 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
 obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
 obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
 obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
new file mode 100644
index 000000000000..5a3a2251c1c5
--- /dev/null
+++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ANX7688 HDMI->DP bridge driver
+ *
+ * Copyright 2016 Google LLC
+ */
+
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_crtc.h>
+
+/* Register addresses */
+#define VENDOR_ID_REG 0x00
+#define DEVICE_ID_REG 0x02
+
+#define FW_VERSION_REG 0x80
+
+#define DP_BANDWIDTH_REG 0x85
+#define DP_LANE_COUNT_REG 0x86
+
+#define VENDOR_ID 0x1f29
+#define DEVICE_ID 0x7688
+
+/* First supported firmware version (0.85) */
+#define MINIMUM_FW_VERSION 0x0085
+
+struct anx7688 {
+	struct drm_bridge bridge;
+	struct i2c_client *client;
+	struct regmap *regmap;
+
+	bool filter;
+};
+
+static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge)
+{
+	return container_of(bridge, struct anx7688, bridge);
+}
+
+static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
+				      const struct drm_display_mode *mode,
+				      struct drm_display_mode *adjusted_mode)
+{
+	struct anx7688 *anx7688 = bridge_to_anx7688(bridge);
+	u8 regs[2];
+	u8 dpbw, lanecount;
+	int totalbw, requiredbw;
+	int ret;
+
+	if (!anx7688->filter)
+		return true;
+
+	/* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */
+	ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2);
+	if (ret < 0) {
+		dev_err(&anx7688->client->dev,
+			"Failed to read bandwidth/lane count\n");
+		return false;
+	}
+	dpbw = regs[0];
+	lanecount = regs[1];
+
+	/* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */
+	if (dpbw > 0x19 || lanecount > 2) {
+		dev_err(&anx7688->client->dev,
+			"Invalid bandwidth/lane count (%02x/%d)\n",
+			dpbw, lanecount);
+		return false;
+	}
+
+	/* Compute available bandwidth (kHz) */
+	totalbw = dpbw * lanecount * 270000 * 8 / 10;
+
+	/* Required bandwidth (8 bpc, kHz) */
+	requiredbw = mode->clock * 8 * 3;
+
+	dev_dbg(&anx7688->client->dev,
+		"DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n",
+		totalbw, dpbw, lanecount, requiredbw);
+
+	if (totalbw == 0) {
+		dev_warn(&anx7688->client->dev,
+			 "Bandwidth/lane count are 0, not rejecting modes\n");
+		return true;
+	}
+
+	return totalbw >= requiredbw;
+}
+
+static const struct drm_bridge_funcs anx7688_bridge_funcs = {
+	.mode_fixup	= anx7688_bridge_mode_fixup,
+};
+
+static const struct regmap_config anx7688_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+};
+
+static int anx7688_i2c_probe(struct i2c_client *client,
+			     const struct i2c_device_id *id)
+{
+	struct anx7688 *anx7688;
+	struct device *dev = &client->dev;
+	int ret;
+	u8 buffer[4];
+	u16 vendor, device, fwversion;
+
+	anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL);
+	if (!anx7688)
+		return -ENOMEM;
+
+#if IS_ENABLED(CONFIG_OF)
+	anx7688->bridge.of_node = client->dev.of_node;
+#endif
+
+	anx7688->client = client;
+	i2c_set_clientdata(client, anx7688);
+
+	anx7688->regmap =
+		devm_regmap_init_i2c(client, &anx7688_regmap_config);
+
+	/* Read both vendor and device id (4 bytes). */
+	ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4);
+	if (ret) {
+		dev_err(dev, "Failed to read chip vendor/device id\n");
+		return ret;
+	}
+
+	vendor = (u16)buffer[1] << 8 | buffer[0];
+	device = (u16)buffer[3] << 8 | buffer[2];
+	if (vendor != VENDOR_ID || device != DEVICE_ID) {
+		dev_err(dev, "Invalid vendor/device id %04x/%04x\n",
+			vendor, device);
+		return -ENODEV;
+	}
+
+	ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2);
+	if (ret) {
+		dev_err(&client->dev, "Failed to read firmware version\n");
+		return ret;
+	}
+
+	fwversion = (u16)buffer[0] << 8 | buffer[1];
+	dev_info(dev, "ANX7688 firwmare version %02x.%02x\n",
+		 buffer[0], buffer[1]);
+
+	/* FW version >= 0.85 supports bandwidth/lane count registers */
+	if (fwversion >= MINIMUM_FW_VERSION) {
+		anx7688->filter = true;
+	} else {
+		/* Warn, but not fail, for backwards compatibility. */
+		dev_warn(dev,
+			 "Old ANX7688 FW version (%02x.%02x), not filtering\n",
+			 buffer[0], buffer[1]);
+	}
+
+	anx7688->bridge.funcs = &anx7688_bridge_funcs;
+	drm_bridge_add(&anx7688->bridge);
+
+	return 0;
+}
+
+static int anx7688_i2c_remove(struct i2c_client *client)
+{
+	struct anx7688 *anx7688 = i2c_get_clientdata(client);
+
+	drm_bridge_remove(&anx7688->bridge);
+
+	return 0;
+}
+
+static const struct i2c_device_id anx7688_id[] = {
+	{ "anx7688", 0 },
+	{ /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(i2c, anx7688_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id anx7688_match_table[] = {
+	{ .compatible = "analogix,anx7688", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, anx7688_match_table);
+#endif
+
+static struct i2c_driver anx7688_driver = {
+	.driver = {
+		   .name = "anx7688",
+		   .of_match_table = of_match_ptr(anx7688_match_table),
+		  },
+	.probe = anx7688_i2c_probe,
+	.remove = anx7688_i2c_remove,
+	.id_table = anx7688_id,
+};
+
+module_i2c_driver(anx7688_driver);
+
+MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver");
+MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>");
+MODULE_LICENSE("GPL v2");
-- 
2.24.0.393.g34dc348eaf-goog


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  2019-12-09 14:50 [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Hsin-Yi Wang
  2019-12-09 14:50 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
@ 2019-12-09 14:50 ` Hsin-Yi Wang
  2019-12-09 14:55   ` Laurent Pinchart
  2019-12-09 14:50 ` [PATCH RESEND 4/4] drm: bridge: anx7688: Support bypass GPIO feature Hsin-Yi Wang
  3 siblings, 1 reply; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 14:50 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

Support optional feature: bypass GPIO.

Some SoC (eg. mt8173) have a hardware mux that connects to 2 ports:
anx7688 and hdmi. When the GPIO is active, the bridge is bypassed.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 .../bindings/display/bridge/anx7688.txt       | 40 ++++++++++++++++++-
 1 file changed, 39 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.txt b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
index 78b55bdb18f7..44185dcac839 100644
--- a/Documentation/devicetree/bindings/display/bridge/anx7688.txt
+++ b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
@@ -15,10 +15,13 @@ Required properties:
 Optional properties:
 
  - Video port for HDMI input, using the DT bindings defined in [1].
+ - bypass-gpios        : External GPIO. If this GPIO is active, we assume
+ the bridge is bypassed (e.g. by a mux).
+ - pinctrl-0, pinctrl-names: the pincontrol settings to configure bypass GPIO.
 
 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
 
-Example:
+Example 1:
 
 	anx7688: anx7688@2c {
 		compatible = "analogix,anx7688";
@@ -30,3 +33,38 @@ Example:
 			};
 		};
 	};
+
+Example 2:
+
+       anx7688: anx7688@2c {
+               compatible = "analogix,anx7688";
+               status = "okay";
+               reg = <0x2c>;
+               ddc-i2c-bus = <&hdmiddc0>;
+
+               bypass-gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmi_mux_pins>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 { /* input */
+                               reg = <0>;
+
+                               anx7688_in: endpoint {
+                                       remote-endpoint = <&hdmi_out_anx>;
+                               };
+                       };
+
+                       port@1 { /* output */
+                               reg = <1>;
+
+                               anx7688_out: endpoint {
+                                       remote-endpoint = <&hdmi_connector_in>;
+                               };
+                       };
+               };
+       };
+
-- 
2.24.0.393.g34dc348eaf-goog


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH RESEND 4/4] drm: bridge: anx7688: Support bypass GPIO feature
  2019-12-09 14:50 [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature Hsin-Yi Wang
                   ` (2 preceding siblings ...)
  2019-12-09 14:50 ` [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO Hsin-Yi Wang
@ 2019-12-09 14:50 ` Hsin-Yi Wang
  3 siblings, 0 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 14:50 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

Support optional feature: bypass GPIO.

Get GPIO status in irq handler. If GPIO is active, mode_fixup would be
bypassed.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 drivers/gpu/drm/bridge/analogix-anx7688.c | 57 +++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
index 5a3a2251c1c5..1d09db2cf8e9 100644
--- a/drivers/gpu/drm/bridge/analogix-anx7688.c
+++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
@@ -5,11 +5,16 @@
  * Copyright 2016 Google LLC
  */
 
+#include <linux/gpio.h>
 #include <linux/i2c.h>
+#include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/of_gpio.h>
 #include <linux/regmap.h>
 #include <drm/drm_bridge.h>
 #include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_probe_helper.h>
 
 /* Register addresses */
 #define VENDOR_ID_REG 0x00
@@ -31,6 +36,9 @@ struct anx7688 {
 	struct i2c_client *client;
 	struct regmap *regmap;
 
+	struct gpio_desc *gpiod_bypass;
+	int bypass;
+
 	bool filter;
 };
 
@@ -49,6 +57,10 @@ static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
 	int totalbw, requiredbw;
 	int ret;
 
+	/* bypass anx mode fixup */
+	if (anx7688->bypass)
+		return true;
+
 	if (!anx7688->filter)
 		return true;
 
@@ -93,6 +105,19 @@ static const struct drm_bridge_funcs anx7688_bridge_funcs = {
 	.mode_fixup	= anx7688_bridge_mode_fixup,
 };
 
+static irqreturn_t gpio_display_mux_det_threaded_handler(int unused, void *data)
+{
+	struct anx7688 *anx7688 = data;
+
+	anx7688->bypass = gpiod_get_value(anx7688->gpiod_bypass);
+	dev_dbg(&anx7688->client->dev, "Interrupt %d!\n", anx7688->bypass);
+
+	if (anx7688->bridge.dev)
+		drm_kms_helper_hotplug_event(anx7688->bridge.dev);
+
+	return IRQ_HANDLED;
+}
+
 static const struct regmap_config anx7688_regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 8,
@@ -156,6 +181,38 @@ static int anx7688_i2c_probe(struct i2c_client *client,
 			 buffer[0], buffer[1]);
 	}
 
+	/* Optional bypass-gpios */
+	anx7688->gpiod_bypass = devm_gpiod_get_optional(dev, "bypass",
+							GPIOD_IN);
+	if (IS_ERR(anx7688->gpiod_bypass)) {
+		ret = PTR_ERR(anx7688->gpiod_bypass);
+		if (ret != -EPROBE_DEFER)
+			dev_err(dev, "bypass-gpios assigned failed\n");
+		return ret;
+	}
+	if (anx7688->gpiod_bypass) {
+		int irq;
+
+		irq = gpiod_to_irq(anx7688->gpiod_bypass);
+		if (irq < 0) {
+			dev_err(dev, "Failed to get output irq %d\n", irq);
+			return -ENODEV;
+		}
+
+		anx7688->bypass = gpiod_get_value(anx7688->gpiod_bypass);
+
+		ret = devm_request_threaded_irq(dev, irq, NULL,
+				gpio_display_mux_det_threaded_handler,
+				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
+				IRQF_ONESHOT,
+				"gpio-display-mux-det", anx7688);
+		if (ret) {
+			dev_err(dev,
+				"Failed to request MUX_DET threaded irq\n");
+			return ret;
+		}
+	}
+
 	anx7688->bridge.funcs = &anx7688_bridge_funcs;
 	drm_bridge_add(&anx7688->bridge);
 
-- 
2.24.0.393.g34dc348eaf-goog


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding
  2019-12-09 14:50 ` [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Hsin-Yi Wang
@ 2019-12-09 14:53   ` Laurent Pinchart
  2019-12-11  6:29     ` Hsin-Yi Wang
  0 siblings, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-09 14:53 UTC (permalink / raw)
  To: Hsin-Yi Wang
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, devicetree, linux-kernel,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

Hi Hsin-Yi,

Thank you for the patch.

On Mon, Dec 09, 2019 at 10:50:13PM +0800, Hsin-Yi Wang wrote:
> From: Nicolas Boichat <drinkcat@chromium.org>
> 
> Add support for analogix,anx7688
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
>  .../bindings/display/bridge/anx7688.txt       | 32 +++++++++++++++++++

How about converting this to yaml bindings already ? It's fairly simple
and gives you DT validation.

>  1 file changed, 32 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/anx7688.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.txt b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
> new file mode 100644
> index 000000000000..78b55bdb18f7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
> @@ -0,0 +1,32 @@
> +Analogix ANX7688 SlimPort (Single-Chip Transmitter for DP over USB-C)
> +---------------------------------------------------------------------
> +
> +The ANX7688 is a single-chip mobile transmitter to support 4K 60 frames per
> +second (4096x2160p60) or FHD 120 frames per second (1920x1080p120) video
> +resolution from a smartphone or tablet with full function USB-C.
> +
> +This binding only describes the HDMI to DP display bridge.
> +
> +Required properties:
> +
> + - compatible          : "analogix,anx7688"
> + - reg                 : I2C address of the device (fixed at 0x2c)
> +
> +Optional properties:
> +
> + - Video port for HDMI input, using the DT bindings defined in [1].
> +
> +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
> +
> +Example:
> +
> +	anx7688: anx7688@2c {
> +		compatible = "analogix,anx7688";
> +		reg = <0x2c>;
> +
> +		port {
> +			anx7688_in: endpoint {
> +				remote-endpoint = <&hdmi0_out>;
> +			};
> +		};
> +	};
> -- 
> 2.24.0.393.g34dc348eaf-goog
> 

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  2019-12-09 14:50 ` [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO Hsin-Yi Wang
@ 2019-12-09 14:55   ` Laurent Pinchart
  2019-12-09 15:09     ` Hsin-Yi Wang
  0 siblings, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-09 14:55 UTC (permalink / raw)
  To: Hsin-Yi Wang
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, devicetree, linux-kernel,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, p.zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

Hi Hsin-Yi,

Thank you for the patch.

On Mon, Dec 09, 2019 at 10:50:15PM +0800, Hsin-Yi Wang wrote:
> Support optional feature: bypass GPIO.
> 
> Some SoC (eg. mt8173) have a hardware mux that connects to 2 ports:
> anx7688 and hdmi. When the GPIO is active, the bridge is bypassed.

This doesn't look like the right place to fix this, as the mux is
unrelated to the bridge. You would have to duplicate this logic in every
bridge driver otherwise.

Could you describe the hardware topology in a bit more details ? I can
then try to advise on how to best support it.

> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
>  .../bindings/display/bridge/anx7688.txt       | 40 ++++++++++++++++++-
>  1 file changed, 39 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.txt b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
> index 78b55bdb18f7..44185dcac839 100644
> --- a/Documentation/devicetree/bindings/display/bridge/anx7688.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/anx7688.txt
> @@ -15,10 +15,13 @@ Required properties:
>  Optional properties:
>  
>   - Video port for HDMI input, using the DT bindings defined in [1].
> + - bypass-gpios        : External GPIO. If this GPIO is active, we assume
> + the bridge is bypassed (e.g. by a mux).
> + - pinctrl-0, pinctrl-names: the pincontrol settings to configure bypass GPIO.
>  
>  [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
>  
> -Example:
> +Example 1:
>  
>  	anx7688: anx7688@2c {
>  		compatible = "analogix,anx7688";
> @@ -30,3 +33,38 @@ Example:
>  			};
>  		};
>  	};
> +
> +Example 2:
> +
> +       anx7688: anx7688@2c {
> +               compatible = "analogix,anx7688";
> +               status = "okay";
> +               reg = <0x2c>;
> +               ddc-i2c-bus = <&hdmiddc0>;
> +
> +               bypass-gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&hdmi_mux_pins>;
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 { /* input */
> +                               reg = <0>;
> +
> +                               anx7688_in: endpoint {
> +                                       remote-endpoint = <&hdmi_out_anx>;
> +                               };
> +                       };
> +
> +                       port@1 { /* output */
> +                               reg = <1>;
> +
> +                               anx7688_out: endpoint {
> +                                       remote-endpoint = <&hdmi_connector_in>;
> +                               };
> +                       };
> +               };
> +       };
> +

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  2019-12-09 14:55   ` Laurent Pinchart
@ 2019-12-09 15:09     ` Hsin-Yi Wang
  2019-12-09 15:32       ` Laurent Pinchart
  0 siblings, 1 reply; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-09 15:09 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, Devicetree List, lkml,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, Philipp Zabel, Enric Balletbo i Serra,
	Matthias Brugger, Russell King

On Mon, Dec 9, 2019 at 10:55 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Hsin-Yi,
>
> Thank you for the patch.
>
> On Mon, Dec 09, 2019 at 10:50:15PM +0800, Hsin-Yi Wang wrote:
> > Support optional feature: bypass GPIO.
> >
> > Some SoC (eg. mt8173) have a hardware mux that connects to 2 ports:
> > anx7688 and hdmi. When the GPIO is active, the bridge is bypassed.
>
> This doesn't look like the right place to fix this, as the mux is
> unrelated to the bridge. You would have to duplicate this logic in every
> bridge driver otherwise.
>
> Could you describe the hardware topology in a bit more details ? I can
> then try to advise on how to best support it.
>
Hi Laurent,

The mt8173 layout is:

MT8173 HDMI bridge-- hardware mux --- HDMI
                                                   |
                                                    ------------ anx7688
There's a hardware mux that takes mt8173 hdmi as input and has 2
output port: native hdmi and anx7688 bridge.
If gpio is active, we would like it to go to HDMI.

Previous approach is to make hardware mux a generic gpio mux bridge,
but this is probably a very rare use case that is only for
mt8173.(https://lore.kernel.org/lkml/57723AD2.8020806@codeaurora.org/)
We merge the mux and anx7688 to a single bridge and leave this as an
optional feature in this time.

Thanks.

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  2019-12-09 15:09     ` Hsin-Yi Wang
@ 2019-12-09 15:32       ` Laurent Pinchart
  2019-12-11  6:34         ` Hsin-Yi Wang
  0 siblings, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-09 15:32 UTC (permalink / raw)
  To: Hsin-Yi Wang
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, Devicetree List, lkml,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, Philipp Zabel, Enric Balletbo i Serra,
	Matthias Brugger, Russell King

Hi Hsin-Yi,

On Mon, Dec 09, 2019 at 11:09:34PM +0800, Hsin-Yi Wang wrote:
> On Mon, Dec 9, 2019 at 10:55 PM Laurent Pinchart wrote:
> > On Mon, Dec 09, 2019 at 10:50:15PM +0800, Hsin-Yi Wang wrote:
> > > Support optional feature: bypass GPIO.
> > >
> > > Some SoC (eg. mt8173) have a hardware mux that connects to 2 ports:
> > > anx7688 and hdmi. When the GPIO is active, the bridge is bypassed.
> >
> > This doesn't look like the right place to fix this, as the mux is
> > unrelated to the bridge. You would have to duplicate this logic in every
> > bridge driver otherwise.
> >
> > Could you describe the hardware topology in a bit more details ? I can
> > then try to advise on how to best support it.
>
> Hi Laurent,
> 
> The mt8173 layout is:
> 
> MT8173 HDMI bridge-- hardware mux --- HDMI
>                                                    |
>                                                     ------------ anx7688

You may have used a proportional font when writing this, the | doesn't
align with anything using a fixed font. Do I assume correctly that the
hardware multiplexer is actually a demultiplexer with one input and two
outputs ?
                                     +-----------+
+---------+         +------+    /--> | HDMI      |
| MT8173  |  HDMI   |   -->| --/     | Connector |
|  HDMI   | ------> |--/   |         +-----------+
| Encoder |         |    ->| --\     +-----------+      +-----------+
+---------+         +------+    \--> | ANX7688   | ---> | USB-C     |
                                     | Bridge    |      | Connector |
				     +-----------+      +-----------+

> There's a hardware mux that takes mt8173 hdmi as input and has 2
> output port: native hdmi and anx7688 bridge.
> If gpio is active, we would like it to go to HDMI.
> 
> Previous approach is to make hardware mux a generic gpio mux bridge,
> but this is probably a very rare use case that is only for
> mt8173.(https://lore.kernel.org/lkml/57723AD2.8020806@codeaurora.org/)
> We merge the mux and anx7688 to a single bridge and leave this as an
> optional feature in this time.

I think that's a better approach, at least at the DT level. The HDMI
demultiplexer should be represented as a DT node with 3 ports (one input
and two outputs) with a control GPIO.

From a video point of view, the ANX7688 should be represented as a DT
node with 2 ports (one input and one output), regardless of whether it
is used in conjunction with an HDMI switch as shown above, or directly
connected to the output of an HDMI encoder. However, as the ANX7688
supports both DP output and USB-C output, the situation may be slightly
more complex. Please see https://patchwork.kernel.org/patch/11184895/
for a similar discussion, related to the ANX7625.

In any case, I don't think the ANX7688 should care about the GPIO.

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding
  2019-12-09 14:53   ` Laurent Pinchart
@ 2019-12-11  6:29     ` Hsin-Yi Wang
  0 siblings, 0 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-11  6:29 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, Devicetree List, lkml,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, Philipp Zabel, Enric Balletbo i Serra,
	Matthias Brugger, Russell King

On Mon, Dec 9, 2019 at 10:53 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
Hi Laurent,

> How about converting this to yaml bindings already ? It's fairly simple
> and gives you DT validation.
>
Added in https://lore.kernel.org/lkml/20191211061911.238393-1-hsinyi@chromium.org/T/#m183b3822bf60101666436b0244b27275c6765d20

Thanks

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO
  2019-12-09 15:32       ` Laurent Pinchart
@ 2019-12-11  6:34         ` Hsin-Yi Wang
  0 siblings, 0 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-11  6:34 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, Devicetree List, lkml,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Archit Taneja, Philipp Zabel, Enric Balletbo i Serra,
	Matthias Brugger, Russell King

On Mon, Dec 9, 2019 at 11:32 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
Hi Laurent,
> You may have used a proportional font when writing this, the | doesn't
> align with anything using a fixed font. Do I assume correctly that the
> hardware multiplexer is actually a demultiplexer with one input and two
> outputs ?
>                                      +-----------+
> +---------+         +------+    /--> | HDMI      |
> | MT8173  |  HDMI   |   -->| --/     | Connector |
> |  HDMI   | ------> |--/   |         +-----------+
> | Encoder |         |    ->| --\     +-----------+      +-----------+
> +---------+         +------+    \--> | ANX7688   | ---> | USB-C     |
>                                      | Bridge    |      | Connector |
>                                      +-----------+      +-----------+
>
Sorry for not noticing the font issue, this graph is correct.

> > There's a hardware mux that takes mt8173 hdmi as input and has 2
> > output port: native hdmi and anx7688 bridge.
> > If gpio is active, we would like it to go to HDMI.
> >
> > Previous approach is to make hardware mux a generic gpio mux bridge,
> > but this is probably a very rare use case that is only for
> > mt8173.(https://lore.kernel.org/lkml/57723AD2.8020806@codeaurora.org/)
> > We merge the mux and anx7688 to a single bridge and leave this as an
> > optional feature in this time.
>
> I think that's a better approach, at least at the DT level. The HDMI
> demultiplexer should be represented as a DT node with 3 ports (one input
> and two outputs) with a control GPIO.
>
I've resend the original gpio mux driver. So for anx7688 there's 1
input and 1 output.

Thanks

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-17  0:52               ` Laurent Pinchart
@ 2019-12-17  6:04                 ` Nicolas Boichat
  0 siblings, 0 replies; 20+ messages in thread
From: Nicolas Boichat @ 2019-12-17  6:04 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: Hsin-Yi Wang, dri-devel, David Airlie, Daniel Vetter,
	Rob Herring, Mark Rutland, Devicetree List, lkml, Andrzej Hajda,
	Neil Armstrong, Jonas Karlman, Jernej Skrabec, Philipp Zabel,
	Enric Balletbo i Serra, Matthias Brugger, Russell King

Hi,

On Tue, Dec 17, 2019 at 8:52 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Nicolas,
>
> On Tue, Dec 17, 2019 at 08:40:51AM +0800, Nicolas Boichat wrote:
> > (Brilliant, I managed to accidentally send the email below, and send
> > it as HTML, sorry about that... ASCII art in gmail is hard ,-(
>
> No worries. I have been told it's indeed painful.
>
> > Take 2:)
> >
> > Hi Laurent,
> >
> > > On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart wrote:
> > > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> > > > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> > > > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote:
> > > > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > > > > > > > From: Nicolas Boichat <drinkcat@chromium.org>
> > > > > > > >
> > > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > > > > > > > that has an internal microcontroller.
> > > > > > > >
> > > > > > > > The only reason a Linux kernel driver is necessary is to reject
> > > > > > > > resolutions that require more bandwidth than what is available on
> > > > > > > > the DP side. DP bandwidth and lane count are reported by the bridge
> > > > > > > > via 2 registers on I2C.
> > > > > > >
> > > > > > > How about power, doesn't this chip have power supplies that potentially
> > > > > > > need to be controlled ?
> > > > > > >
> > > > > > Ideally we should add power supplies as well, but the power is
> > > > > > supplied by ec in mt8173 oak board. And we only have this board can
> > > > > > test this driver. If we add power supplies in driver we can't test it.
> > > > >
> > > > > To clarify a bit more, this is because this chip is actually a
> > > > > TCPC+mux+HDMI=>DP converter
> > > > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In
> > > > > Chromebook architecture, TCPC+mux is controlled by the EC (including
> > > > > power and other control pins), and the only reason we need a driver
> > > > > for the HDMI=>DP converter is to get the number of lanes on the DP
> > > > > side and filter out resolutions. Also, the converter is on a different
> > > > > I2C address and it could almost be considered as a separate device.
> > > > >
> > > > > (of course we could write a kernel driver for the TCPC+mux but we'll
> > > > > leave that to others if there's ever a board that is built with the
> > > > > TCPC part connected to the AP)
> > > >
> > > > Is the mux the one that is handled through a gpio-mux driver in this
> > > > series, or a different mux ?
> > >
> >
> > It's a different mux: it's the usual USB-C mux that takes in USB 3.0
> > and DP (internally converted from HDMI), and decides which 2 lanes to
> > use for each (4 lanes in total, but DP can only take 2 with this
> > converter), and flip if necessary. This is all controlled by the EC
> > (like on most other Chromebooks), so this is transparent to the kernel
> > on this hardware.
> >
> > > > It would really, really help if you could
> > > > show a block diagram of the related hardware (including the EC), as this
> > > > is quite confusing. With every e-mail exchanged there's a bit more
> > > > information that change my understanding of the issue, I can't really
> > > > provide guidance without a full overview.
> >
> > https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the
> > display part of the problem.
> >
> > You can just add a USB3 connection to the above (there's also I2C
> > interface to the EC of course to control the TCPC/mux aspect of it,
> > but that's on different I2C addresses). Something like this:
> >
> >                                       +-----------+
> >  +---------+         +------+    /--> | HDMI      |
> >  | MT8173  |  HDMI   |   -->| --/     | Connector |
> >  |  HDMI   | ------> |--/   |         +-----------+
> >  | Encoder |         |    ->| --\     +-----------+      +-----------+
> >  +---------+         +------+    \--> | ANX7688   | ---> | USB-C     |
> >                                       | Bridge    |      | Connector |
> >                               USB3--> | + mux     |      |           |
> >                                       +-----------+      +-----------+
> >                                          ^     ^
> >                                    (I2C) |     | (I2C)
> >    MT8173 (DP lane count/bw readback) -- +     + -- EC (TCPC+mux control)
> >
> > Power is also fully controlled by the EC.
>
> Could I ask you to also explain how the HDMI mux is controlled,

Priority to HDMI. If the HDMI is connected (looking at its HPD
signal), then the HDMI signals are routed to HDMI connector. Else HDMI
is routed to ANX7688/USB-C.

> and
> where the HPD-related signals for the HDMI connector and USB-C connector
> are routed to ?

HPD is also muxed by the mux, between the 2 inputs.
(http://www.ti.com/lit/ds/symlink/ts3dv642.pdf, if you are curious,
9.2.3 is basically how things are wired, with one of the HPD_A/B
connected to SEL2)

My memory is fading away now, but I think at some point we considered
having hardware send an HPD pulse when the input changes, but decided
against it (for cost/complexity reasons). So that means that if both
HDMI and USB-C monitors are plugged, and you unplug HDMI, the mux
would switch but you would not get an HPD pulse. That's one of the
reason we need to react to edges on the mux SEL signal to ask the
kernel to re-read the EDID (that's in the other driver that Hsin-Yi is
trying (again) to upstream in this series).

(IIRC, that's also why HDMI HPD pulse work if both connectors are
plugged, we get the edge on the SEL signal an re-read the EDID).

Thanks.


> > (the product brief has a good diagram of the internals of the ANX7688:
> > https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf)
> >
> > The ANX7688 bridge could _almost_ work driverless (and it does
> > already), the _only_ thing that the driver is doing is filtering out
> > impossible resolution based on DP (over USB-C) number of lanes and
> > bandwidth. This is required to support, for example, old monitors that
> > may only do RBR over DP (so we can't drive the full resolution over 2
> > DP lanes, we'd need 4 lanes, and we need to filter out the higher
> > resolution modes).
> >
> > > > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > > > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > > > > > > > ---
> > > > > > > >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> > > > > > > >  drivers/gpu/drm/bridge/Makefile           |   1 +
> > > > > > > >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> > > > > > > >  3 files changed, 212 insertions(+)
> > > > > > > >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > > >
> > > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > > > > > > index 34362976cd6f..1f3fc6bec842 100644
> > > > > > > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> > > > > > > >  menu "Display Interface Bridges"
> > > > > > > >       depends on DRM && DRM_BRIDGE
> > > > > > > >
> > > > > > > > +config DRM_ANALOGIX_ANX7688
> > > > > > > > +     tristate "Analogix ANX7688 bridge"
> > > > > > > > +     select DRM_KMS_HELPER
> > > > > > > > +     select REGMAP_I2C
> > > > > > > > +     ---help---
> > > > > > > > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > > > > > > > +       smartphone and tablets.
> > > > > > > > +       This driver only supports the HDMI to DP component of the chip.
> > > > > > > > +
> > > > > > > >  config DRM_ANALOGIX_ANX78XX
> > > > > > > >       tristate "Analogix ANX78XX bridge"
> > > > > > > >       select DRM_KMS_HELPER
> > > > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > > > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > > > > > > > --- a/drivers/gpu/drm/bridge/Makefile
> > > > > > > > +++ b/drivers/gpu/drm/bridge/Makefile
> > > > > > > > @@ -1,4 +1,5 @@
> > > > > > > >  # SPDX-License-Identifier: GPL-2.0
> > > > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> > > > > > > >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> > > > > > > >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> > > > > > > >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > > > new file mode 100644
> > > > > > > > index 000000000000..baaed48d6201
> > > > > > > > --- /dev/null
> > > > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > > > @@ -0,0 +1,202 @@
> > > > > > > > +// SPDX-License-Identifier: GPL-2.0-only
> > > > > > > > +/*
> > > > > > > > + * ANX7688 HDMI->DP bridge driver
> > > > > > > > + *
> > > > > > > > + * Copyright 2016 Google LLC
> > > > > > > > + */
> > > > > > > > +
> > > > > > > > +#include <linux/i2c.h>
> > > > > > > > +#include <linux/module.h>
> > > > > > > > +#include <linux/regmap.h>
> > > > > > > > +#include <drm/drm_bridge.h>
> > > > > > > > +
> > > > > > > > +/* Register addresses */
> > > > > > > > +#define VENDOR_ID_REG 0x00
> > > > > > > > +#define DEVICE_ID_REG 0x02
> > > > > > > > +
> > > > > > > > +#define FW_VERSION_REG 0x80
> > > > > > > > +
> > > > > > > > +#define DP_BANDWIDTH_REG 0x85
> > > > > > > > +#define DP_LANE_COUNT_REG 0x86
> > > > > > >
> > > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware
> > > > > > > running on the chip (and, I assume, developed by Google) ?
> > > > > > >
> > > > > > By firmware developed by ANX provided to Google.
> > > > >
> > > > > We asked for these registers to be added to ANX FW, and this is the FW
> > > > > that is used by all elm/hana Chromebooks (I have no idea about other
> > > > > ANX customers...). We have facilities to update the ANX FW from
> > > > > coreboot/depthcharge on Chromebooks, but that does not really matter:
> > > > > the factory FW of all MP Chromebooks does provide these registers.
> > > >
> > > > So the driver is specific to Chromebooks, it doesn't support all
> > > > ANX7688. Sweet :-(
> >
> > FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway?
>
> That's good news :-)
>
> > Also, this driver is only required to implement the mode filtering,
> > which, possibly, is only supported by the Google version of the FW (I
> > have no idea what other customers ANX has for this part, if they care
> > about this problem, and if so, how they solve it).
>
> --
> Regards,
>
> Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-17  0:40             ` Nicolas Boichat
@ 2019-12-17  0:52               ` Laurent Pinchart
  2019-12-17  6:04                 ` Nicolas Boichat
  0 siblings, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-17  0:52 UTC (permalink / raw)
  To: Nicolas Boichat
  Cc: Hsin-Yi Wang, dri-devel, David Airlie, Daniel Vetter,
	Rob Herring, Mark Rutland, Devicetree List, lkml, Andrzej Hajda,
	Neil Armstrong, Jonas Karlman, Jernej Skrabec, Philipp Zabel,
	Enric Balletbo i Serra, Matthias Brugger, Russell King

Hi Nicolas,

On Tue, Dec 17, 2019 at 08:40:51AM +0800, Nicolas Boichat wrote:
> (Brilliant, I managed to accidentally send the email below, and send
> it as HTML, sorry about that... ASCII art in gmail is hard ,-(

No worries. I have been told it's indeed painful.

> Take 2:)
> 
> Hi Laurent,
> 
> > On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart wrote:
> > > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> > > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> > > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote:
> > > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > > > > > > From: Nicolas Boichat <drinkcat@chromium.org>
> > > > > > >
> > > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > > > > > > that has an internal microcontroller.
> > > > > > >
> > > > > > > The only reason a Linux kernel driver is necessary is to reject
> > > > > > > resolutions that require more bandwidth than what is available on
> > > > > > > the DP side. DP bandwidth and lane count are reported by the bridge
> > > > > > > via 2 registers on I2C.
> > > > > >
> > > > > > How about power, doesn't this chip have power supplies that potentially
> > > > > > need to be controlled ?
> > > > > >
> > > > > Ideally we should add power supplies as well, but the power is
> > > > > supplied by ec in mt8173 oak board. And we only have this board can
> > > > > test this driver. If we add power supplies in driver we can't test it.
> > > >
> > > > To clarify a bit more, this is because this chip is actually a
> > > > TCPC+mux+HDMI=>DP converter
> > > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In
> > > > Chromebook architecture, TCPC+mux is controlled by the EC (including
> > > > power and other control pins), and the only reason we need a driver
> > > > for the HDMI=>DP converter is to get the number of lanes on the DP
> > > > side and filter out resolutions. Also, the converter is on a different
> > > > I2C address and it could almost be considered as a separate device.
> > > >
> > > > (of course we could write a kernel driver for the TCPC+mux but we'll
> > > > leave that to others if there's ever a board that is built with the
> > > > TCPC part connected to the AP)
> > >
> > > Is the mux the one that is handled through a gpio-mux driver in this
> > > series, or a different mux ?
> >
> 
> It's a different mux: it's the usual USB-C mux that takes in USB 3.0
> and DP (internally converted from HDMI), and decides which 2 lanes to
> use for each (4 lanes in total, but DP can only take 2 with this
> converter), and flip if necessary. This is all controlled by the EC
> (like on most other Chromebooks), so this is transparent to the kernel
> on this hardware.
> 
> > > It would really, really help if you could
> > > show a block diagram of the related hardware (including the EC), as this
> > > is quite confusing. With every e-mail exchanged there's a bit more
> > > information that change my understanding of the issue, I can't really
> > > provide guidance without a full overview.
> 
> https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the
> display part of the problem.
> 
> You can just add a USB3 connection to the above (there's also I2C
> interface to the EC of course to control the TCPC/mux aspect of it,
> but that's on different I2C addresses). Something like this:
> 
>                                       +-----------+
>  +---------+         +------+    /--> | HDMI      |
>  | MT8173  |  HDMI   |   -->| --/     | Connector |
>  |  HDMI   | ------> |--/   |         +-----------+
>  | Encoder |         |    ->| --\     +-----------+      +-----------+
>  +---------+         +------+    \--> | ANX7688   | ---> | USB-C     |
>                                       | Bridge    |      | Connector |
>                               USB3--> | + mux     |      |           |
>                                       +-----------+      +-----------+
>                                          ^     ^
>                                    (I2C) |     | (I2C)
>    MT8173 (DP lane count/bw readback) -- +     + -- EC (TCPC+mux control)
> 
> Power is also fully controlled by the EC.

Could I ask you to also explain how the HDMI mux is controlled, and
where the HPD-related signals for the HDMI connector and USB-C connector
are routed to ?

> (the product brief has a good diagram of the internals of the ANX7688:
> https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf)
> 
> The ANX7688 bridge could _almost_ work driverless (and it does
> already), the _only_ thing that the driver is doing is filtering out
> impossible resolution based on DP (over USB-C) number of lanes and
> bandwidth. This is required to support, for example, old monitors that
> may only do RBR over DP (so we can't drive the full resolution over 2
> DP lanes, we'd need 4 lanes, and we need to filter out the higher
> resolution modes).
> 
> > > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > > > > > > ---
> > > > > > >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> > > > > > >  drivers/gpu/drm/bridge/Makefile           |   1 +
> > > > > > >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> > > > > > >  3 files changed, 212 insertions(+)
> > > > > > >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > > > > > index 34362976cd6f..1f3fc6bec842 100644
> > > > > > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> > > > > > >  menu "Display Interface Bridges"
> > > > > > >       depends on DRM && DRM_BRIDGE
> > > > > > >
> > > > > > > +config DRM_ANALOGIX_ANX7688
> > > > > > > +     tristate "Analogix ANX7688 bridge"
> > > > > > > +     select DRM_KMS_HELPER
> > > > > > > +     select REGMAP_I2C
> > > > > > > +     ---help---
> > > > > > > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > > > > > > +       smartphone and tablets.
> > > > > > > +       This driver only supports the HDMI to DP component of the chip.
> > > > > > > +
> > > > > > >  config DRM_ANALOGIX_ANX78XX
> > > > > > >       tristate "Analogix ANX78XX bridge"
> > > > > > >       select DRM_KMS_HELPER
> > > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > > > > > > --- a/drivers/gpu/drm/bridge/Makefile
> > > > > > > +++ b/drivers/gpu/drm/bridge/Makefile
> > > > > > > @@ -1,4 +1,5 @@
> > > > > > >  # SPDX-License-Identifier: GPL-2.0
> > > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> > > > > > >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> > > > > > >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> > > > > > >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > > new file mode 100644
> > > > > > > index 000000000000..baaed48d6201
> > > > > > > --- /dev/null
> > > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > > @@ -0,0 +1,202 @@
> > > > > > > +// SPDX-License-Identifier: GPL-2.0-only
> > > > > > > +/*
> > > > > > > + * ANX7688 HDMI->DP bridge driver
> > > > > > > + *
> > > > > > > + * Copyright 2016 Google LLC
> > > > > > > + */
> > > > > > > +
> > > > > > > +#include <linux/i2c.h>
> > > > > > > +#include <linux/module.h>
> > > > > > > +#include <linux/regmap.h>
> > > > > > > +#include <drm/drm_bridge.h>
> > > > > > > +
> > > > > > > +/* Register addresses */
> > > > > > > +#define VENDOR_ID_REG 0x00
> > > > > > > +#define DEVICE_ID_REG 0x02
> > > > > > > +
> > > > > > > +#define FW_VERSION_REG 0x80
> > > > > > > +
> > > > > > > +#define DP_BANDWIDTH_REG 0x85
> > > > > > > +#define DP_LANE_COUNT_REG 0x86
> > > > > >
> > > > > > Are these registers defined by the ANX7688 hardware, or by the firmware
> > > > > > running on the chip (and, I assume, developed by Google) ?
> > > > > >
> > > > > By firmware developed by ANX provided to Google.
> > > >
> > > > We asked for these registers to be added to ANX FW, and this is the FW
> > > > that is used by all elm/hana Chromebooks (I have no idea about other
> > > > ANX customers...). We have facilities to update the ANX FW from
> > > > coreboot/depthcharge on Chromebooks, but that does not really matter:
> > > > the factory FW of all MP Chromebooks does provide these registers.
> > >
> > > So the driver is specific to Chromebooks, it doesn't support all
> > > ANX7688. Sweet :-(
> 
> FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway?

That's good news :-)

> Also, this driver is only required to implement the mode filtering,
> which, possibly, is only supported by the Google version of the FW (I
> have no idea what other customers ANX has for this part, if they care
> about this problem, and if so, how they solve it).

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
       [not found]           ` <CANMq1KA1OMMzwLVMhFeb-zLuPLJsXrvVMji=u0RZ_kWnQprvoA@mail.gmail.com>
@ 2019-12-17  0:40             ` Nicolas Boichat
  2019-12-17  0:52               ` Laurent Pinchart
  0 siblings, 1 reply; 20+ messages in thread
From: Nicolas Boichat @ 2019-12-17  0:40 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: Hsin-Yi Wang, dri-devel, David Airlie, Daniel Vetter,
	Rob Herring, Mark Rutland, Devicetree List, lkml, Andrzej Hajda,
	Neil Armstrong, Jonas Karlman, Jernej Skrabec, Philipp Zabel,
	Enric Balletbo i Serra, Matthias Brugger, Russell King

(Brilliant, I managed to accidentally send the email below, and send
it as HTML, sorry about that... ASCII art in gmail is hard ,-(

Take 2:)

Hi Laurent,

> On Tue, Dec 17, 2019 at 12:39 AM Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote:
> >
> > Hello Nicolas and Hsin-Yi,
> >
> > On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> > > On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> > > > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote:
> > > > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > > > > > From: Nicolas Boichat <drinkcat@chromium.org>
> > > > > >
> > > > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > > > > > that has an internal microcontroller.
> > > > > >
> > > > > > The only reason a Linux kernel driver is necessary is to reject
> > > > > > resolutions that require more bandwidth than what is available on
> > > > > > the DP side. DP bandwidth and lane count are reported by the bridge
> > > > > > via 2 registers on I2C.
> > > > >
> > > > > How about power, doesn't this chip have power supplies that potentially
> > > > > need to be controlled ?
> > > > >
> > > > Ideally we should add power supplies as well, but the power is
> > > > supplied by ec in mt8173 oak board. And we only have this board can
> > > > test this driver. If we add power supplies in driver we can't test it.
> > >
> > > To clarify a bit more, this is because this chip is actually a
> > > TCPC+mux+HDMI=>DP converter
> > > (https://www.analogix.com/en/products/convertersbridges/anx7688). In
> > > Chromebook architecture, TCPC+mux is controlled by the EC (including
> > > power and other control pins), and the only reason we need a driver
> > > for the HDMI=>DP converter is to get the number of lanes on the DP
> > > side and filter out resolutions. Also, the converter is on a different
> > > I2C address and it could almost be considered as a separate device.
> > >
> > > (of course we could write a kernel driver for the TCPC+mux but we'll
> > > leave that to others if there's ever a board that is built with the
> > > TCPC part connected to the AP)
> >
> > Is the mux the one that is handled through a gpio-mux driver in this
> > series, or a different mux ?
>

It's a different mux: it's the usual USB-C mux that takes in USB 3.0
and DP (internally converted from HDMI), and decides which 2 lanes to
use for each (4 lanes in total, but DP can only take 2 with this
converter), and flip if necessary. This is all controlled by the EC
(like on most other Chromebooks), so this is transparent to the kernel
on this hardware.

> > It would really, really help if you could
> > show a block diagram of the related hardware (including the EC), as this
> > is quite confusing. With every e-mail exchanged there's a bit more
> > information that change my understanding of the issue, I can't really
> > provide guidance without a full overview.

https://lkml.org/lkml/2019/12/9/548 that you drew is accurate for the
display part of the problem.

You can just add a USB3 connection to the above (there's also I2C
interface to the EC of course to control the TCPC/mux aspect of it,
but that's on different I2C addresses). Something like this:

                                      +-----------+
 +---------+         +------+    /--> | HDMI      |
 | MT8173  |  HDMI   |   -->| --/     | Connector |
 |  HDMI   | ------> |--/   |         +-----------+
 | Encoder |         |    ->| --\     +-----------+      +-----------+
 +---------+         +------+    \--> | ANX7688   | ---> | USB-C     |
                                      | Bridge    |      | Connector |
                              USB3--> | + mux     |      |           |
                                      +-----------+      +-----------+
                                         ^     ^
                                   (I2C) |     | (I2C)
   MT8173 (DP lane count/bw readback) -- +     + -- EC (TCPC+mux control)

Power is also fully controlled by the EC.

(the product brief has a good diagram of the internals of the ANX7688:
https://www.analogix.com/en/system/files/AA-002281-PB-6-ANX7688_Product_Brief.pdf)

The ANX7688 bridge could _almost_ work driverless (and it does
already), the _only_ thing that the driver is doing is filtering out
impossible resolution based on DP (over USB-C) number of lanes and
bandwidth. This is required to support, for example, old monitors that
may only do RBR over DP (so we can't drive the full resolution over 2
DP lanes, we'd need 4 lanes, and we need to filter out the higher
resolution modes).

> > > > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > > > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > > > > > ---
> > > > > >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> > > > > >  drivers/gpu/drm/bridge/Makefile           |   1 +
> > > > > >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> > > > > >  3 files changed, 212 insertions(+)
> > > > > >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > > > > index 34362976cd6f..1f3fc6bec842 100644
> > > > > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > > > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> > > > > >  menu "Display Interface Bridges"
> > > > > >       depends on DRM && DRM_BRIDGE
> > > > > >
> > > > > > +config DRM_ANALOGIX_ANX7688
> > > > > > +     tristate "Analogix ANX7688 bridge"
> > > > > > +     select DRM_KMS_HELPER
> > > > > > +     select REGMAP_I2C
> > > > > > +     ---help---
> > > > > > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > > > > > +       smartphone and tablets.
> > > > > > +       This driver only supports the HDMI to DP component of the chip.
> > > > > > +
> > > > > >  config DRM_ANALOGIX_ANX78XX
> > > > > >       tristate "Analogix ANX78XX bridge"
> > > > > >       select DRM_KMS_HELPER
> > > > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > > > > > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > > > > > --- a/drivers/gpu/drm/bridge/Makefile
> > > > > > +++ b/drivers/gpu/drm/bridge/Makefile
> > > > > > @@ -1,4 +1,5 @@
> > > > > >  # SPDX-License-Identifier: GPL-2.0
> > > > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> > > > > >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> > > > > >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> > > > > >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > > > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > new file mode 100644
> > > > > > index 000000000000..baaed48d6201
> > > > > > --- /dev/null
> > > > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > > > @@ -0,0 +1,202 @@
> > > > > > +// SPDX-License-Identifier: GPL-2.0-only
> > > > > > +/*
> > > > > > + * ANX7688 HDMI->DP bridge driver
> > > > > > + *
> > > > > > + * Copyright 2016 Google LLC
> > > > > > + */
> > > > > > +
> > > > > > +#include <linux/i2c.h>
> > > > > > +#include <linux/module.h>
> > > > > > +#include <linux/regmap.h>
> > > > > > +#include <drm/drm_bridge.h>
> > > > > > +
> > > > > > +/* Register addresses */
> > > > > > +#define VENDOR_ID_REG 0x00
> > > > > > +#define DEVICE_ID_REG 0x02
> > > > > > +
> > > > > > +#define FW_VERSION_REG 0x80
> > > > > > +
> > > > > > +#define DP_BANDWIDTH_REG 0x85
> > > > > > +#define DP_LANE_COUNT_REG 0x86
> > > > >
> > > > > Are these registers defined by the ANX7688 hardware, or by the firmware
> > > > > running on the chip (and, I assume, developed by Google) ?
> > > > >
> > > > By firmware developed by ANX provided to Google.
> > >
> > > We asked for these registers to be added to ANX FW, and this is the FW
> > > that is used by all elm/hana Chromebooks (I have no idea about other
> > > ANX customers...). We have facilities to update the ANX FW from
> > > coreboot/depthcharge on Chromebooks, but that does not really matter:
> > > the factory FW of all MP Chromebooks does provide these registers.
> >
> > So the driver is specific to Chromebooks, it doesn't support all
> > ANX7688. Sweet :-(
>

FWIW, this is a 3+ year old part, so it appears that nobody else cares anyway?

Also, this driver is only required to implement the mode filtering,
which, possibly, is only supported by the Google version of the FW (I
have no idea what other customers ANX has for this part, if they care
about this problem, and if so, how they solve it).

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-16 10:19       ` Nicolas Boichat
@ 2019-12-16 16:39         ` Laurent Pinchart
       [not found]           ` <CANMq1KA1OMMzwLVMhFeb-zLuPLJsXrvVMji=u0RZ_kWnQprvoA@mail.gmail.com>
  0 siblings, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-16 16:39 UTC (permalink / raw)
  To: Nicolas Boichat
  Cc: Hsin-Yi Wang, dri-devel, David Airlie, Daniel Vetter,
	Rob Herring, Mark Rutland, Devicetree List, lkml, Andrzej Hajda,
	Neil Armstrong, Jonas Karlman, Jernej Skrabec, Philipp Zabel,
	Enric Balletbo i Serra, Matthias Brugger, Russell King

Hello Nicolas and Hsin-Yi,

On Mon, Dec 16, 2019 at 06:19:24PM +0800, Nicolas Boichat wrote:
> On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang wrote:
> > On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart wrote:
> > > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > > > From: Nicolas Boichat <drinkcat@chromium.org>
> > > >
> > > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > > > that has an internal microcontroller.
> > > >
> > > > The only reason a Linux kernel driver is necessary is to reject
> > > > resolutions that require more bandwidth than what is available on
> > > > the DP side. DP bandwidth and lane count are reported by the bridge
> > > > via 2 registers on I2C.
> > >
> > > How about power, doesn't this chip have power supplies that potentially
> > > need to be controlled ?
> > >
> > Ideally we should add power supplies as well, but the power is
> > supplied by ec in mt8173 oak board. And we only have this board can
> > test this driver. If we add power supplies in driver we can't test it.
> 
> To clarify a bit more, this is because this chip is actually a
> TCPC+mux+HDMI=>DP converter
> (https://www.analogix.com/en/products/convertersbridges/anx7688). In
> Chromebook architecture, TCPC+mux is controlled by the EC (including
> power and other control pins), and the only reason we need a driver
> for the HDMI=>DP converter is to get the number of lanes on the DP
> side and filter out resolutions. Also, the converter is on a different
> I2C address and it could almost be considered as a separate device.
> 
> (of course we could write a kernel driver for the TCPC+mux but we'll
> leave that to others if there's ever a board that is built with the
> TCPC part connected to the AP)

Is the mux the one that is handled through a gpio-mux driver in this
series, or a different mux ? It would really, really help if you could
show a block diagram of the related hardware (including the EC), as this
is quite confusing. With every e-mail exchanged there's a bit more
information that change my understanding of the issue, I can't really
provide guidance without a full overview.

> > > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > > > ---
> > > >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> > > >  drivers/gpu/drm/bridge/Makefile           |   1 +
> > > >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> > > >  3 files changed, 212 insertions(+)
> > > >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> > > >
> > > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > > index 34362976cd6f..1f3fc6bec842 100644
> > > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> > > >  menu "Display Interface Bridges"
> > > >       depends on DRM && DRM_BRIDGE
> > > >
> > > > +config DRM_ANALOGIX_ANX7688
> > > > +     tristate "Analogix ANX7688 bridge"
> > > > +     select DRM_KMS_HELPER
> > > > +     select REGMAP_I2C
> > > > +     ---help---
> > > > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > > > +       smartphone and tablets.
> > > > +       This driver only supports the HDMI to DP component of the chip.
> > > > +
> > > >  config DRM_ANALOGIX_ANX78XX
> > > >       tristate "Analogix ANX78XX bridge"
> > > >       select DRM_KMS_HELPER
> > > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > > > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > > > --- a/drivers/gpu/drm/bridge/Makefile
> > > > +++ b/drivers/gpu/drm/bridge/Makefile
> > > > @@ -1,4 +1,5 @@
> > > >  # SPDX-License-Identifier: GPL-2.0
> > > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> > > >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> > > >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> > > >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > new file mode 100644
> > > > index 000000000000..baaed48d6201
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > > @@ -0,0 +1,202 @@
> > > > +// SPDX-License-Identifier: GPL-2.0-only
> > > > +/*
> > > > + * ANX7688 HDMI->DP bridge driver
> > > > + *
> > > > + * Copyright 2016 Google LLC
> > > > + */
> > > > +
> > > > +#include <linux/i2c.h>
> > > > +#include <linux/module.h>
> > > > +#include <linux/regmap.h>
> > > > +#include <drm/drm_bridge.h>
> > > > +
> > > > +/* Register addresses */
> > > > +#define VENDOR_ID_REG 0x00
> > > > +#define DEVICE_ID_REG 0x02
> > > > +
> > > > +#define FW_VERSION_REG 0x80
> > > > +
> > > > +#define DP_BANDWIDTH_REG 0x85
> > > > +#define DP_LANE_COUNT_REG 0x86
> > >
> > > Are these registers defined by the ANX7688 hardware, or by the firmware
> > > running on the chip (and, I assume, developed by Google) ?
> > >
> > By firmware developed by ANX provided to Google.
> 
> We asked for these registers to be added to ANX FW, and this is the FW
> that is used by all elm/hana Chromebooks (I have no idea about other
> ANX customers...). We have facilities to update the ANX FW from
> coreboot/depthcharge on Chromebooks, but that does not really matter:
> the factory FW of all MP Chromebooks does provide these registers.

So the driver is specific to Chromebooks, it doesn't support all
ANX7688. Sweet :-(

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-16  8:45     ` Hsin-Yi Wang
@ 2019-12-16 10:19       ` Nicolas Boichat
  2019-12-16 16:39         ` Laurent Pinchart
  0 siblings, 1 reply; 20+ messages in thread
From: Nicolas Boichat @ 2019-12-16 10:19 UTC (permalink / raw)
  To: Hsin-Yi Wang
  Cc: Laurent Pinchart, dri-devel, David Airlie, Daniel Vetter,
	Rob Herring, Mark Rutland, Devicetree List, lkml, Andrzej Hajda,
	Neil Armstrong, Jonas Karlman, Jernej Skrabec, Philipp Zabel,
	Enric Balletbo i Serra, Matthias Brugger, Russell King

On Mon, Dec 16, 2019 at 4:46 PM Hsin-Yi Wang <hsinyi@chromium.org> wrote:
>
> On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart
> <laurent.pinchart@ideasonboard.com> wrote:
> >
> > Hi Hsin-Yi and Nicolas,
> >
> > Thank you for the patch.
> >
> > On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > > From: Nicolas Boichat <drinkcat@chromium.org>
> > >
> > > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > > that has an internal microcontroller.
> > >
> > > The only reason a Linux kernel driver is necessary is to reject
> > > resolutions that require more bandwidth than what is available on
> > > the DP side. DP bandwidth and lane count are reported by the bridge
> > > via 2 registers on I2C.
> >
> > How about power, doesn't this chip have power supplies that potentially
> > need to be controlled ?
> >
> Ideally we should add power supplies as well, but the power is
> supplied by ec in mt8173 oak board. And we only have this board can
> test this driver. If we add power supplies in driver we can't test it.

To clarify a bit more, this is because this chip is actually a
TCPC+mux+HDMI=>DP converter
(https://www.analogix.com/en/products/convertersbridges/anx7688). In
Chromebook architecture, TCPC+mux is controlled by the EC (including
power and other control pins), and the only reason we need a driver
for the HDMI=>DP converter is to get the number of lanes on the DP
side and filter out resolutions. Also, the converter is on a different
I2C address and it could almost be considered as a separate device.

(of course we could write a kernel driver for the TCPC+mux but we'll
leave that to others if there's ever a board that is built with the
TCPC part connected to the AP)

> > > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > > ---
> > >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> > >  drivers/gpu/drm/bridge/Makefile           |   1 +
> > >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> > >  3 files changed, 212 insertions(+)
> > >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> > >
> > > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > > index 34362976cd6f..1f3fc6bec842 100644
> > > --- a/drivers/gpu/drm/bridge/Kconfig
> > > +++ b/drivers/gpu/drm/bridge/Kconfig
> > > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> > >  menu "Display Interface Bridges"
> > >       depends on DRM && DRM_BRIDGE
> > >
> > > +config DRM_ANALOGIX_ANX7688
> > > +     tristate "Analogix ANX7688 bridge"
> > > +     select DRM_KMS_HELPER
> > > +     select REGMAP_I2C
> > > +     ---help---
> > > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > > +       smartphone and tablets.
> > > +       This driver only supports the HDMI to DP component of the chip.
> > > +
> > >  config DRM_ANALOGIX_ANX78XX
> > >       tristate "Analogix ANX78XX bridge"
> > >       select DRM_KMS_HELPER
> > > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > > --- a/drivers/gpu/drm/bridge/Makefile
> > > +++ b/drivers/gpu/drm/bridge/Makefile
> > > @@ -1,4 +1,5 @@
> > >  # SPDX-License-Identifier: GPL-2.0
> > > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> > >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> > >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> > >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > new file mode 100644
> > > index 000000000000..baaed48d6201
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > > @@ -0,0 +1,202 @@
> > > +// SPDX-License-Identifier: GPL-2.0-only
> > > +/*
> > > + * ANX7688 HDMI->DP bridge driver
> > > + *
> > > + * Copyright 2016 Google LLC
> > > + */
> > > +
> > > +#include <linux/i2c.h>
> > > +#include <linux/module.h>
> > > +#include <linux/regmap.h>
> > > +#include <drm/drm_bridge.h>
> > > +
> > > +/* Register addresses */
> > > +#define VENDOR_ID_REG 0x00
> > > +#define DEVICE_ID_REG 0x02
> > > +
> > > +#define FW_VERSION_REG 0x80
> > > +
> > > +#define DP_BANDWIDTH_REG 0x85
> > > +#define DP_LANE_COUNT_REG 0x86
> >
> > Are these registers defined by the ANX7688 hardware, or by the firmware
> > running on the chip (and, I assume, developed by Google) ?
> >
> By firmware developed by ANX provided to Google.

We asked for these registers to be added to ANX FW, and this is the FW
that is used by all elm/hana Chromebooks (I have no idea about other
ANX customers...). We have facilities to update the ANX FW from
coreboot/depthcharge on Chromebooks, but that does not really matter:
the factory FW of all MP Chromebooks does provide these registers.

Thanks.

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-13 22:38   ` Laurent Pinchart
@ 2019-12-16  8:45     ` Hsin-Yi Wang
  2019-12-16 10:19       ` Nicolas Boichat
  0 siblings, 1 reply; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-16  8:45 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, Devicetree List, lkml,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	Philipp Zabel, Enric Balletbo i Serra, Matthias Brugger,
	Russell King

On Sat, Dec 14, 2019 at 6:38 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Hsin-Yi and Nicolas,
>
> Thank you for the patch.
>
> On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> > From: Nicolas Boichat <drinkcat@chromium.org>
> >
> > ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> > that has an internal microcontroller.
> >
> > The only reason a Linux kernel driver is necessary is to reject
> > resolutions that require more bandwidth than what is available on
> > the DP side. DP bandwidth and lane count are reported by the bridge
> > via 2 registers on I2C.
>
> How about power, doesn't this chip have power supplies that potentially
> need to be controlled ?
>
Ideally we should add power supplies as well, but the power is
supplied by ec in mt8173 oak board. And we only have this board can
test this driver. If we add power supplies in driver we can't test it.
> > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> > Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> > ---
> >  drivers/gpu/drm/bridge/Kconfig            |   9 +
> >  drivers/gpu/drm/bridge/Makefile           |   1 +
> >  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
> >  3 files changed, 212 insertions(+)
> >  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 34362976cd6f..1f3fc6bec842 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
> >  menu "Display Interface Bridges"
> >       depends on DRM && DRM_BRIDGE
> >
> > +config DRM_ANALOGIX_ANX7688
> > +     tristate "Analogix ANX7688 bridge"
> > +     select DRM_KMS_HELPER
> > +     select REGMAP_I2C
> > +     ---help---
> > +       ANX7688 is a transmitter to support DisplayPort over USB-C for
> > +       smartphone and tablets.
> > +       This driver only supports the HDMI to DP component of the chip.
> > +
> >  config DRM_ANALOGIX_ANX78XX
> >       tristate "Analogix ANX78XX bridge"
> >       select DRM_KMS_HELPER
> > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > index 4934fcf5a6f8..7a1e0ec032e6 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -1,4 +1,5 @@
> >  # SPDX-License-Identifier: GPL-2.0
> > +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
> >  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
> >  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
> >  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> > diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > new file mode 100644
> > index 000000000000..baaed48d6201
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> > @@ -0,0 +1,202 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * ANX7688 HDMI->DP bridge driver
> > + *
> > + * Copyright 2016 Google LLC
> > + */
> > +
> > +#include <linux/i2c.h>
> > +#include <linux/module.h>
> > +#include <linux/regmap.h>
> > +#include <drm/drm_bridge.h>
> > +
> > +/* Register addresses */
> > +#define VENDOR_ID_REG 0x00
> > +#define DEVICE_ID_REG 0x02
> > +
> > +#define FW_VERSION_REG 0x80
> > +
> > +#define DP_BANDWIDTH_REG 0x85
> > +#define DP_LANE_COUNT_REG 0x86
>
> Are these registers defined by the ANX7688 hardware, or by the firmware
> running on the chip (and, I assume, developed by Google) ?
>
By firmware developed by ANX provided to Google.
> > +
> > +#define VENDOR_ID 0x1f29
> > +#define DEVICE_ID 0x7688
> > +
> > +/* First supported firmware version (0.85) */
> > +#define MINIMUM_FW_VERSION 0x0085
> > +
> > +struct anx7688 {
> > +     struct drm_bridge bridge;
> > +     struct i2c_client *client;
> > +     struct regmap *regmap;
> > +
> > +     bool filter;
> > +};
> > +
> > +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge)
> > +{
> > +     return container_of(bridge, struct anx7688, bridge);
> > +}
> > +
> > +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
> > +                                   const struct drm_display_mode *mode,
> > +                                   struct drm_display_mode *adjusted_mode)
> > +{
> > +     struct anx7688 *anx7688 = bridge_to_anx7688(bridge);
> > +     u8 regs[2];
> > +     u8 dpbw, lanecount;
> > +     int totalbw, requiredbw;
> > +     int ret;
> > +
> > +     if (!anx7688->filter)
> > +             return true;
> > +
> > +     /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */
> > +     ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2);
> > +     if (ret < 0) {
> > +             dev_err(&anx7688->client->dev,
> > +                     "Failed to read bandwidth/lane count\n");
> > +             return false;
> > +     }
> > +     dpbw = regs[0];
> > +     lanecount = regs[1];
> > +
> > +     /* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */
> > +     if (dpbw > 0x19 || lanecount > 2) {
> > +             dev_err(&anx7688->client->dev,
> > +                     "Invalid bandwidth/lane count (%02x/%d)\n",
> > +                     dpbw, lanecount);
> > +             return false;
> > +     }
> > +
> > +     /* Compute available bandwidth (kHz) */
> > +     totalbw = dpbw * lanecount * 270000 * 8 / 10;
> > +
> > +     /* Required bandwidth (8 bpc, kHz) */
> > +     requiredbw = mode->clock * 8 * 3;
> > +
> > +     dev_dbg(&anx7688->client->dev,
> > +             "DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n",
> > +             totalbw, dpbw, lanecount, requiredbw);
> > +
> > +     if (totalbw == 0) {
> > +             dev_warn(&anx7688->client->dev,
> > +                      "Bandwidth/lane count are 0, not rejecting modes\n");
> > +             return true;
> > +     }
> > +
> > +     return totalbw >= requiredbw;
> > +}
> > +
> > +static const struct drm_bridge_funcs anx7688_bridge_funcs = {
> > +     .mode_fixup     = anx7688_bridge_mode_fixup,
> > +};
> > +
> > +static const struct regmap_config anx7688_regmap_config = {
> > +     .reg_bits = 8,
> > +     .val_bits = 8,
> > +};
> > +
> > +static int anx7688_i2c_probe(struct i2c_client *client,
> > +                          const struct i2c_device_id *id)
> > +{
> > +     struct anx7688 *anx7688;
> > +     struct device *dev = &client->dev;
> > +     int ret;
> > +     u8 buffer[4];
> > +     u16 vendor, device, fwversion;
> > +
> > +     anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL);
> > +     if (!anx7688)
> > +             return -ENOMEM;
> > +
> > +#if IS_ENABLED(CONFIG_OF)
> > +     anx7688->bridge.of_node = client->dev.of_node;
> > +#endif
> > +
> > +     anx7688->client = client;
> > +     i2c_set_clientdata(client, anx7688);
> > +
> > +     anx7688->regmap =
> > +             devm_regmap_init_i2c(client, &anx7688_regmap_config);
> > +
> > +     /* Read both vendor and device id (4 bytes). */
> > +     ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4);
> > +     if (ret) {
> > +             dev_err(dev, "Failed to read chip vendor/device id\n");
> > +             return ret;
> > +     }
> > +
> > +     vendor = (u16)buffer[1] << 8 | buffer[0];
> > +     device = (u16)buffer[3] << 8 | buffer[2];
> > +     if (vendor != VENDOR_ID || device != DEVICE_ID) {
> > +             dev_err(dev, "Invalid vendor/device id %04x/%04x\n",
> > +                     vendor, device);
> > +             return -ENODEV;
> > +     }
> > +
> > +     ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2);
> > +     if (ret) {
> > +             dev_err(&client->dev, "Failed to read firmware version\n");
> > +             return ret;
> > +     }
> > +
> > +     fwversion = (u16)buffer[0] << 8 | buffer[1];
> > +     dev_info(dev, "ANX7688 firwmare version %02x.%02x\n",
> > +              buffer[0], buffer[1]);
> > +
> > +     /* FW version >= 0.85 supports bandwidth/lane count registers */
> > +     if (fwversion >= MINIMUM_FW_VERSION) {
> > +             anx7688->filter = true;
> > +     } else {
> > +             /* Warn, but not fail, for backwards compatibility. */
> > +             dev_warn(dev,
> > +                      "Old ANX7688 FW version (%02x.%02x), not filtering\n",
> > +                      buffer[0], buffer[1]);
> > +     }
> > +
> > +     anx7688->bridge.funcs = &anx7688_bridge_funcs;
> > +     drm_bridge_add(&anx7688->bridge);
> > +
> > +     return 0;
> > +}
> > +
> > +static int anx7688_i2c_remove(struct i2c_client *client)
> > +{
> > +     struct anx7688 *anx7688 = i2c_get_clientdata(client);
> > +
> > +     drm_bridge_remove(&anx7688->bridge);
> > +
> > +     return 0;
> > +}
> > +
> > +static const struct i2c_device_id anx7688_id[] = {
> > +     { "anx7688", 0 },
> > +     { /* sentinel */ }
> > +};
> > +
> > +MODULE_DEVICE_TABLE(i2c, anx7688_id);
> > +
> > +#if IS_ENABLED(CONFIG_OF)
> > +static const struct of_device_id anx7688_match_table[] = {
> > +     { .compatible = "analogix,anx7688", },
> > +     { /* sentinel */ },
> > +};
> > +MODULE_DEVICE_TABLE(of, anx7688_match_table);
> > +#endif
> > +
> > +static struct i2c_driver anx7688_driver = {
> > +     .driver = {
> > +                .name = "anx7688",
> > +                .of_match_table = of_match_ptr(anx7688_match_table),
> > +               },
> > +     .probe = anx7688_i2c_probe,
> > +     .remove = anx7688_i2c_remove,
> > +     .id_table = anx7688_id,
> > +};
> > +
> > +module_i2c_driver(anx7688_driver);
> > +
> > +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver");
> > +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>");
> > +MODULE_LICENSE("GPL v2");
>
> --
> Regards,
>
> Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-11  6:19 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
  2019-12-12 11:50   ` Enric Balletbo i Serra
@ 2019-12-13 22:38   ` Laurent Pinchart
  2019-12-16  8:45     ` Hsin-Yi Wang
  1 sibling, 1 reply; 20+ messages in thread
From: Laurent Pinchart @ 2019-12-13 22:38 UTC (permalink / raw)
  To: Hsin-Yi Wang
  Cc: dri-devel, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Nicolas Boichat, devicetree, linux-kernel,
	Andrzej Hajda, Neil Armstrong, Jonas Karlman, Jernej Skrabec,
	p.zabel, Enric Balletbo i Serra, Matthias Brugger, Russell King

Hi Hsin-Yi and Nicolas,

Thank you for the patch.

On Wed, Dec 11, 2019 at 02:19:09PM +0800, Hsin-Yi Wang wrote:
> From: Nicolas Boichat <drinkcat@chromium.org>
> 
> ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> that has an internal microcontroller.
> 
> The only reason a Linux kernel driver is necessary is to reject
> resolutions that require more bandwidth than what is available on
> the DP side. DP bandwidth and lane count are reported by the bridge
> via 2 registers on I2C.

How about power, doesn't this chip have power supplies that potentially
need to be controlled ?

> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
>  drivers/gpu/drm/bridge/Kconfig            |   9 +
>  drivers/gpu/drm/bridge/Makefile           |   1 +
>  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
>  3 files changed, 212 insertions(+)
>  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> 
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 34362976cd6f..1f3fc6bec842 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
>  menu "Display Interface Bridges"
>  	depends on DRM && DRM_BRIDGE
>  
> +config DRM_ANALOGIX_ANX7688
> +	tristate "Analogix ANX7688 bridge"
> +	select DRM_KMS_HELPER
> +	select REGMAP_I2C
> +	---help---
> +	  ANX7688 is a transmitter to support DisplayPort over USB-C for
> +	  smartphone and tablets.
> +	  This driver only supports the HDMI to DP component of the chip.
> +
>  config DRM_ANALOGIX_ANX78XX
>  	tristate "Analogix ANX78XX bridge"
>  	select DRM_KMS_HELPER
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index 4934fcf5a6f8..7a1e0ec032e6 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -1,4 +1,5 @@
>  # SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
>  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
>  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
>  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> new file mode 100644
> index 000000000000..baaed48d6201
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> @@ -0,0 +1,202 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * ANX7688 HDMI->DP bridge driver
> + *
> + * Copyright 2016 Google LLC
> + */
> +
> +#include <linux/i2c.h>
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <drm/drm_bridge.h>
> +
> +/* Register addresses */
> +#define VENDOR_ID_REG 0x00
> +#define DEVICE_ID_REG 0x02
> +
> +#define FW_VERSION_REG 0x80
> +
> +#define DP_BANDWIDTH_REG 0x85
> +#define DP_LANE_COUNT_REG 0x86

Are these registers defined by the ANX7688 hardware, or by the firmware
running on the chip (and, I assume, developed by Google) ?

> +
> +#define VENDOR_ID 0x1f29
> +#define DEVICE_ID 0x7688
> +
> +/* First supported firmware version (0.85) */
> +#define MINIMUM_FW_VERSION 0x0085
> +
> +struct anx7688 {
> +	struct drm_bridge bridge;
> +	struct i2c_client *client;
> +	struct regmap *regmap;
> +
> +	bool filter;
> +};
> +
> +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge)
> +{
> +	return container_of(bridge, struct anx7688, bridge);
> +}
> +
> +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
> +				      const struct drm_display_mode *mode,
> +				      struct drm_display_mode *adjusted_mode)
> +{
> +	struct anx7688 *anx7688 = bridge_to_anx7688(bridge);
> +	u8 regs[2];
> +	u8 dpbw, lanecount;
> +	int totalbw, requiredbw;
> +	int ret;
> +
> +	if (!anx7688->filter)
> +		return true;
> +
> +	/* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */
> +	ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2);
> +	if (ret < 0) {
> +		dev_err(&anx7688->client->dev,
> +			"Failed to read bandwidth/lane count\n");
> +		return false;
> +	}
> +	dpbw = regs[0];
> +	lanecount = regs[1];
> +
> +	/* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */
> +	if (dpbw > 0x19 || lanecount > 2) {
> +		dev_err(&anx7688->client->dev,
> +			"Invalid bandwidth/lane count (%02x/%d)\n",
> +			dpbw, lanecount);
> +		return false;
> +	}
> +
> +	/* Compute available bandwidth (kHz) */
> +	totalbw = dpbw * lanecount * 270000 * 8 / 10;
> +
> +	/* Required bandwidth (8 bpc, kHz) */
> +	requiredbw = mode->clock * 8 * 3;
> +
> +	dev_dbg(&anx7688->client->dev,
> +		"DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n",
> +		totalbw, dpbw, lanecount, requiredbw);
> +
> +	if (totalbw == 0) {
> +		dev_warn(&anx7688->client->dev,
> +			 "Bandwidth/lane count are 0, not rejecting modes\n");
> +		return true;
> +	}
> +
> +	return totalbw >= requiredbw;
> +}
> +
> +static const struct drm_bridge_funcs anx7688_bridge_funcs = {
> +	.mode_fixup	= anx7688_bridge_mode_fixup,
> +};
> +
> +static const struct regmap_config anx7688_regmap_config = {
> +	.reg_bits = 8,
> +	.val_bits = 8,
> +};
> +
> +static int anx7688_i2c_probe(struct i2c_client *client,
> +			     const struct i2c_device_id *id)
> +{
> +	struct anx7688 *anx7688;
> +	struct device *dev = &client->dev;
> +	int ret;
> +	u8 buffer[4];
> +	u16 vendor, device, fwversion;
> +
> +	anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL);
> +	if (!anx7688)
> +		return -ENOMEM;
> +
> +#if IS_ENABLED(CONFIG_OF)
> +	anx7688->bridge.of_node = client->dev.of_node;
> +#endif
> +
> +	anx7688->client = client;
> +	i2c_set_clientdata(client, anx7688);
> +
> +	anx7688->regmap =
> +		devm_regmap_init_i2c(client, &anx7688_regmap_config);
> +
> +	/* Read both vendor and device id (4 bytes). */
> +	ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4);
> +	if (ret) {
> +		dev_err(dev, "Failed to read chip vendor/device id\n");
> +		return ret;
> +	}
> +
> +	vendor = (u16)buffer[1] << 8 | buffer[0];
> +	device = (u16)buffer[3] << 8 | buffer[2];
> +	if (vendor != VENDOR_ID || device != DEVICE_ID) {
> +		dev_err(dev, "Invalid vendor/device id %04x/%04x\n",
> +			vendor, device);
> +		return -ENODEV;
> +	}
> +
> +	ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2);
> +	if (ret) {
> +		dev_err(&client->dev, "Failed to read firmware version\n");
> +		return ret;
> +	}
> +
> +	fwversion = (u16)buffer[0] << 8 | buffer[1];
> +	dev_info(dev, "ANX7688 firwmare version %02x.%02x\n",
> +		 buffer[0], buffer[1]);
> +
> +	/* FW version >= 0.85 supports bandwidth/lane count registers */
> +	if (fwversion >= MINIMUM_FW_VERSION) {
> +		anx7688->filter = true;
> +	} else {
> +		/* Warn, but not fail, for backwards compatibility. */
> +		dev_warn(dev,
> +			 "Old ANX7688 FW version (%02x.%02x), not filtering\n",
> +			 buffer[0], buffer[1]);
> +	}
> +
> +	anx7688->bridge.funcs = &anx7688_bridge_funcs;
> +	drm_bridge_add(&anx7688->bridge);
> +
> +	return 0;
> +}
> +
> +static int anx7688_i2c_remove(struct i2c_client *client)
> +{
> +	struct anx7688 *anx7688 = i2c_get_clientdata(client);
> +
> +	drm_bridge_remove(&anx7688->bridge);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id anx7688_id[] = {
> +	{ "anx7688", 0 },
> +	{ /* sentinel */ }
> +};
> +
> +MODULE_DEVICE_TABLE(i2c, anx7688_id);
> +
> +#if IS_ENABLED(CONFIG_OF)
> +static const struct of_device_id anx7688_match_table[] = {
> +	{ .compatible = "analogix,anx7688", },
> +	{ /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, anx7688_match_table);
> +#endif
> +
> +static struct i2c_driver anx7688_driver = {
> +	.driver = {
> +		   .name = "anx7688",
> +		   .of_match_table = of_match_ptr(anx7688_match_table),
> +		  },
> +	.probe = anx7688_i2c_probe,
> +	.remove = anx7688_i2c_remove,
> +	.id_table = anx7688_id,
> +};
> +
> +module_i2c_driver(anx7688_driver);
> +
> +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver");
> +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>");
> +MODULE_LICENSE("GPL v2");

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-11  6:19 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
@ 2019-12-12 11:50   ` Enric Balletbo i Serra
  2019-12-13 22:38   ` Laurent Pinchart
  1 sibling, 0 replies; 20+ messages in thread
From: Enric Balletbo i Serra @ 2019-12-12 11:50 UTC (permalink / raw)
  To: Hsin-Yi Wang, dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	p.zabel, Matthias Brugger, Russell King

Hi Hsin-Yi,

On 11/12/19 7:19, Hsin-Yi Wang wrote:
> From: Nicolas Boichat <drinkcat@chromium.org>
> 
> ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
> that has an internal microcontroller.
> 
> The only reason a Linux kernel driver is necessary is to reject
> resolutions that require more bandwidth than what is available on
> the DP side. DP bandwidth and lane count are reported by the bridge
> via 2 registers on I2C.
> 
> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---

Although I am not a drm expert I did an initial review of this patch before
sending and looks good to me now. Also I just tested with current mainline on my
ELM device and I am happy to have display now, so thanks for sending this upstream:

Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

>  drivers/gpu/drm/bridge/Kconfig            |   9 +
>  drivers/gpu/drm/bridge/Makefile           |   1 +
>  drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
>  3 files changed, 212 insertions(+)
>  create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c
> 
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 34362976cd6f..1f3fc6bec842 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
>  menu "Display Interface Bridges"
>  	depends on DRM && DRM_BRIDGE
>  
> +config DRM_ANALOGIX_ANX7688
> +	tristate "Analogix ANX7688 bridge"
> +	select DRM_KMS_HELPER
> +	select REGMAP_I2C
> +	---help---
> +	  ANX7688 is a transmitter to support DisplayPort over USB-C for
> +	  smartphone and tablets.
> +	  This driver only supports the HDMI to DP component of the chip.
> +
>  config DRM_ANALOGIX_ANX78XX
>  	tristate "Analogix ANX78XX bridge"
>  	select DRM_KMS_HELPER
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index 4934fcf5a6f8..7a1e0ec032e6 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -1,4 +1,5 @@
>  # SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
>  obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
>  obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
>  obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
> diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
> new file mode 100644
> index 000000000000..baaed48d6201
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
> @@ -0,0 +1,202 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * ANX7688 HDMI->DP bridge driver
> + *
> + * Copyright 2016 Google LLC
> + */
> +
> +#include <linux/i2c.h>
> +#include <linux/module.h>
> +#include <linux/regmap.h>
> +#include <drm/drm_bridge.h>
> +
> +/* Register addresses */
> +#define VENDOR_ID_REG 0x00
> +#define DEVICE_ID_REG 0x02
> +
> +#define FW_VERSION_REG 0x80
> +
> +#define DP_BANDWIDTH_REG 0x85
> +#define DP_LANE_COUNT_REG 0x86
> +
> +#define VENDOR_ID 0x1f29
> +#define DEVICE_ID 0x7688
> +
> +/* First supported firmware version (0.85) */
> +#define MINIMUM_FW_VERSION 0x0085
> +
> +struct anx7688 {
> +	struct drm_bridge bridge;
> +	struct i2c_client *client;
> +	struct regmap *regmap;
> +
> +	bool filter;
> +};
> +
> +static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge)
> +{
> +	return container_of(bridge, struct anx7688, bridge);
> +}
> +
> +static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
> +				      const struct drm_display_mode *mode,
> +				      struct drm_display_mode *adjusted_mode)
> +{
> +	struct anx7688 *anx7688 = bridge_to_anx7688(bridge);
> +	u8 regs[2];
> +	u8 dpbw, lanecount;
> +	int totalbw, requiredbw;
> +	int ret;
> +
> +	if (!anx7688->filter)
> +		return true;
> +
> +	/* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */
> +	ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2);
> +	if (ret < 0) {
> +		dev_err(&anx7688->client->dev,
> +			"Failed to read bandwidth/lane count\n");
> +		return false;
> +	}
> +	dpbw = regs[0];
> +	lanecount = regs[1];
> +
> +	/* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */
> +	if (dpbw > 0x19 || lanecount > 2) {
> +		dev_err(&anx7688->client->dev,
> +			"Invalid bandwidth/lane count (%02x/%d)\n",
> +			dpbw, lanecount);
> +		return false;
> +	}
> +
> +	/* Compute available bandwidth (kHz) */
> +	totalbw = dpbw * lanecount * 270000 * 8 / 10;
> +
> +	/* Required bandwidth (8 bpc, kHz) */
> +	requiredbw = mode->clock * 8 * 3;
> +
> +	dev_dbg(&anx7688->client->dev,
> +		"DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n",
> +		totalbw, dpbw, lanecount, requiredbw);
> +
> +	if (totalbw == 0) {
> +		dev_warn(&anx7688->client->dev,
> +			 "Bandwidth/lane count are 0, not rejecting modes\n");
> +		return true;
> +	}
> +
> +	return totalbw >= requiredbw;
> +}
> +
> +static const struct drm_bridge_funcs anx7688_bridge_funcs = {
> +	.mode_fixup	= anx7688_bridge_mode_fixup,
> +};
> +
> +static const struct regmap_config anx7688_regmap_config = {
> +	.reg_bits = 8,
> +	.val_bits = 8,
> +};
> +
> +static int anx7688_i2c_probe(struct i2c_client *client,
> +			     const struct i2c_device_id *id)
> +{
> +	struct anx7688 *anx7688;
> +	struct device *dev = &client->dev;
> +	int ret;
> +	u8 buffer[4];
> +	u16 vendor, device, fwversion;
> +
> +	anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL);
> +	if (!anx7688)
> +		return -ENOMEM;
> +
> +#if IS_ENABLED(CONFIG_OF)
> +	anx7688->bridge.of_node = client->dev.of_node;
> +#endif
> +
> +	anx7688->client = client;
> +	i2c_set_clientdata(client, anx7688);
> +
> +	anx7688->regmap =
> +		devm_regmap_init_i2c(client, &anx7688_regmap_config);
> +
> +	/* Read both vendor and device id (4 bytes). */
> +	ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4);
> +	if (ret) {
> +		dev_err(dev, "Failed to read chip vendor/device id\n");
> +		return ret;
> +	}
> +
> +	vendor = (u16)buffer[1] << 8 | buffer[0];
> +	device = (u16)buffer[3] << 8 | buffer[2];
> +	if (vendor != VENDOR_ID || device != DEVICE_ID) {
> +		dev_err(dev, "Invalid vendor/device id %04x/%04x\n",
> +			vendor, device);
> +		return -ENODEV;
> +	}
> +
> +	ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2);
> +	if (ret) {
> +		dev_err(&client->dev, "Failed to read firmware version\n");
> +		return ret;
> +	}
> +
> +	fwversion = (u16)buffer[0] << 8 | buffer[1];
> +	dev_info(dev, "ANX7688 firwmare version %02x.%02x\n",
> +		 buffer[0], buffer[1]);
> +
> +	/* FW version >= 0.85 supports bandwidth/lane count registers */
> +	if (fwversion >= MINIMUM_FW_VERSION) {
> +		anx7688->filter = true;
> +	} else {
> +		/* Warn, but not fail, for backwards compatibility. */
> +		dev_warn(dev,
> +			 "Old ANX7688 FW version (%02x.%02x), not filtering\n",
> +			 buffer[0], buffer[1]);
> +	}
> +
> +	anx7688->bridge.funcs = &anx7688_bridge_funcs;
> +	drm_bridge_add(&anx7688->bridge);
> +
> +	return 0;
> +}
> +
> +static int anx7688_i2c_remove(struct i2c_client *client)
> +{
> +	struct anx7688 *anx7688 = i2c_get_clientdata(client);
> +
> +	drm_bridge_remove(&anx7688->bridge);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id anx7688_id[] = {
> +	{ "anx7688", 0 },
> +	{ /* sentinel */ }
> +};
> +
> +MODULE_DEVICE_TABLE(i2c, anx7688_id);
> +
> +#if IS_ENABLED(CONFIG_OF)
> +static const struct of_device_id anx7688_match_table[] = {
> +	{ .compatible = "analogix,anx7688", },
> +	{ /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, anx7688_match_table);
> +#endif
> +
> +static struct i2c_driver anx7688_driver = {
> +	.driver = {
> +		   .name = "anx7688",
> +		   .of_match_table = of_match_ptr(anx7688_match_table),
> +		  },
> +	.probe = anx7688_i2c_probe,
> +	.remove = anx7688_i2c_remove,
> +	.id_table = anx7688_id,
> +};
> +
> +module_i2c_driver(anx7688_driver);
> +
> +MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver");
> +MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>");
> +MODULE_LICENSE("GPL v2");
> 

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support.
  2019-12-11  6:19 [PATCH RESEND 0/4] drm: bridge: anx7688 and mux drivers Hsin-Yi Wang
@ 2019-12-11  6:19 ` Hsin-Yi Wang
  2019-12-12 11:50   ` Enric Balletbo i Serra
  2019-12-13 22:38   ` Laurent Pinchart
  0 siblings, 2 replies; 20+ messages in thread
From: Hsin-Yi Wang @ 2019-12-11  6:19 UTC (permalink / raw)
  To: dri-devel
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Nicolas Boichat, devicetree, linux-kernel, Andrzej Hajda,
	Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
	p.zabel, Enric Balletbo i Serra, Matthias Brugger, Russell King

From: Nicolas Boichat <drinkcat@chromium.org>

ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
that has an internal microcontroller.

The only reason a Linux kernel driver is necessary is to reject
resolutions that require more bandwidth than what is available on
the DP side. DP bandwidth and lane count are reported by the bridge
via 2 registers on I2C.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 drivers/gpu/drm/bridge/Kconfig            |   9 +
 drivers/gpu/drm/bridge/Makefile           |   1 +
 drivers/gpu/drm/bridge/analogix-anx7688.c | 202 ++++++++++++++++++++++
 3 files changed, 212 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/analogix-anx7688.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 34362976cd6f..1f3fc6bec842 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -16,6 +16,15 @@ config DRM_PANEL_BRIDGE
 menu "Display Interface Bridges"
 	depends on DRM && DRM_BRIDGE
 
+config DRM_ANALOGIX_ANX7688
+	tristate "Analogix ANX7688 bridge"
+	select DRM_KMS_HELPER
+	select REGMAP_I2C
+	---help---
+	  ANX7688 is a transmitter to support DisplayPort over USB-C for
+	  smartphone and tablets.
+	  This driver only supports the HDMI to DP component of the chip.
+
 config DRM_ANALOGIX_ANX78XX
 	tristate "Analogix ANX78XX bridge"
 	select DRM_KMS_HELPER
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 4934fcf5a6f8..7a1e0ec032e6 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_DRM_ANALOGIX_ANX7688) += analogix-anx7688.o
 obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o
 obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
 obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
diff --git a/drivers/gpu/drm/bridge/analogix-anx7688.c b/drivers/gpu/drm/bridge/analogix-anx7688.c
new file mode 100644
index 000000000000..baaed48d6201
--- /dev/null
+++ b/drivers/gpu/drm/bridge/analogix-anx7688.c
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ANX7688 HDMI->DP bridge driver
+ *
+ * Copyright 2016 Google LLC
+ */
+
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <drm/drm_bridge.h>
+
+/* Register addresses */
+#define VENDOR_ID_REG 0x00
+#define DEVICE_ID_REG 0x02
+
+#define FW_VERSION_REG 0x80
+
+#define DP_BANDWIDTH_REG 0x85
+#define DP_LANE_COUNT_REG 0x86
+
+#define VENDOR_ID 0x1f29
+#define DEVICE_ID 0x7688
+
+/* First supported firmware version (0.85) */
+#define MINIMUM_FW_VERSION 0x0085
+
+struct anx7688 {
+	struct drm_bridge bridge;
+	struct i2c_client *client;
+	struct regmap *regmap;
+
+	bool filter;
+};
+
+static inline struct anx7688 *bridge_to_anx7688(struct drm_bridge *bridge)
+{
+	return container_of(bridge, struct anx7688, bridge);
+}
+
+static bool anx7688_bridge_mode_fixup(struct drm_bridge *bridge,
+				      const struct drm_display_mode *mode,
+				      struct drm_display_mode *adjusted_mode)
+{
+	struct anx7688 *anx7688 = bridge_to_anx7688(bridge);
+	u8 regs[2];
+	u8 dpbw, lanecount;
+	int totalbw, requiredbw;
+	int ret;
+
+	if (!anx7688->filter)
+		return true;
+
+	/* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */
+	ret = regmap_bulk_read(anx7688->regmap, DP_BANDWIDTH_REG, regs, 2);
+	if (ret < 0) {
+		dev_err(&anx7688->client->dev,
+			"Failed to read bandwidth/lane count\n");
+		return false;
+	}
+	dpbw = regs[0];
+	lanecount = regs[1];
+
+	/* Maximum 0x19 bandwidth (6.75 Gbps Turbo mode), 2 lanes */
+	if (dpbw > 0x19 || lanecount > 2) {
+		dev_err(&anx7688->client->dev,
+			"Invalid bandwidth/lane count (%02x/%d)\n",
+			dpbw, lanecount);
+		return false;
+	}
+
+	/* Compute available bandwidth (kHz) */
+	totalbw = dpbw * lanecount * 270000 * 8 / 10;
+
+	/* Required bandwidth (8 bpc, kHz) */
+	requiredbw = mode->clock * 8 * 3;
+
+	dev_dbg(&anx7688->client->dev,
+		"DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n",
+		totalbw, dpbw, lanecount, requiredbw);
+
+	if (totalbw == 0) {
+		dev_warn(&anx7688->client->dev,
+			 "Bandwidth/lane count are 0, not rejecting modes\n");
+		return true;
+	}
+
+	return totalbw >= requiredbw;
+}
+
+static const struct drm_bridge_funcs anx7688_bridge_funcs = {
+	.mode_fixup	= anx7688_bridge_mode_fixup,
+};
+
+static const struct regmap_config anx7688_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+};
+
+static int anx7688_i2c_probe(struct i2c_client *client,
+			     const struct i2c_device_id *id)
+{
+	struct anx7688 *anx7688;
+	struct device *dev = &client->dev;
+	int ret;
+	u8 buffer[4];
+	u16 vendor, device, fwversion;
+
+	anx7688 = devm_kzalloc(dev, sizeof(*anx7688), GFP_KERNEL);
+	if (!anx7688)
+		return -ENOMEM;
+
+#if IS_ENABLED(CONFIG_OF)
+	anx7688->bridge.of_node = client->dev.of_node;
+#endif
+
+	anx7688->client = client;
+	i2c_set_clientdata(client, anx7688);
+
+	anx7688->regmap =
+		devm_regmap_init_i2c(client, &anx7688_regmap_config);
+
+	/* Read both vendor and device id (4 bytes). */
+	ret = regmap_bulk_read(anx7688->regmap, VENDOR_ID_REG, buffer, 4);
+	if (ret) {
+		dev_err(dev, "Failed to read chip vendor/device id\n");
+		return ret;
+	}
+
+	vendor = (u16)buffer[1] << 8 | buffer[0];
+	device = (u16)buffer[3] << 8 | buffer[2];
+	if (vendor != VENDOR_ID || device != DEVICE_ID) {
+		dev_err(dev, "Invalid vendor/device id %04x/%04x\n",
+			vendor, device);
+		return -ENODEV;
+	}
+
+	ret = regmap_bulk_read(anx7688->regmap, FW_VERSION_REG, buffer, 2);
+	if (ret) {
+		dev_err(&client->dev, "Failed to read firmware version\n");
+		return ret;
+	}
+
+	fwversion = (u16)buffer[0] << 8 | buffer[1];
+	dev_info(dev, "ANX7688 firwmare version %02x.%02x\n",
+		 buffer[0], buffer[1]);
+
+	/* FW version >= 0.85 supports bandwidth/lane count registers */
+	if (fwversion >= MINIMUM_FW_VERSION) {
+		anx7688->filter = true;
+	} else {
+		/* Warn, but not fail, for backwards compatibility. */
+		dev_warn(dev,
+			 "Old ANX7688 FW version (%02x.%02x), not filtering\n",
+			 buffer[0], buffer[1]);
+	}
+
+	anx7688->bridge.funcs = &anx7688_bridge_funcs;
+	drm_bridge_add(&anx7688->bridge);
+
+	return 0;
+}
+
+static int anx7688_i2c_remove(struct i2c_client *client)
+{
+	struct anx7688 *anx7688 = i2c_get_clientdata(client);
+
+	drm_bridge_remove(&anx7688->bridge);
+
+	return 0;
+}
+
+static const struct i2c_device_id anx7688_id[] = {
+	{ "anx7688", 0 },
+	{ /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(i2c, anx7688_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id anx7688_match_table[] = {
+	{ .compatible = "analogix,anx7688", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, anx7688_match_table);
+#endif
+
+static struct i2c_driver anx7688_driver = {
+	.driver = {
+		   .name = "anx7688",
+		   .of_match_table = of_match_ptr(anx7688_match_table),
+		  },
+	.probe = anx7688_i2c_probe,
+	.remove = anx7688_i2c_remove,
+	.id_table = anx7688_id,
+};
+
+module_i2c_driver(anx7688_driver);
+
+MODULE_DESCRIPTION("ANX7688 SlimPort Transmitter driver");
+MODULE_AUTHOR("Nicolas Boichat <drinkcat@chromium.org>");
+MODULE_LICENSE("GPL v2");
-- 
2.24.0.525.g8f36a354ae-goog


^ permalink raw reply related	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2019-12-17  6:04 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-12-09 14:50 [PATCH RESEND 0/4] drm: bridge: anx7688 and an optional feature Hsin-Yi Wang
2019-12-09 14:50 ` [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding Hsin-Yi Wang
2019-12-09 14:53   ` Laurent Pinchart
2019-12-11  6:29     ` Hsin-Yi Wang
2019-12-09 14:50 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
2019-12-09 14:50 ` [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx: support bypass GPIO Hsin-Yi Wang
2019-12-09 14:55   ` Laurent Pinchart
2019-12-09 15:09     ` Hsin-Yi Wang
2019-12-09 15:32       ` Laurent Pinchart
2019-12-11  6:34         ` Hsin-Yi Wang
2019-12-09 14:50 ` [PATCH RESEND 4/4] drm: bridge: anx7688: Support bypass GPIO feature Hsin-Yi Wang
2019-12-11  6:19 [PATCH RESEND 0/4] drm: bridge: anx7688 and mux drivers Hsin-Yi Wang
2019-12-11  6:19 ` [PATCH RESEND 2/4] drm: bridge: anx7688: Add anx7688 bridge driver support Hsin-Yi Wang
2019-12-12 11:50   ` Enric Balletbo i Serra
2019-12-13 22:38   ` Laurent Pinchart
2019-12-16  8:45     ` Hsin-Yi Wang
2019-12-16 10:19       ` Nicolas Boichat
2019-12-16 16:39         ` Laurent Pinchart
     [not found]           ` <CANMq1KA1OMMzwLVMhFeb-zLuPLJsXrvVMji=u0RZ_kWnQprvoA@mail.gmail.com>
2019-12-17  0:40             ` Nicolas Boichat
2019-12-17  0:52               ` Laurent Pinchart
2019-12-17  6:04                 ` Nicolas Boichat

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