[RFC PATCH 01/35] xen-pciback: Change PCIBIOS_SUCCESSFUL to 0

[RFC PATCH 01/35] xen-pciback: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/xen/xen-pciback/conf_space.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/xen-pciback/conf_space.c b/drivers/xen/xen-pciback/conf_space.c
index 059de92aea7d..0e7577f16f78 100644
--- a/drivers/xen/xen-pciback/conf_space.c
+++ b/drivers/xen/xen-pciback/conf_space.c
@@ -130,7 +130,7 @@ static inline u32 merge_value(u32 val, u32 new_val, u32 new_val_mask,
 static int xen_pcibios_err_to_errno(int err)
 {
 	switch (err) {
-	case PCIBIOS_SUCCESSFUL:
+	case 0:
 		return XEN_PCI_ERR_success;
 	case PCIBIOS_DEVICE_NOT_FOUND:
 		return XEN_PCI_ERR_dev_not_found;
-- 
2.18.2

[RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/ssb/driver_gige.c    | 4 ++--
 drivers/ssb/driver_pcicore.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/ssb/driver_gige.c b/drivers/ssb/driver_gige.c
index ebee6b0e3c34..ccb4a35715bf 100644
--- a/drivers/ssb/driver_gige.c
+++ b/drivers/ssb/driver_gige.c
@@ -134,7 +134,7 @@ static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 	}
 	spin_unlock_irqrestore(&dev->lock, flags);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -164,7 +164,7 @@ static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 	}
 	spin_unlock_irqrestore(&dev->lock, flags);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ssb_gige_probe(struct ssb_device *sdev,
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index c1186415896b..1b67af1097c8 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -212,7 +212,7 @@ static int ssb_pcicore_read_config(struct pci_bus *bus, unsigned int devfn,
 				     PCI_FUNC(devfn), reg, val, size);
 	spin_unlock_irqrestore(&cfgspace_lock, flags);
 
-	return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int ssb_pcicore_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -226,7 +226,7 @@ static int ssb_pcicore_write_config(struct pci_bus *bus, unsigned int devfn,
 				      PCI_FUNC(devfn), reg, &val, size);
 	spin_unlock_irqrestore(&cfgspace_lock, flags);
 
-	return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static struct pci_ops ssb_pcicore_pciops = {
-- 
2.18.2

[RFC PATCH 03/35] scsi: ipr: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/scsi/ipr.c     | 16 ++++++++--------
 drivers/scsi/pmcraid.c |  6 +++---
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 7d86f4ca266c..b6c52a04cf52 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -775,7 +775,7 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 		return 0;
 
 	if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-				 &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
+				 &ioa_cfg->saved_pcix_cmd_reg) != 0) {
 		dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
 		return -EIO;
 	}
@@ -797,7 +797,7 @@ static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 
 	if (pcix_cmd_reg) {
 		if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-					  ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
+					  ioa_cfg->saved_pcix_cmd_reg) != 0) {
 			dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
 			return -EIO;
 		}
@@ -8739,7 +8739,7 @@ static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
 static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 {
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 
 	ENTER;
 	if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
@@ -8748,7 +8748,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 	else
 		rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
 
-	if (rc == PCIBIOS_SUCCESSFUL) {
+	if (rc == 0) {
 		ipr_cmd->job_step = ipr_reset_bist_done;
 		ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
 		rc = IPR_RC_JOB_RETURN;
@@ -8946,7 +8946,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
 	ENTER;
 	rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
 
-	if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
+	if ((rc == 0) && (cmd_reg & PCI_COMMAND_MEMORY)) {
 		ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
 		writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
 		ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
@@ -10154,7 +10154,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	struct Scsi_Host *host;
 	unsigned long ipr_regs_pci;
 	void __iomem *ipr_regs;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 	volatile u32 mask, uproc, interrupts;
 	unsigned long lock_flags, driver_lock_flags;
 	unsigned int irq_flag;
@@ -10256,7 +10256,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
 				   ioa_cfg->chip_cfg->cache_line_size);
 
-	if (rc != PCIBIOS_SUCCESSFUL) {
+	if (rc != 0) {
 		dev_err(&pdev->dev, "Write of cache line size failed\n");
 		ipr_wait_for_pci_err_recovery(ioa_cfg);
 		rc = -EIO;
@@ -10337,7 +10337,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	/* Save away PCI config space for use following IOA reset */
 	rc = pci_save_state(pdev);
 
-	if (rc != PCIBIOS_SUCCESSFUL) {
+	if (rc != 0) {
 		dev_err(&pdev->dev, "Failed to save PCI config space\n");
 		rc = -EIO;
 		goto cleanup_nolog;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index aa9ae2ae8579..5f6e440f0dcd 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -553,7 +553,7 @@ static void pmcraid_bist_done(struct timer_list *t)
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
 
 	/* If PCI config space can't be accessed wait for another two secs */
-	if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
+	if ((rc != 0 || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
 	    cmd->time_left > 0) {
 		pmcraid_info("BIST not complete, waiting another 2 secs\n");
 		cmd->timer.expires = jiffies + cmd->time_left;
@@ -649,7 +649,7 @@ static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
 	 * BIST or slot_reset
 	 */
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
-	if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
+	if ((rc == 0) && (pci_reg & PCI_COMMAND_MEMORY)) {
 
 		/* wait for IOA permission i.e until CRITICAL_OPERATION bit is
 		 * reset IOA doesn't generate any interrupts when CRITICAL
@@ -5651,7 +5651,7 @@ static int pmcraid_probe(struct pci_dev *pdev,
 	struct pmcraid_instance *pinstance;
 	struct Scsi_Host *host;
 	void __iomem *mapped_pci_addr;
-	int rc = PCIBIOS_SUCCESSFUL;
+	int rc = 0;
 
 	if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
 		pmcraid_err
-- 
2.18.2

[RFC PATCH 04/35] scsi: ipr: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 03/35

 drivers/scsi/ipr.c     | 12 ++++++------
 drivers/scsi/pmcraid.c |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index b6c52a04cf52..e714f82769bc 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -775,7 +775,7 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 		return 0;
 
 	if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-				 &ioa_cfg->saved_pcix_cmd_reg) != 0) {
+				 &ioa_cfg->saved_pcix_cmd_reg)) {
 		dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
 		return -EIO;
 	}
@@ -797,7 +797,7 @@ static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 
 	if (pcix_cmd_reg) {
 		if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-					  ioa_cfg->saved_pcix_cmd_reg) != 0) {
+					  ioa_cfg->saved_pcix_cmd_reg)) {
 			dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
 			return -EIO;
 		}
@@ -8748,7 +8748,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 	else
 		rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
 
-	if (rc == 0) {
+	if (!rc) {
 		ipr_cmd->job_step = ipr_reset_bist_done;
 		ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
 		rc = IPR_RC_JOB_RETURN;
@@ -8946,7 +8946,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
 	ENTER;
 	rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
 
-	if ((rc == 0) && (cmd_reg & PCI_COMMAND_MEMORY)) {
+	if ((!rc) && (cmd_reg & PCI_COMMAND_MEMORY)) {
 		ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
 		writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
 		ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
@@ -10256,7 +10256,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
 				   ioa_cfg->chip_cfg->cache_line_size);
 
-	if (rc != 0) {
+	if (rc) {
 		dev_err(&pdev->dev, "Write of cache line size failed\n");
 		ipr_wait_for_pci_err_recovery(ioa_cfg);
 		rc = -EIO;
@@ -10337,7 +10337,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
 	/* Save away PCI config space for use following IOA reset */
 	rc = pci_save_state(pdev);
 
-	if (rc != 0) {
+	if (rc) {
 		dev_err(&pdev->dev, "Failed to save PCI config space\n");
 		rc = -EIO;
 		goto cleanup_nolog;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 5f6e440f0dcd..151aa61b674b 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -553,7 +553,7 @@ static void pmcraid_bist_done(struct timer_list *t)
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
 
 	/* If PCI config space can't be accessed wait for another two secs */
-	if ((rc != 0 || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
+	if ((rc || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
 	    cmd->time_left > 0) {
 		pmcraid_info("BIST not complete, waiting another 2 secs\n");
 		cmd->timer.expires = jiffies + cmd->time_left;
@@ -649,7 +649,7 @@ static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
 	 * BIST or slot_reset
 	 */
 	rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
-	if ((rc == 0) && (pci_reg & PCI_COMMAND_MEMORY)) {
+	if ((!rc) && (pci_reg & PCI_COMMAND_MEMORY)) {
 
 		/* wait for IOA permission i.e until CRITICAL_OPERATION bit is
 		 * reset IOA doesn't generate any interrupts when CRITICAL
-- 
2.18.2

[RFC PATCH 05/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/pci/controller/dwc/pci-meson.c        |  4 +--
 .../pci/controller/dwc/pcie-designware-host.c |  2 +-
 drivers/pci/controller/dwc/pcie-designware.c  |  4 +--
 drivers/pci/controller/dwc/pcie-hisi.c        |  4 +--
 drivers/pci/controller/dwc/pcie-tegra194.c    |  4 +--
 .../pci/controller/mobiveil/pcie-mobiveil.c   |  4 +--
 drivers/pci/controller/pci-aardvark.c         |  4 +--
 drivers/pci/controller/pci-ftpci100.c         |  4 +--
 drivers/pci/controller/pci-hyperv.c           |  8 ++---
 drivers/pci/controller/pci-mvebu.c            |  4 +--
 drivers/pci/controller/pci-thunder-ecam.c     | 36 +++++++++----------
 drivers/pci/controller/pci-thunder-pem.c      |  4 +--
 drivers/pci/controller/pci-xgene.c            |  4 +--
 drivers/pci/controller/pcie-altera.c          | 16 ++++-----
 drivers/pci/controller/pcie-iproc.c           | 10 +++---
 drivers/pci/controller/pcie-mediatek.c        |  4 +--
 drivers/pci/controller/pcie-rcar-host.c       |  8 ++---
 drivers/pci/controller/pcie-rockchip-host.c   | 10 +++---
 18 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index ca59ba9e0ecd..58142f03d300 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -390,7 +390,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
 	int ret;
 
 	ret = dw_pcie_read(pci->dbi_base + where, size, val);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	/*
@@ -407,7 +407,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
 	else if (where == PCI_CLASS_DEVICE + 1 && size == 1)
 		*val = (PCI_CLASS_BRIDGE_PCI >> 8) & 0xff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int meson_pcie_wr_own_conf(struct pcie_port *pp, int where,
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 0a4a5aa6fe46..7c97c54f787c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -459,7 +459,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	}
 
 	ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
-	if (ret != PCIBIOS_SUCCESSFUL) {
+	if (ret != 0) {
 		dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg (ret: 0x%x)\n",
 			ret);
 		ret = pcibios_err_to_errno(ret);
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index c92496e36fd5..2494e1be1f96 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -113,7 +113,7 @@ int dw_pcie_read(void __iomem *addr, int size, u32 *val)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(dw_pcie_read);
 
@@ -131,7 +131,7 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val)
 	else
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(dw_pcie_write);
 
diff --git a/drivers/pci/controller/dwc/pcie-hisi.c b/drivers/pci/controller/dwc/pcie-hisi.c
index 0ad4e07dd4c2..10a46aded227 100644
--- a/drivers/pci/controller/dwc/pcie-hisi.c
+++ b/drivers/pci/controller/dwc/pcie-hisi.c
@@ -163,7 +163,7 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size,
 	else
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /* HipXX PCIe host only supports 32-bit config access */
@@ -190,7 +190,7 @@ static int hisi_pcie_cfg_write(struct pcie_port *pp, int where, int  size,
 	} else
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi_pcie)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 92b77f7d8354..34fe0084a4d1 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -581,7 +581,7 @@ static int tegra_pcie_dw_rd_own_conf(struct pcie_port *pp, int where, int size,
 	 */
 	if (where == PORT_LOGIC_MSIX_DOORBELL) {
 		*val = 0x00000000;
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	return dw_pcie_read(pci->dbi_base + where, size, val);
@@ -599,7 +599,7 @@ static int tegra_pcie_dw_wr_own_conf(struct pcie_port *pp, int where, int size,
 	 * So skip accessing it altogether
 	 */
 	if (where == PORT_LOGIC_MSIX_DOORBELL)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	return dw_pcie_write(pci->dbi_base + where, size, val);
 }
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
index 62ecbaeb0a60..f9f03b022d0e 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
@@ -71,7 +71,7 @@ static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val)
@@ -93,7 +93,7 @@ static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 90ff291c24f0..b9a2d3359317 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -700,7 +700,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	else if (size == 2)
 		*val = (*val >> (8 * (where & 3))) & 0xffff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
@@ -760,7 +760,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 
 	advk_pcie_check_pio_status(pcie);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops advk_pcie_ops = {
diff --git a/drivers/pci/controller/pci-ftpci100.c b/drivers/pci/controller/pci-ftpci100.c
index 1b67564de7af..449187e8c298 100644
--- a/drivers/pci/controller/pci-ftpci100.c
+++ b/drivers/pci/controller/pci-ftpci100.c
@@ -204,7 +204,7 @@ static int faraday_raw_pci_read_config(struct faraday_pci *p, int bus_number,
 	else if (size == 2)
 		*value = (*value >> (8 * (config & 3))) & 0xFFFF;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int faraday_pci_read_config(struct pci_bus *bus, unsigned int fn,
@@ -223,7 +223,7 @@ static int faraday_raw_pci_write_config(struct faraday_pci *p, int bus_number,
 					 unsigned int fn, int config, int size,
 					 u32 value)
 {
-	int ret = PCIBIOS_SUCCESSFUL;
+	int ret = 0;
 
 	writel(PCI_CONF_BUS(bus_number) |
 			PCI_CONF_DEVICE(PCI_SLOT(fn)) |
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index bf40ff09c99d..b1552394e2d6 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -807,7 +807,7 @@ static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
  * @size: Byte/word/dword
  * @val: Value to be read
  *
- * Return: PCIBIOS_SUCCESSFUL on success
+ * Return: 0 on success
  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
  */
 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -824,7 +824,7 @@ static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
 	_hv_pcifront_read_config(hpdev, where, size, val);
 
 	put_pcichild(hpdev);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /**
@@ -835,7 +835,7 @@ static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
  * @size: Byte/word/dword
  * @val: Value to be written to device
  *
- * Return: PCIBIOS_SUCCESSFUL on success
+ * Return: 0 on success
  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
  */
 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -852,7 +852,7 @@ static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
 	_hv_pcifront_write_config(hpdev, where, size, val);
 
 	put_pcichild(hpdev);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /* PCIe operations */
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 153a64676bc9..30ef5ece4a3b 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -246,7 +246,7 @@ static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port,
@@ -272,7 +272,7 @@ static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port,
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /*
diff --git a/drivers/pci/controller/pci-thunder-ecam.c b/drivers/pci/controller/pci-thunder-ecam.c
index 7e8835fee5f7..8e30e1f9622e 100644
--- a/drivers/pci/controller/pci-thunder-ecam.c
+++ b/drivers/pci/controller/pci-thunder-ecam.c
@@ -37,7 +37,7 @@ static int handle_ea_bar(u32 e0, int bar, struct pci_bus *bus,
 
 	if (where_a == 0) {
 		set_val(e0, where, size, val);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	if (where_a == 0x4) {
 		addr = bus->ops->map_bus(bus, devfn, bar); /* BAR 0 */
@@ -49,7 +49,7 @@ static int handle_ea_bar(u32 e0, int bar, struct pci_bus *bus,
 		v &= ~0xf;
 		v |= 2; /* EA entry-1. Base-L */
 		set_val(v, where, size, val);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	if (where_a == 0x8) {
 		u32 barl_orig;
@@ -68,7 +68,7 @@ static int handle_ea_bar(u32 e0, int bar, struct pci_bus *bus,
 		v = ~barl_rb & ~3;
 		v |= 0xc; /* EA entry-2. Offset-L */
 		set_val(v, where, size, val);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	if (where_a == 0xc) {
 		addr = bus->ops->map_bus(bus, devfn, bar + 4); /* BAR 1 */
@@ -78,7 +78,7 @@ static int handle_ea_bar(u32 e0, int bar, struct pci_bus *bus,
 		}
 		v = readl(addr); /* EA entry-3. Base-H */
 		set_val(v, where, size, val);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	return PCIBIOS_DEVICE_NOT_FOUND;
 }
@@ -121,7 +121,7 @@ static int thunder_ecam_p2_config_read(struct pci_bus *bus, unsigned int devfn,
 	v |= node_bits;
 	set_val(v, where, size, val);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
@@ -172,7 +172,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 	     (where >= 0x1a4 && where < 0x1bc))) {
 		/* BAR or SR-IOV BAR */
 		*val = 0;
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	addr = bus->ops->map_bus(bus, devfn, 0);
@@ -207,7 +207,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 		if (!has_msix && where_a == 0x70) {
 			v |= 0xbc00; /* next capability is EA at 0xbc */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xb0) {
 			addr = bus->ops->map_bus(bus, devfn, where_a);
@@ -220,7 +220,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 				pr_err("Bad MSIX cap header: %08x\n", v);
 			v |= 0xbc00; /* next capability is EA at 0xbc */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xbc) {
 			if (is_nic)
@@ -232,7 +232,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 			else
 				v = 0x10014; /* EA last in chain, 1 entry */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a >= 0xc0 && where_a < 0xd0)
 			/* EA entry-0. PP=0, BAR0 Size:3 */
@@ -277,7 +277,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 				pr_err("Bad PCIe cap header: %08x\n", v);
 			v |= 0xbc00; /* next capability is EA at 0xbc */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xbc) {
 			if (is_nic_bridge)
@@ -285,7 +285,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 			else
 				v = 0x00014; /* EA last in chain, no entries */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xc0) {
 			if (is_rsl_bridge || is_nic_bridge)
@@ -297,33 +297,33 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
 			else if (is_dfa_bridge)
 				v = 0x0404; /* subordinate:secondary = 4:4 */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xc4 && is_nic_bridge) {
 			/* Enabled, not-Write, SP=ff, PP=05, BEI=6, ES=4 */
 			v = 0x80ff0564;
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xc8 && is_nic_bridge) {
 			v = 0x00000002; /* Base-L 64-bit */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xcc && is_nic_bridge) {
 			v = 0xfffffffe; /* MaxOffset-L 64-bit */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xd0 && is_nic_bridge) {
 			v = 0x00008430; /* NIC Base-H */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		if (where_a == 0xd4 && is_nic_bridge) {
 			v = 0x0000000f; /* MaxOffset-H */
 			set_val(v, where, size, val);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 	}
 no_emulation:
@@ -340,7 +340,7 @@ static int thunder_ecam_config_write(struct pci_bus *bus, unsigned int devfn,
 	if ((where >= 0x10 && where < 0x2c) ||
 	    (where >= 0x1a4 && where < 0x1bc))
 		/* BAR or SR-IOV BAR */
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	return pci_generic_config_write(bus, devfn, where, size, val);
 }
diff --git a/drivers/pci/controller/pci-thunder-pem.c b/drivers/pci/controller/pci-thunder-pem.c
index 3f847969143e..ae747d203514 100644
--- a/drivers/pci/controller/pci-thunder-pem.c
+++ b/drivers/pci/controller/pci-thunder-pem.c
@@ -123,7 +123,7 @@ static int thunder_pem_bridge_read(struct pci_bus *bus, unsigned int devfn,
 		break;
 	}
 	*val = read_val;
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int thunder_pem_config_read(struct pci_bus *bus, unsigned int devfn,
@@ -272,7 +272,7 @@ static int thunder_pem_bridge_write(struct pci_bus *bus, unsigned int devfn,
 	 */
 	write_val = (((u64)val) << 32) | where_aligned;
 	writeq(write_val, pem_pci->pem_reg_base + PEM_CFG_WR);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
index d1efa8ffbae1..bf74f0a8b451 100644
--- a/drivers/pci/controller/pci-xgene.c
+++ b/drivers/pci/controller/pci-xgene.c
@@ -168,7 +168,7 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
 	struct xgene_pcie_port *port = pcie_bus_to_port(bus);
 
 	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
-	    PCIBIOS_SUCCESSFUL)
+	    0)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	/*
@@ -187,7 +187,7 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
 	if (size <= 2)
 		*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 #endif
 
diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c
index 24cb1c331058..96f5bda32b58 100644
--- a/drivers/pci/controller/pcie-altera.c
+++ b/drivers/pci/controller/pcie-altera.c
@@ -226,7 +226,7 @@ static int tlp_read_packet(struct altera_pcie *pcie, u32 *value)
 				if (value)
 					*value = reg0;
 
-				return PCIBIOS_SUCCESSFUL;
+				return 0;
 			}
 		}
 		udelay(5);
@@ -273,7 +273,7 @@ static int s10_tlp_read_packet(struct altera_pcie *pcie, u32 *value)
 			    count == 4)
 				*value = dw[3];
 
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 	}
 
@@ -367,7 +367,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 						    value, false);
 
 	ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	/*
@@ -377,7 +377,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 	if ((bus == pcie->root_bus_nr) && (where == PCI_PRIMARY_BUS))
 		pcie->root_bus_nr = (u8)(value);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int s10_rp_read_cfg(struct altera_pcie *pcie, int where,
@@ -397,7 +397,7 @@ static int s10_rp_read_cfg(struct altera_pcie *pcie, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int s10_rp_write_cfg(struct altera_pcie *pcie, u8 busno,
@@ -424,7 +424,7 @@ static int s10_rp_write_cfg(struct altera_pcie *pcie, u8 busno,
 	if (busno == pcie->root_bus_nr && where == PCI_PRIMARY_BUS)
 		pcie->root_bus_nr = value & 0xff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,
@@ -453,7 +453,7 @@ static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,
 
 	ret = tlp_cfg_dword_read(pcie, busno, devfn,
 				 (where & ~DWORD_MASK), byte_en, &data);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	switch (size) {
@@ -468,7 +468,7 @@ static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int _altera_pcie_cfg_write(struct altera_pcie *pcie, u8 busno,
diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c
index 8c7f875acf7f..dac9352c0cb2 100644
--- a/drivers/pci/controller/pcie-iproc.c
+++ b/drivers/pci/controller/pcie-iproc.c
@@ -584,7 +584,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
 	/* root complex access */
 	if (busno == 0) {
 		ret = pci_generic_config_read32(bus, devfn, where, size, val);
-		if (ret == PCIBIOS_SUCCESSFUL)
+		if (ret == 0)
 			iproc_pcie_fix_cap(pcie, where, val);
 
 		return ret;
@@ -620,7 +620,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
 		    (PCI_DEVICE_ID_NX2_57810 << DEVICE_ID_SHIFT))
 			return PCIBIOS_FUNC_NOT_SUPPORTED;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /**
@@ -677,7 +677,7 @@ static int iproc_pci_raw_config_read32(struct iproc_pcie *pcie,
 	if (size <= 2)
 		*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie,
@@ -693,7 +693,7 @@ static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie,
 
 	if (size == 4) {
 		writel(val, addr);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8));
@@ -701,7 +701,7 @@ static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie,
 	tmp |= val << ((where & 0x3) * 8);
 	writel(tmp, addr);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int iproc_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index ebfa7d5a4e2d..9e8adec04ac2 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -274,7 +274,7 @@ static int mtk_pcie_check_cfg_cpld(struct mtk_pcie_port *port)
 	if (readl(port->base + PCIE_APP_TLP_REQ) & APP_CPL_STATUS)
 		return PCIBIOS_SET_FAILED;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int mtk_pcie_hw_rd_cfg(struct mtk_pcie_port *port, u32 bus, u32 devfn,
@@ -306,7 +306,7 @@ static int mtk_pcie_hw_rd_cfg(struct mtk_pcie_port *port, u32 bus, u32 devfn,
 	else if (size == 2)
 		*val = (*val >> (8 * (where & 3))) & 0xffff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int mtk_pcie_hw_wr_cfg(struct mtk_pcie_port *port, u32 bus, u32 devfn,
diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c
index d210a36561be..363a8630de28 100644
--- a/drivers/pci/controller/pcie-rcar-host.c
+++ b/drivers/pci/controller/pcie-rcar-host.c
@@ -110,7 +110,7 @@ static int rcar_pcie_config_access(struct rcar_pcie_host *host,
 			rcar_pci_write_reg(pcie, *data, PCICONF(index));
 		}
 
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	if (host->root_bus_nr < 0)
@@ -146,7 +146,7 @@ static int rcar_pcie_config_access(struct rcar_pcie_host *host,
 	/* Disable the configuration access */
 	rcar_pci_write_reg(pcie, 0, PCIECCTLR);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
@@ -157,7 +157,7 @@ static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
 
 	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
 				      bus, devfn, where, val);
-	if (ret != PCIBIOS_SUCCESSFUL) {
+	if (ret != 0) {
 		*val = 0xffffffff;
 		return ret;
 	}
@@ -184,7 +184,7 @@ static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn,
 
 	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
 				      bus, devfn, where, &data);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n",
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index 94af6f5828a3..6455f48d4e9c 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -125,7 +125,7 @@ static int rockchip_pcie_rd_own_conf(struct rockchip_pcie *rockchip,
 		*val = 0;
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rockchip_pcie_wr_own_conf(struct rockchip_pcie *rockchip,
@@ -139,7 +139,7 @@ static int rockchip_pcie_wr_own_conf(struct rockchip_pcie *rockchip,
 
 	if (size == 4) {
 		writel(val, addr);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8));
@@ -153,7 +153,7 @@ static int rockchip_pcie_wr_own_conf(struct rockchip_pcie *rockchip,
 	tmp |= val << ((where & 0x3) * 8);
 	writel(tmp, addr);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
@@ -187,7 +187,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
 		*val = 0;
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
@@ -217,7 +217,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
 	else
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rockchip_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
-- 
2.18.2

[RFC PATCH 06/35] PCI: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 05/35

 drivers/pci/controller/dwc/pci-meson.c            | 2 +-
 drivers/pci/controller/dwc/pcie-designware-host.c | 2 +-
 drivers/pci/controller/pci-xgene.c                | 3 +--
 drivers/pci/controller/pcie-altera.c              | 4 ++--
 drivers/pci/controller/pcie-iproc.c               | 2 +-
 drivers/pci/controller/pcie-rcar-host.c           | 4 ++--
 6 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index 58142f03d300..8203d5f95d28 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -390,7 +390,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
 	int ret;
 
 	ret = dw_pcie_read(pci->dbi_base + where, size, val);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	/*
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 7c97c54f787c..2dd3965365f6 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -459,7 +459,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	}
 
 	ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
-	if (ret != 0) {
+	if (ret) {
 		dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg (ret: 0x%x)\n",
 			ret);
 		ret = pcibios_err_to_errno(ret);
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
index bf74f0a8b451..8d55cfc4ff8a 100644
--- a/drivers/pci/controller/pci-xgene.c
+++ b/drivers/pci/controller/pci-xgene.c
@@ -167,8 +167,7 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
 {
 	struct xgene_pcie_port *port = pcie_bus_to_port(bus);
 
-	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
-	    0)
+	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	/*
diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c
index 96f5bda32b58..9f7b12ad0c04 100644
--- a/drivers/pci/controller/pcie-altera.c
+++ b/drivers/pci/controller/pcie-altera.c
@@ -367,7 +367,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
 						    value, false);
 
 	ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	/*
@@ -453,7 +453,7 @@ static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,
 
 	ret = tlp_cfg_dword_read(pcie, busno, devfn,
 				 (where & ~DWORD_MASK), byte_en, &data);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	switch (size) {
diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c
index dac9352c0cb2..d34c9457fbe4 100644
--- a/drivers/pci/controller/pcie-iproc.c
+++ b/drivers/pci/controller/pcie-iproc.c
@@ -584,7 +584,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
 	/* root complex access */
 	if (busno == 0) {
 		ret = pci_generic_config_read32(bus, devfn, where, size, val);
-		if (ret == 0)
+		if (!ret)
 			iproc_pcie_fix_cap(pcie, where, val);
 
 		return ret;
diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c
index 363a8630de28..2bb250c6f767 100644
--- a/drivers/pci/controller/pcie-rcar-host.c
+++ b/drivers/pci/controller/pcie-rcar-host.c
@@ -157,7 +157,7 @@ static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
 
 	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
 				      bus, devfn, where, val);
-	if (ret != 0) {
+	if (ret) {
 		*val = 0xffffffff;
 		return ret;
 	}
@@ -184,7 +184,7 @@ static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn,
 
 	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
 				      bus, devfn, where, &data);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n",
-- 
2.18.2

[RFC PATCH 07/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/pci/access.c               | 14 +++++++-------
 drivers/pci/pci-bridge-emul.c      | 14 +++++++-------
 drivers/pci/pci.c                  |  8 ++++----
 drivers/pci/pcie/bw_notification.c |  4 ++--
 drivers/pci/probe.c                |  4 ++--
 drivers/pci/quirks.c               |  2 +-
 drivers/pci/syscall.c              |  8 ++++----
 drivers/pci/xen-pcifront.c         |  2 +-
 8 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 79c4a2ef269a..b907abe38679 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -92,7 +92,7 @@ int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = readl(addr);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_read);
 
@@ -112,7 +112,7 @@ int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
 	else
 		writel(val, addr);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_write);
 
@@ -132,7 +132,7 @@ int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
 	if (size <= 2)
 		*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_read32);
 
@@ -148,7 +148,7 @@ int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
 
 	if (size == 4) {
 		writel(val, addr);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	/*
@@ -169,7 +169,7 @@ int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
 	tmp |= val << ((where & 0x3) * 8);
 	writel(tmp, addr);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_write32);
 
@@ -222,7 +222,7 @@ static noinline void pci_wait_cfg(struct pci_dev *dev)
 int pci_user_read_config_##size						\
 	(struct pci_dev *dev, int pos, type *val)			\
 {									\
-	int ret = PCIBIOS_SUCCESSFUL;					\
+	int ret = 0;					\
 	u32 data = -1;							\
 	if (PCI_##size##_BAD)						\
 		return -EINVAL;						\
@@ -242,7 +242,7 @@ EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
 int pci_user_write_config_##size					\
 	(struct pci_dev *dev, int pos, type val)			\
 {									\
-	int ret = PCIBIOS_SUCCESSFUL;					\
+	int ret = 0;					\
 	if (PCI_##size##_BAD)						\
 		return -EINVAL;						\
 	raw_spin_lock_irq(&pci_lock);				\
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index ccf26d12ec61..9695c453e197 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -323,12 +323,12 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
 
 	if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) {
 		*value = 0;
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END) {
 		*value = 0;
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 
 	if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
@@ -364,7 +364,7 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
 	else if (size != 4)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /*
@@ -383,10 +383,10 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
 	const struct pci_bridge_reg_behavior *behavior;
 
 	if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	shift = (where & 0x3) * 8;
 
@@ -400,7 +400,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
 	ret = pci_bridge_emul_conf_read(bridge, reg, 4, &old);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
@@ -428,5 +428,5 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
 	if (write_op)
 		write_op(bridge, reg, old, new, mask);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index ce096272f52b..a74547861d5e 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -185,7 +185,7 @@ int pci_status_get_and_clear_errors(struct pci_dev *pdev)
 	int ret;
 
 	ret = pci_read_config_word(pdev, PCI_STATUS, &status);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return -EIO;
 
 	status &= PCI_STATUS_ERROR_BITS;
@@ -534,7 +534,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
 	if (start)
 		pos = start;
 
-	if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
+	if (pci_read_config_dword(dev, pos, &header) != 0)
 		return 0;
 
 	/*
@@ -552,7 +552,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
 		if (pos < PCI_CFG_SPACE_SIZE)
 			break;
 
-		if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
+		if (pci_read_config_dword(dev, pos, &header) != 0)
 			break;
 	}
 
@@ -628,7 +628,7 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
 				      PCI_CAP_ID_HT, &ttl);
 	while (pos) {
 		rc = pci_read_config_byte(dev, pos + 3, &cap);
-		if (rc != PCIBIOS_SUCCESSFUL)
+		if (rc != 0)
 			return 0;
 
 		if ((cap & mask) == ht_cap)
diff --git a/drivers/pci/pcie/bw_notification.c b/drivers/pci/pcie/bw_notification.c
index 77e685771487..c7201d886026 100644
--- a/drivers/pci/pcie/bw_notification.c
+++ b/drivers/pci/pcie/bw_notification.c
@@ -23,7 +23,7 @@ static bool pcie_link_bandwidth_notification_supported(struct pci_dev *dev)
 	u32 lnk_cap;
 
 	ret = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnk_cap);
-	return (ret == PCIBIOS_SUCCESSFUL) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
+	return (ret == 0) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
 }
 
 static void pcie_enable_link_bandwidth_notification(struct pci_dev *dev)
@@ -56,7 +56,7 @@ static irqreturn_t pcie_bw_notification_irq(int irq, void *context)
 	ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status);
 	events = link_status & PCI_EXP_LNKSTA_LBMS;
 
-	if (ret != PCIBIOS_SUCCESSFUL || !events)
+	if (ret != 0 || !events)
 		return IRQ_NONE;
 
 	pcie_capability_write_word(port, PCI_EXP_LNKSTA, events);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 2f66988cea25..ab7e19882b30 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1582,7 +1582,7 @@ static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)
 
 	for (pos = PCI_CFG_SPACE_SIZE;
 	     pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {
-		if (pci_read_config_dword(dev, pos, &tmp) != PCIBIOS_SUCCESSFUL
+		if (pci_read_config_dword(dev, pos, &tmp) != 0
 		    || header != tmp)
 			return false;
 	}
@@ -1609,7 +1609,7 @@ static int pci_cfg_space_size_ext(struct pci_dev *dev)
 	u32 status;
 	int pos = PCI_CFG_SPACE_SIZE;
 
-	if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
+	if (pci_read_config_dword(dev, pos, &status) != 0)
 		return PCI_CFG_SPACE_SIZE;
 	if (status == 0xffffffff || pci_ext_cfg_is_aliased(dev))
 		return PCI_CFG_SPACE_SIZE;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 812bfc32ecb8..e60ef8abd698 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5117,7 +5117,7 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
 
 		pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
 		if (pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status) !=
-		    PCIBIOS_SUCCESSFUL || (status == 0xffffffff))
+		    0 || (status == 0xffffffff))
 			pdev->cfg_size = PCI_CFG_SPACE_SIZE;
 
 		if (pci_find_saved_cap(pdev, PCI_CAP_ID_EXP))
diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c
index 31e39558d49d..7d45b58beacd 100644
--- a/drivers/pci/syscall.c
+++ b/drivers/pci/syscall.c
@@ -46,7 +46,7 @@ SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,
 	}
 
 	err = -EIO;
-	if (cfg_ret != PCIBIOS_SUCCESSFUL)
+	if (cfg_ret != 0)
 		goto error;
 
 	switch (len) {
@@ -105,7 +105,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_byte(dev, off, byte);
-		if (err != PCIBIOS_SUCCESSFUL)
+		if (err != 0)
 			err = -EIO;
 		break;
 
@@ -114,7 +114,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_word(dev, off, word);
-		if (err != PCIBIOS_SUCCESSFUL)
+		if (err != 0)
 			err = -EIO;
 		break;
 
@@ -123,7 +123,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_dword(dev, off, dword);
-		if (err != PCIBIOS_SUCCESSFUL)
+		if (err != 0)
 			err = -EIO;
 		break;
 
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c
index fab267e359e7..f63623b683ad 100644
--- a/drivers/pci/xen-pcifront.c
+++ b/drivers/pci/xen-pcifront.c
@@ -81,7 +81,7 @@ static int errno_to_pcibios_err(int errno)
 {
 	switch (errno) {
 	case XEN_PCI_ERR_success:
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	case XEN_PCI_ERR_dev_not_found:
 		return PCIBIOS_DEVICE_NOT_FOUND;
-- 
2.18.2

[RFC PATCH 08/35] PCI: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 07/35

 drivers/pci/pci-bridge-emul.c      | 2 +-
 drivers/pci/pci.c                  | 8 ++++----
 drivers/pci/pcie/bw_notification.c | 4 ++--
 drivers/pci/probe.c                | 4 ++--
 drivers/pci/quirks.c               | 4 ++--
 drivers/pci/syscall.c              | 8 ++++----
 6 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 9695c453e197..c270c18d5cf5 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -400,7 +400,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
 	ret = pci_bridge_emul_conf_read(bridge, reg, 4, &old);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a74547861d5e..4b2a348576cb 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -185,7 +185,7 @@ int pci_status_get_and_clear_errors(struct pci_dev *pdev)
 	int ret;
 
 	ret = pci_read_config_word(pdev, PCI_STATUS, &status);
-	if (ret != 0)
+	if (ret)
 		return -EIO;
 
 	status &= PCI_STATUS_ERROR_BITS;
@@ -534,7 +534,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
 	if (start)
 		pos = start;
 
-	if (pci_read_config_dword(dev, pos, &header) != 0)
+	if (pci_read_config_dword(dev, pos, &header))
 		return 0;
 
 	/*
@@ -552,7 +552,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
 		if (pos < PCI_CFG_SPACE_SIZE)
 			break;
 
-		if (pci_read_config_dword(dev, pos, &header) != 0)
+		if (pci_read_config_dword(dev, pos, &header))
 			break;
 	}
 
@@ -628,7 +628,7 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
 				      PCI_CAP_ID_HT, &ttl);
 	while (pos) {
 		rc = pci_read_config_byte(dev, pos + 3, &cap);
-		if (rc != 0)
+		if (rc)
 			return 0;
 
 		if ((cap & mask) == ht_cap)
diff --git a/drivers/pci/pcie/bw_notification.c b/drivers/pci/pcie/bw_notification.c
index c7201d886026..f62c19ffedfc 100644
--- a/drivers/pci/pcie/bw_notification.c
+++ b/drivers/pci/pcie/bw_notification.c
@@ -23,7 +23,7 @@ static bool pcie_link_bandwidth_notification_supported(struct pci_dev *dev)
 	u32 lnk_cap;
 
 	ret = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnk_cap);
-	return (ret == 0) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
+	return (!ret) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
 }
 
 static void pcie_enable_link_bandwidth_notification(struct pci_dev *dev)
@@ -56,7 +56,7 @@ static irqreturn_t pcie_bw_notification_irq(int irq, void *context)
 	ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status);
 	events = link_status & PCI_EXP_LNKSTA_LBMS;
 
-	if (ret != 0 || !events)
+	if (ret || !events)
 		return IRQ_NONE;
 
 	pcie_capability_write_word(port, PCI_EXP_LNKSTA, events);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index ab7e19882b30..60ecebbc7dcf 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1582,7 +1582,7 @@ static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)
 
 	for (pos = PCI_CFG_SPACE_SIZE;
 	     pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {
-		if (pci_read_config_dword(dev, pos, &tmp) != 0
+		if (pci_read_config_dword(dev, pos, &tmp)
 		    || header != tmp)
 			return false;
 	}
@@ -1609,7 +1609,7 @@ static int pci_cfg_space_size_ext(struct pci_dev *dev)
 	u32 status;
 	int pos = PCI_CFG_SPACE_SIZE;
 
-	if (pci_read_config_dword(dev, pos, &status) != 0)
+	if (pci_read_config_dword(dev, pos, &status))
 		return PCI_CFG_SPACE_SIZE;
 	if (status == 0xffffffff || pci_ext_cfg_is_aliased(dev))
 		return PCI_CFG_SPACE_SIZE;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index e60ef8abd698..8b69d6ebb619 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5116,8 +5116,8 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
 		pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 
 		pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
-		if (pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status) !=
-		    0 || (status == 0xffffffff))
+		if (pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status)
+		     || (status == 0xffffffff))
 			pdev->cfg_size = PCI_CFG_SPACE_SIZE;
 
 		if (pci_find_saved_cap(pdev, PCI_CAP_ID_EXP))
diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c
index 7d45b58beacd..a208700000ea 100644
--- a/drivers/pci/syscall.c
+++ b/drivers/pci/syscall.c
@@ -46,7 +46,7 @@ SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,
 	}
 
 	err = -EIO;
-	if (cfg_ret != 0)
+	if (cfg_ret)
 		goto error;
 
 	switch (len) {
@@ -105,7 +105,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_byte(dev, off, byte);
-		if (err != 0)
+		if (err)
 			err = -EIO;
 		break;
 
@@ -114,7 +114,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_word(dev, off, word);
-		if (err != 0)
+		if (err)
 			err = -EIO;
 		break;
 
@@ -123,7 +123,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
 		if (err)
 			break;
 		err = pci_user_write_config_dword(dev, off, dword);
-		if (err != 0)
+		if (err)
 			err = -EIO;
 		break;
 
-- 
2.18.2

[RFC PATCH 09/35] nvme-pci: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/nvme/host/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index b1d18f0633c7..d426efb53f44 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
 
 	result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
 				      &pci_status);
-	if (result == PCIBIOS_SUCCESSFUL)
+	if (result == 0)
 		dev_warn(dev->ctrl.device,
 			 "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n",
 			 csts, pci_status);
-- 
2.18.2

[RFC PATCH 10/35] nvme-pci: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 09/35

 drivers/nvme/host/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index d426efb53f44..a04f2d0375de 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
 
 	result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
 				      &pci_status);
-	if (result == 0)
+	if (!result)
 		dev_warn(dev->ctrl.device,
 			 "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n",
 			 csts, pci_status);
-- 
2.18.2

[RFC PATCH 11/35] r8169: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/net/ethernet/realtek/r8169_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index b660ddbe4025..206dac958cb2 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2656,7 +2656,7 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val)
 	 * first and if it fails fall back to CSI.
 	 */
 	if (pdev->cfg_size > 0x070f &&
-	    pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL)
+	    pci_write_config_byte(pdev, 0x070f, val) == 0)
 		return;
 
 	netdev_notice_once(tp->dev,
-- 
2.18.2

[RFC PATCH 12/35] r8169: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 11/35

 drivers/net/ethernet/realtek/r8169_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 206dac958cb2..79edbc0c4476 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2656,7 +2656,7 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val)
 	 * first and if it fails fall back to CSI.
 	 */
 	if (pdev->cfg_size > 0x070f &&
-	    pci_write_config_byte(pdev, 0x070f, val) == 0)
+	    !pci_write_config_byte(pdev, 0x070f, val))
 		return;
 
 	netdev_notice_once(tp->dev,
-- 
2.18.2

[RFC PATCH 13/35] cxl: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
There scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/misc/cxl/vphb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 1cf320e2a415..1264253cc07b 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -150,7 +150,7 @@ static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
 
 out:
 	cxl_afu_configured_put(afu);
-	return rc ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return rc ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -184,7 +184,7 @@ static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
 
 out:
 	cxl_afu_configured_put(afu);
-	return rc ? PCIBIOS_SET_FAILED : PCIBIOS_SUCCESSFUL;
+	return rc ? PCIBIOS_SET_FAILED : 0;
 }
 
 static struct pci_ops cxl_pcie_pci_ops =
-- 
2.18.2

[RFC PATCH 14/35] i2c/busses: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/i2c/busses/i2c-ali15x3.c |  4 ++--
 drivers/i2c/busses/i2c-nforce2.c |  2 +-
 drivers/i2c/busses/i2c-sis5595.c | 10 +++++-----
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 02185a1cfa77..359ee3e0864a 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -167,11 +167,11 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
 	if(force_addr) {
 		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
 			ali15x3_smba);
-		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
+		if (0 != pci_write_config_word(ALI15X3_dev,
 								SMBBA,
 								ali15x3_smba))
 			goto error;
-		if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
+		if (0 != pci_read_config_word(ALI15X3_dev,
 								SMBBA, &a))
 			goto error;
 		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 777278386f58..385f4f446f36 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -328,7 +328,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
 		u16 iobase;
 
 		if (pci_read_config_word(dev, alt_reg, &iobase)
-		    != PCIBIOS_SUCCESSFUL) {
+		    != 0) {
 			dev_err(&dev->dev, "Error reading PCI config for %s\n",
 				name);
 			return -EIO;
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index c793a5c14cda..fbe3ee31eae3 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -176,10 +176,10 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
 	if (force_addr) {
 		dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", sis5595_base);
 		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
-		    != PCIBIOS_SUCCESSFUL)
+		    != 0)
 			goto error;
 		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
-		    != PCIBIOS_SUCCESSFUL)
+		    != 0)
 			goto error;
 		if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
 			/* doesn't work for some chips! */
@@ -189,15 +189,15 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
 	}
 
 	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-	    != PCIBIOS_SUCCESSFUL)
+	    != 0)
 		goto error;
 	if ((val & 0x80) == 0) {
 		dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
 		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80)
-		    != PCIBIOS_SUCCESSFUL)
+		    != 0)
 			goto error;
 		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-		    != PCIBIOS_SUCCESSFUL)
+		    != 0)
 			goto error;
 		if ((val & 0x80) == 0) {
 			/* doesn't work for some chips? */
-- 
2.18.2

[RFC PATCH 15/35] i2c/busses: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 15/35

 drivers/i2c/busses/i2c-ali15x3.c |  5 ++---
 drivers/i2c/busses/i2c-nforce2.c |  3 +--
 drivers/i2c/busses/i2c-sis5595.c | 15 +++++----------
 3 files changed, 8 insertions(+), 15 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 359ee3e0864a..c9e779cc184e 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -167,11 +167,10 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
 	if(force_addr) {
 		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
 			ali15x3_smba);
-		if (0 != pci_write_config_word(ALI15X3_dev,
-								SMBBA,
+		if (pci_write_config_word(ALI15X3_dev, SMBBA,
 								ali15x3_smba))
 			goto error;
-		if (0 != pci_read_config_word(ALI15X3_dev,
+		if (pci_read_config_word(ALI15X3_dev,
 								SMBBA, &a))
 			goto error;
 		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 385f4f446f36..54d2985b7aaf 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -327,8 +327,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
 		/* Older incarnations of the device used non-standard BARs */
 		u16 iobase;
 
-		if (pci_read_config_word(dev, alt_reg, &iobase)
-		    != 0) {
+		if (pci_read_config_word(dev, alt_reg, &iobase)) {
 			dev_err(&dev->dev, "Error reading PCI config for %s\n",
 				name);
 			return -EIO;
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index fbe3ee31eae3..b016f48519d3 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -175,11 +175,9 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
 
 	if (force_addr) {
 		dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", sis5595_base);
-		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
-		    != 0)
+		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base))
 			goto error;
-		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
-		    != 0)
+		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a))
 			goto error;
 		if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
 			/* doesn't work for some chips! */
@@ -188,16 +186,13 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
 		}
 	}
 
-	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-	    != 0)
+	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
 		goto error;
 	if ((val & 0x80) == 0) {
 		dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
-		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80)
-		    != 0)
+		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80))
 			goto error;
-		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-		    != 0)
+		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
 			goto error;
 		if ((val & 0x80) == 0) {
 			/* doesn't work for some chips? */
-- 
2.18.2

[RFC PATCH 16/35] hwmon: (sis5595) Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/hwmon/sis5595.c | 8 ++++----
 drivers/hwmon/via686a.c | 8 ++++----
 drivers/hwmon/vt8231.c  | 8 ++++----
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 0c6741f949f5..0ea174fb3048 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -825,7 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
 		pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
 	}
 
-	if (PCIBIOS_SUCCESSFUL !=
+	if (0 !=
 	    pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
 		dev_err(&dev->dev, "Failed to read ISA address\n");
 		return -ENODEV;
@@ -843,16 +843,16 @@ static int sis5595_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (PCIBIOS_SUCCESSFUL !=
+	if (0 !=
 	    pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
 		dev_err(&dev->dev, "Failed to read enable register\n");
 		return -ENODEV;
 	}
 	if (!(enable & 0x80)) {
-		if ((PCIBIOS_SUCCESSFUL !=
+		if ((0 !=
 		     pci_write_config_byte(dev, SIS5595_ENABLE_REG,
 					   enable | 0x80))
-		 || (PCIBIOS_SUCCESSFUL !=
+		 || (0 !=
 		     pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
 		 || (!(enable & 0x80))) {
 			/* doesn't work for some chips! */
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index a2eddd2c2538..cffea688878f 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -863,11 +863,11 @@ static int via686a_pci_probe(struct pci_dev *dev,
 	if (force_addr) {
 		address = force_addr & ~(VIA686A_EXTENT - 1);
 		dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
-		if (PCIBIOS_SUCCESSFUL !=
+		if (0 !=
 		    pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
 			return -ENODEV;
 	}
-	if (PCIBIOS_SUCCESSFUL !=
+	if (0 !=
 	    pci_read_config_word(dev, VIA686A_BASE_REG, &val))
 		return -ENODEV;
 
@@ -878,7 +878,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (PCIBIOS_SUCCESSFUL !=
+	if (0 !=
 	    pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
 		return -ENODEV;
 	if (!(val & 0x0001)) {
@@ -890,7 +890,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
 		}
 
 		dev_warn(&dev->dev, "Enabling sensors\n");
-		if (PCIBIOS_SUCCESSFUL !=
+		if (0 !=
 		    pci_write_config_word(dev, VIA686A_ENABLE_REG,
 					  val | 0x0001))
 			return -ENODEV;
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 2335d440f72d..cc1d24c2a2c8 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -987,12 +987,12 @@ static int vt8231_pci_probe(struct pci_dev *dev,
 		dev_warn(&dev->dev, "Forcing ISA address 0x%x\n",
 			 address);
 
-		if (PCIBIOS_SUCCESSFUL !=
+		if (0 !=
 		    pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
 			return -ENODEV;
 	}
 
-	if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_BASE_REG,
+	if (0 != pci_read_config_word(dev, VT8231_BASE_REG,
 							&val))
 		return -ENODEV;
 
@@ -1002,13 +1002,13 @@ static int vt8231_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_ENABLE_REG,
+	if (0 != pci_read_config_word(dev, VT8231_ENABLE_REG,
 							&val))
 		return -ENODEV;
 
 	if (!(val & 0x0001)) {
 		dev_warn(&dev->dev, "enabling sensors\n");
-		if (PCIBIOS_SUCCESSFUL !=
+		if (0 !=
 			pci_write_config_word(dev, VT8231_ENABLE_REG,
 							val | 0x0001))
 			return -ENODEV;
-- 
2.18.2

[RFC PATCH 17/35] hwmon: (sis5595) Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 16/35

 drivers/hwmon/sis5595.c | 13 ++++---------
 drivers/hwmon/via686a.c | 13 ++++---------
 drivers/hwmon/vt8231.c  | 13 ++++---------
 3 files changed, 12 insertions(+), 27 deletions(-)

diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 0ea174fb3048..91fdddaa4136 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -825,8 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
 		pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
 	}
 
-	if (0 !=
-	    pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
+	if (pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
 		dev_err(&dev->dev, "Failed to read ISA address\n");
 		return -ENODEV;
 	}
@@ -843,17 +842,13 @@ static int sis5595_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (0 !=
-	    pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
+	if (pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
 		dev_err(&dev->dev, "Failed to read enable register\n");
 		return -ENODEV;
 	}
 	if (!(enable & 0x80)) {
-		if ((0 !=
-		     pci_write_config_byte(dev, SIS5595_ENABLE_REG,
-					   enable | 0x80))
-		 || (0 !=
-		     pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
+		if ((pci_write_config_byte(dev, SIS5595_ENABLE_REG, enable | 0x80))
+		 || (pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
 		 || (!(enable & 0x80))) {
 			/* doesn't work for some chips! */
 			dev_err(&dev->dev, "Failed to enable HWM device\n");
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index cffea688878f..b8466e2e1435 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -863,12 +863,10 @@ static int via686a_pci_probe(struct pci_dev *dev,
 	if (force_addr) {
 		address = force_addr & ~(VIA686A_EXTENT - 1);
 		dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
-		if (0 !=
-		    pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
+		if (pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
 			return -ENODEV;
 	}
-	if (0 !=
-	    pci_read_config_word(dev, VIA686A_BASE_REG, &val))
+	if (pci_read_config_word(dev, VIA686A_BASE_REG, &val))
 		return -ENODEV;
 
 	address = val & ~(VIA686A_EXTENT - 1);
@@ -878,8 +876,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (0 !=
-	    pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
+	if (pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
 		return -ENODEV;
 	if (!(val & 0x0001)) {
 		if (!force_addr) {
@@ -890,9 +887,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
 		}
 
 		dev_warn(&dev->dev, "Enabling sensors\n");
-		if (0 !=
-		    pci_write_config_word(dev, VIA686A_ENABLE_REG,
-					  val | 0x0001))
+		if (pci_write_config_word(dev, VIA686A_ENABLE_REG, val | 0x0001))
 			return -ENODEV;
 	}
 
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index cc1d24c2a2c8..ee6cd6b85f91 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -987,13 +987,11 @@ static int vt8231_pci_probe(struct pci_dev *dev,
 		dev_warn(&dev->dev, "Forcing ISA address 0x%x\n",
 			 address);
 
-		if (0 !=
-		    pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
+		if (pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
 			return -ENODEV;
 	}
 
-	if (0 != pci_read_config_word(dev, VT8231_BASE_REG,
-							&val))
+	if (pci_read_config_word(dev, VT8231_BASE_REG, &val))
 		return -ENODEV;
 
 	address = val & ~(VT8231_EXTENT - 1);
@@ -1002,15 +1000,12 @@ static int vt8231_pci_probe(struct pci_dev *dev,
 		return -ENODEV;
 	}
 
-	if (0 != pci_read_config_word(dev, VT8231_ENABLE_REG,
-							&val))
+	if (pci_read_config_word(dev, VT8231_ENABLE_REG, &val))
 		return -ENODEV;
 
 	if (!(val & 0x0001)) {
 		dev_warn(&dev->dev, "enabling sensors\n");
-		if (0 !=
-			pci_write_config_word(dev, VT8231_ENABLE_REG,
-							val | 0x0001))
+		if (pci_write_config_word(dev, VT8231_ENABLE_REG, val | 0x0001))
 			return -ENODEV;
 	}
 
-- 
2.18.2

[RFC PATCH 18/35] bcma: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/bcma/driver_pci_host.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c
index 88a93c266c19..b64ba68bdc8a 100644
--- a/drivers/bcma/driver_pci_host.c
+++ b/drivers/bcma/driver_pci_host.c
@@ -244,7 +244,7 @@ static int bcma_core_pci_hostmode_read_config(struct pci_bus *bus,
 				     PCI_FUNC(devfn), reg, val, size);
 	spin_unlock_irqrestore(&pc_host->cfgspace_lock, flags);
 
-	return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int bcma_core_pci_hostmode_write_config(struct pci_bus *bus,
@@ -264,7 +264,7 @@ static int bcma_core_pci_hostmode_write_config(struct pci_bus *bus,
 				      PCI_FUNC(devfn), reg, &val, size);
 	spin_unlock_irqrestore(&pc_host->cfgspace_lock, flags);
 
-	return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 /* return cap_offset if requested capability exists in the PCI config space */
-- 
2.18.2

[RFC PATCH 19/35] atm: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 drivers/atm/iphase.c | 4 ++--
 drivers/atm/lanai.c  | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 8c7a996d1f16..b01cc491540d 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2296,12 +2296,12 @@ static int reset_sar(struct atm_dev *dev)
 	iadev = INPH_IA_DEV(dev);  
 	for(i=0; i<64; i++)  
 	  if ((error = pci_read_config_dword(iadev->pci,  
-				i*4, &pci[i])) != PCIBIOS_SUCCESSFUL)  
+				i*4, &pci[i])) != 0)
   	      return error;  
 	writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
 	for(i=0; i<64; i++)  
 	  if ((error = pci_write_config_dword(iadev->pci,  
-					i*4, pci[i])) != PCIBIOS_SUCCESSFUL)  
+					i*4, pci[i])) != 0)
 	    return error;  
 	udelay(5);  
 	return 0;  
diff --git a/drivers/atm/lanai.c b/drivers/atm/lanai.c
index 645a6bc1df88..2b82ae30dd74 100644
--- a/drivers/atm/lanai.c
+++ b/drivers/atm/lanai.c
@@ -1098,7 +1098,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
 	u16 s;
 	int result;
 	result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
-	if (result != PCIBIOS_SUCCESSFUL) {
+	if (result != 0) {
 		printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
 		    "%d\n", lanai->number, result);
 		return;
@@ -1109,7 +1109,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
 	if (s == 0)
 		return;
 	result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
-	if (result != PCIBIOS_SUCCESSFUL)
+	if (result != 0)
 		printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
 		    "%d\n", lanai->number, result);
 	if (clearonly)
@@ -1949,7 +1949,7 @@ static int lanai_pci_start(struct lanai_dev *lanai)
 		return result;
 	/* Set latency timer to zero as per lanai docs */
 	result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
-	if (result != PCIBIOS_SUCCESSFUL) {
+	if (result != 0) {
 		printk(KERN_ERR DEV_LABEL "(itf %d): can't write "
 		    "PCI_LATENCY_TIMER: %d\n", lanai->number, result);
 		return -EINVAL;
-- 
2.18.2

[RFC PATCH 20/35] atm: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 19/35

 drivers/atm/iphase.c | 10 ++++------
 drivers/atm/lanai.c  |  6 +++---
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index b01cc491540d..2c75b82b4e7f 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2295,14 +2295,12 @@ static int reset_sar(struct atm_dev *dev)
 	  
 	iadev = INPH_IA_DEV(dev);  
 	for(i=0; i<64; i++)  
-	  if ((error = pci_read_config_dword(iadev->pci,  
-				i*4, &pci[i])) != 0)
-  	      return error;  
+		if ((error = pci_read_config_dword(iadev->pci, i*4, &pci[i])))
+			return error;
 	writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
 	for(i=0; i<64; i++)  
-	  if ((error = pci_write_config_dword(iadev->pci,  
-					i*4, pci[i])) != 0)
-	    return error;  
+		if ((error = pci_write_config_dword(iadev->pci, i*4, pci[i])))
+			return error;
 	udelay(5);  
 	return 0;  
 }  
diff --git a/drivers/atm/lanai.c b/drivers/atm/lanai.c
index 2b82ae30dd74..5852b8cc0cc4 100644
--- a/drivers/atm/lanai.c
+++ b/drivers/atm/lanai.c
@@ -1098,7 +1098,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
 	u16 s;
 	int result;
 	result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
-	if (result != 0) {
+	if (result) {
 		printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
 		    "%d\n", lanai->number, result);
 		return;
@@ -1109,7 +1109,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
 	if (s == 0)
 		return;
 	result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
-	if (result != 0)
+	if (result)
 		printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
 		    "%d\n", lanai->number, result);
 	if (clearonly)
@@ -1945,7 +1945,7 @@ static int lanai_pci_start(struct lanai_dev *lanai)
 		return -EBUSY;
 	}
 	result = check_board_id_and_rev("PCI", pci->subsystem_device, NULL);
-	if (result != 0)
+	if (result)
 		return result;
 	/* Set latency timer to zero as per lanai docs */
 	result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
-- 
2.18.2

[RFC PATCH 21/35] atm: Fix Style ERROR- assignment in if condition

[Saheed O. Bolarinwa]

Move assignment out of the if condition
Fix style issues in the for-loop

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 20/35

 drivers/atm/iphase.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 2c75b82b4e7f..584d9be5fa73 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2294,13 +2294,19 @@ static int reset_sar(struct atm_dev *dev)
 	unsigned int pci[64];  
 	  
 	iadev = INPH_IA_DEV(dev);  
-	for(i=0; i<64; i++)  
-		if ((error = pci_read_config_dword(iadev->pci, i*4, &pci[i])))
+	for (i = 0; i < 64; i++) {
+		error = pci_read_config_dword(iadev->pci, i*4, &pci[i]);
+		if (error)
 			return error;
+	}
+
 	writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
-	for(i=0; i<64; i++)  
-		if ((error = pci_write_config_dword(iadev->pci, i*4, pci[i])))
+	for (i = 0; i < 64; i++) {
+		error = pci_write_config_dword(iadev->pci, i*4, pci[i]);
+		if (error)
 			return error;
+	}
+
 	udelay(5);  
 	return 0;  
 }  
-- 
2.18.2

[RFC PATCH 22/35] unicore32: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/unicore32/kernel/pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 0d098aa05b47..401ab356c814 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -37,7 +37,7 @@ puv3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		*value = readl(PCICFG_DATA);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -58,7 +58,7 @@ puv3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		writel(value, PCICFG_DATA);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops pci_puv3_ops = {
-- 
2.18.2

[RFC PATCH 23/35] sparc/PCI: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/sparc/kernel/pci_common.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index 4759ccd542fe..39175f26f401 100644
--- a/arch/sparc/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
@@ -59,7 +59,7 @@ static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm,
 
 	addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	switch (size) {
 	case 1:
@@ -102,7 +102,7 @@ static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm,
 		*value |= tmp32 << 16;
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -132,7 +132,7 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 
 	addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	switch (size) {
 	case 1:
@@ -144,7 +144,7 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 		if (where & 0x01) {
 			printk("pci_read_config_word: misaligned reg [%x]\n",
 			       where);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		pci_config_read16((u16 *)addr, &tmp16);
 		*value = (u32) tmp16;
@@ -154,12 +154,12 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 		if (where & 0x03) {
 			printk("pci_read_config_dword: misaligned reg [%x]\n",
 			       where);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		pci_config_read32(addr, value);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm,
@@ -170,7 +170,7 @@ static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm,
 
 	addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	switch (size) {
 	case 1:
@@ -206,7 +206,7 @@ static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm,
 					 where + 2, 2, value >> 16);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -222,7 +222,7 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 
 	addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
 	if (!addr)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	switch (size) {
 	case 1:
@@ -233,7 +233,7 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 		if (where & 0x01) {
 			printk("pci_write_config_word: misaligned reg [%x]\n",
 			       where);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		pci_config_write16((u16 *)addr, value);
 		break;
@@ -242,11 +242,11 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 		if (where & 0x03) {
 			printk("pci_write_config_dword: misaligned reg [%x]\n",
 			       where);
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		}
 		pci_config_write32(addr, value);
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops sun4u_pci_ops = {
@@ -284,7 +284,7 @@ static int sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 	}
 
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -307,7 +307,7 @@ static int sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
 				     HV_PCI_DEVICE_BUILD(bus, device, func),
 				     where, size, value);
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops sun4v_pci_ops = {
-- 
2.18.2

[RFC PATCH 24/35] sh: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/sh/drivers/pci/common.c        | 2 +-
 arch/sh/drivers/pci/ops-dreamcast.c | 4 ++--
 arch/sh/drivers/pci/ops-sh4.c       | 4 ++--
 arch/sh/drivers/pci/ops-sh7786.c    | 8 ++++----
 arch/sh/drivers/pci/pci.c           | 2 +-
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
index fe163ecd0719..ee27cdfd3e68 100644
--- a/arch/sh/drivers/pci/common.c
+++ b/arch/sh/drivers/pci/common.c
@@ -61,7 +61,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
 			continue;
 		if (early_read_config_word(hose, top_bus, current_bus,
 					   pci_devfn, PCI_VENDOR_ID, &vid) !=
-		    PCIBIOS_SUCCESSFUL)
+		    0)
 			continue;
 		if (vid == 0xffff)
 			continue;
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
index 517a8a9702f6..431cd006951f 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -56,7 +56,7 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
 	case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
 	}
 
-        return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
@@ -70,7 +70,7 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
 	case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
 	}
 
-        return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops gapspci_pci_ops = {
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index a205be3bfc4a..4d757e5f38c6 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -49,7 +49,7 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /*
@@ -90,7 +90,7 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
 
 	pci_write_reg(chan, data, SH4_PCIPDR);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops sh4_pci_ops = {
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
index a10f9f4ebd7f..7c329e467360 100644
--- a/arch/sh/drivers/pci/ops-sh7786.c
+++ b/arch/sh/drivers/pci/ops-sh7786.c
@@ -52,7 +52,7 @@ static int sh7786_pcie_config_access(unsigned char access_type,
 			else
 				pci_write_reg(chan, *data, PCI_REG(reg));
 
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 		} else if (dev > 1)
 			return PCIBIOS_DEVICE_NOT_FOUND;
 	}
@@ -83,7 +83,7 @@ static int sh7786_pcie_config_access(unsigned char access_type,
 	/* Disable the configuration access */
 	pci_write_reg(chan, 0, SH4A_PCIEPCTLR);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
@@ -101,7 +101,7 @@ static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
 	raw_spin_lock_irqsave(&pci_config_lock, flags);
 	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
 					devfn, where, &data);
-	if (ret != PCIBIOS_SUCCESSFUL) {
+	if (ret != 0) {
 		*val = 0xffffffff;
 		goto out;
 	}
@@ -137,7 +137,7 @@ static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn,
 	raw_spin_lock_irqsave(&pci_config_lock, flags);
 	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
 					devfn, where, &data);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		goto out;
 
 	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index c7784e156964..77130f035fdd 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -204,7 +204,7 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
 			continue;
 		ret = early_read_config_word(hose, top_bus, current_bus,
 					     pci_devfn, PCI_STATUS, &status);
-		if (ret != PCIBIOS_SUCCESSFUL)
+		if (ret != 0)
 			continue;
 		if (status == 0xffff)
 			continue;
-- 
2.18.2

[RFC PATCH 25/35] sh: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 24/35

 arch/sh/drivers/pci/common.c     | 3 +--
 arch/sh/drivers/pci/ops-sh7786.c | 4 ++--
 arch/sh/drivers/pci/pci.c        | 2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
index ee27cdfd3e68..676907e6a514 100644
--- a/arch/sh/drivers/pci/common.c
+++ b/arch/sh/drivers/pci/common.c
@@ -60,8 +60,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
 		if (PCI_FUNC(pci_devfn))
 			continue;
 		if (early_read_config_word(hose, top_bus, current_bus,
-					   pci_devfn, PCI_VENDOR_ID, &vid) !=
-		    0)
+					   pci_devfn, PCI_VENDOR_ID, &vid))
 			continue;
 		if (vid == 0xffff)
 			continue;
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
index 7c329e467360..c1be0ac2508a 100644
--- a/arch/sh/drivers/pci/ops-sh7786.c
+++ b/arch/sh/drivers/pci/ops-sh7786.c
@@ -101,7 +101,7 @@ static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
 	raw_spin_lock_irqsave(&pci_config_lock, flags);
 	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
 					devfn, where, &data);
-	if (ret != 0) {
+	if (ret) {
 		*val = 0xffffffff;
 		goto out;
 	}
@@ -137,7 +137,7 @@ static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn,
 	raw_spin_lock_irqsave(&pci_config_lock, flags);
 	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
 					devfn, where, &data);
-	if (ret != 0)
+	if (ret)
 		goto out;
 
 	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 77130f035fdd..19e9a211c23e 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -204,7 +204,7 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
 			continue;
 		ret = early_read_config_word(hose, top_bus, current_bus,
 					     pci_devfn, PCI_STATUS, &status);
-		if (ret != 0)
+		if (ret)
 			continue;
 		if (status == 0xffff)
 			continue;
-- 
2.18.2

[RFC PATCH 26/35] powerpc: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/powerpc/kernel/rtas_pci.c                 |  4 ++--
 arch/powerpc/platforms/4xx/pci.c               |  4 ++--
 arch/powerpc/platforms/52xx/efika.c            |  4 ++--
 arch/powerpc/platforms/52xx/mpc52xx_pci.c      |  4 ++--
 arch/powerpc/platforms/82xx/pq2.c              |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_cds.c      |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c       |  2 +-
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c     |  2 +-
 arch/powerpc/platforms/chrp/pci.c              |  8 ++++----
 arch/powerpc/platforms/embedded6xx/holly.c     |  2 +-
 .../platforms/embedded6xx/mpc7448_hpc2.c       |  2 +-
 arch/powerpc/platforms/fsl_uli1575.c           |  2 +-
 arch/powerpc/platforms/maple/pci.c             | 18 +++++++++---------
 arch/powerpc/platforms/pasemi/pci.c            |  6 +++---
 arch/powerpc/platforms/powermac/pci.c          |  8 ++++----
 arch/powerpc/platforms/powernv/eeh-powernv.c   |  4 ++--
 arch/powerpc/platforms/powernv/pci.c           |  4 ++--
 arch/powerpc/platforms/pseries/eeh_pseries.c   |  4 ++--
 arch/powerpc/sysdev/fsl_pci.c                  |  2 +-
 arch/powerpc/sysdev/indirect_pci.c             |  4 ++--
 arch/powerpc/sysdev/tsi108_pci.c               |  4 ++--
 21 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 781c1869902e..18108ed9284c 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -71,7 +71,7 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
 	if (ret)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rtas_pci_read_config(struct pci_bus *bus,
@@ -121,7 +121,7 @@ int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
 	if (ret)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rtas_pci_write_config(struct pci_bus *bus,
diff --git a/arch/powerpc/platforms/4xx/pci.c b/arch/powerpc/platforms/4xx/pci.c
index c13d64c3b019..3e6799d987d2 100644
--- a/arch/powerpc/platforms/4xx/pci.c
+++ b/arch/powerpc/platforms/4xx/pci.c
@@ -1652,7 +1652,7 @@ static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
 
 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -1696,7 +1696,7 @@ static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
 
 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops ppc4xx_pciex_pci_ops =
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 4514a6f7458a..ef2584eb2dad 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -44,7 +44,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 	rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
 	*val = ret;
-	return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -58,7 +58,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
 
 	rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
 			 addr, len, val);
-	return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static struct pci_ops rtas_pci_ops = {
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index af0f79995214..b9c2d0a7077e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -157,7 +157,7 @@ mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 	out_be32(hose->cfg_addr, 0);
 	mb();
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -221,7 +221,7 @@ mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 	out_be32(hose->cfg_addr, 0);
 	mb();
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops mpc52xx_pci_ops = {
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index 3b5cb39a564c..c15b3b0ed118 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -40,7 +40,7 @@ static int pq2_pci_exclude_device(struct pci_controller *hose,
 	if (bus == 0 && PCI_SLOT(devfn) == 0)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	else
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 }
 
 static void __init pq2_pci_add_bridge(struct device_node *np)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 172d2b7cfeb7..66f00eb2a8be 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -76,7 +76,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 	if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	else
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 }
 
 static int mpc85xx_cds_restart(struct notifier_block *this,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 2157a8017aa4..f33ac8e04da6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -118,7 +118,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 	if (hose->dn == pci_with_uli)
 		return uli_exclude_device(hose, bus, devfn);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 #endif	/* CONFIG_PCI */
 
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index b697918b727d..36b38b28d40b 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -49,7 +49,7 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
 	if (hose->dn == fsl_pci_primary)
 		return uli_exclude_device(hose, bus, devfn);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 #endif /* CONFIG_PCI */
 
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index b2c2bf35b76c..c8f8356607c7 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -55,7 +55,7 @@ static int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
 		*val = in_le32(cfg_data);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
@@ -82,7 +82,7 @@ static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
 		out_le32(cfg_data, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops gg2_pci_ops =
@@ -106,7 +106,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
 
 	rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
 	*val = ret;
-	return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+	return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
@@ -120,7 +120,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset
 
 	rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
 			 addr, len, val);
-	return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+	return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static struct pci_ops rtas_pci_ops =
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index d8f2e2c737bb..f9fca540c52a 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -47,7 +47,7 @@ static int holly_exclude_device(struct pci_controller *hose, u_char bus,
 	if (bus == 0 && PCI_SLOT(devfn) == 0)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	else
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 }
 
 static void holly_remap_bridge(void)
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 15437abe1f6d..34f6a0ecdf67 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -55,7 +55,7 @@ int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
 	if (bus == 0 && PCI_SLOT(devfn) == 0)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	else
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 }
 
 static void __init mpc7448_hpc2_setup_arch(void)
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 044a20c1fbde..17c2cb5a8682 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -353,5 +353,5 @@ int uli_exclude_device(struct pci_controller *hose,
 			return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index c86a66d5e998..4e49f465056d 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -142,7 +142,7 @@ static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn,
 		*val = in_le32(addr);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -173,7 +173,7 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
 		out_le32(addr, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops u3_agp_pci_ops =
@@ -223,7 +223,7 @@ static int u3_ht_root_read_config(struct pci_controller *hose, u8 offset,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
@@ -234,7 +234,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
 	addr = hose->cfg_addr + ((offset & ~3) << 2) + (4 - len - (offset & 3));
 
 	if (offset >= PCI_BASE_ADDRESS_0 && offset < PCI_CAPABILITY_LIST)
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	switch (len) {
 	case 1:
@@ -248,7 +248,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -286,7 +286,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
 		*val = in_le32(addr);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -323,7 +323,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
 		out_le32(addr, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops u3_ht_pci_ops =
@@ -397,7 +397,7 @@ static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
                 *val = in_le32(addr);
                 break;
         }
-        return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
                                 int offset, int len, u32 val)
@@ -428,7 +428,7 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
                 out_le32(addr, val);
                 break;
         }
-        return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops u4_pcie_pci_ops =
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index 8779b107d872..e558a402532a 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -166,7 +166,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
 	if (workaround_5945(bus, devfn, offset, len, val))
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
 
@@ -188,7 +188,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -223,7 +223,7 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
 		out_le32(addr, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops pa_pxp_ops = {
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index e35eaa9cf938..bdc9a89b5181 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -307,7 +307,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
 		default:
 			*val = 0xfffffffful; break;
 		}
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	default:
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
@@ -327,7 +327,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
 		*val = swap ? in_le32(addr) : in_be32(addr);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -350,7 +350,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
 	case 0:
 		break;
 	case 1:
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	default:
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
@@ -370,7 +370,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
 		swap ? out_le32(addr, val) : out_be32(addr, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops u3_ht_pci_ops =
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 79409e005fcd..92f145dc9c1d 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
 
 	if (!edev || !edev->pcie_cap)
 		return 0;
-	if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+	if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
 		return 0;
 	else if (!header)
 		return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
 		if (pos < 256)
 			break;
 
-		if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+		if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
 			break;
 	}
 
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 091fe1cf386b..b3d5cc3e262a 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -685,7 +685,7 @@ int pnv_pci_cfg_read(struct pci_dn *pdn,
 
 	pr_devel("%s: bus: %x devfn: %x +%x/%x -> %08x\n",
 		 __func__, pdn->busno, pdn->devfn, where, size, *val);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int pnv_pci_cfg_write(struct pci_dn *pdn,
@@ -710,7 +710,7 @@ int pnv_pci_cfg_write(struct pci_dn *pdn,
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 #if CONFIG_EEH
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index ace117f99d94..9c023b928f2c 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
 
 	if (!edev || !edev->pcie_cap)
 		return 0;
-	if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+	if (rtas_read_config(pdn, pos, 4, &header) != 0)
 		return 0;
 	else if (!header)
 		return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
 		if (pos < 256)
 			break;
 
-		if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+		if (rtas_read_config(pdn, pos, 4, &header) != 0)
 			break;
 	}
 
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 040b9d01c079..f1118c4443f4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -697,7 +697,7 @@ static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
 			return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index 09b36617425e..35b21276609b 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -70,7 +70,7 @@ int __indirect_read_config(struct pci_controller *hose,
 		*val = in_le32(cfg_data);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -148,7 +148,7 @@ int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
 		out_le32(cfg_data, val);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops indirect_pci_ops =
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 49f9541954f8..586dabb4e7ea 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -78,7 +78,7 @@ tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 void tsi108_clear_pci_error(u32 pci_cfg_base)
@@ -167,7 +167,7 @@ tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
 		printk("data = 0x%x\n", *val);
 	}
 #endif
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 void tsi108_clear_pci_cfg_error(void)
-- 
2.18.2

[RFC PATCH 27/35] powerpc: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 26/35

 arch/powerpc/platforms/powernv/eeh-powernv.c | 4 ++--
 arch/powerpc/platforms/pseries/eeh_pseries.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 92f145dc9c1d..834cb6175cc4 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
 
 	if (!edev || !edev->pcie_cap)
 		return 0;
-	if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+	if (pnv_pci_cfg_read(pdn, pos, 4, &header))
 		return 0;
 	else if (!header)
 		return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
 		if (pos < 256)
 			break;
 
-		if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+		if (pnv_pci_cfg_read(pdn, pos, 4, &header))
 			break;
 	}
 
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 9c023b928f2c..aec6f76879a9 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
 
 	if (!edev || !edev->pcie_cap)
 		return 0;
-	if (rtas_read_config(pdn, pos, 4, &header) != 0)
+	if (rtas_read_config(pdn, pos, 4, &header))
 		return 0;
 	else if (!header)
 		return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
 		if (pos < 256)
 			break;
 
-		if (rtas_read_config(pdn, pos, 4, &header) != 0)
+		if (rtas_read_config(pdn, pos, 4, &header))
 			break;
 	}
 
-- 
2.18.2

[RFC PATCH 28/35] mips: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/mips/pci/fixup-ath79.c      |  2 +-
 arch/mips/pci/ops-bcm63xx.c      | 14 +++++++-------
 arch/mips/pci/ops-bonito64.c     |  4 ++--
 arch/mips/pci/ops-gt64xxx_pci0.c |  4 ++--
 arch/mips/pci/ops-lantiq.c       |  4 ++--
 arch/mips/pci/ops-loongson2.c    |  4 ++--
 arch/mips/pci/ops-mace.c         |  4 ++--
 arch/mips/pci/ops-msc.c          |  4 ++--
 arch/mips/pci/ops-rc32434.c      |  6 +++---
 arch/mips/pci/ops-sni.c          |  4 ++--
 arch/mips/pci/ops-tx3927.c       |  2 +-
 arch/mips/pci/ops-tx4927.c       |  2 +-
 arch/mips/pci/ops-vr41xx.c       |  4 ++--
 arch/mips/pci/pci-alchemy.c      |  6 +++---
 arch/mips/pci/pci-ar2315.c       |  4 ++--
 arch/mips/pci/pci-ar71xx.c       |  4 ++--
 arch/mips/pci/pci-ar724x.c       |  6 +++---
 arch/mips/pci/pci-bcm1480.c      |  4 ++--
 arch/mips/pci/pci-bcm1480ht.c    |  4 ++--
 arch/mips/pci/pci-mt7620.c       |  4 ++--
 arch/mips/pci/pci-octeon.c       | 12 ++++++------
 arch/mips/pci/pci-rt2880.c       |  4 ++--
 arch/mips/pci/pci-rt3883.c       |  4 ++--
 arch/mips/pci/pci-sb1250.c       |  4 ++--
 arch/mips/pci/pci-virtio-guest.c |  4 ++--
 arch/mips/pci/pci-xlp.c          |  4 ++--
 arch/mips/pci/pci-xlr.c          |  4 ++--
 arch/mips/pci/pci-xtalk-bridge.c | 14 +++++++-------
 arch/mips/pci/pcie-octeon.c      |  4 ++--
 arch/mips/txx9/generic/pci.c     |  4 ++--
 30 files changed, 74 insertions(+), 74 deletions(-)

diff --git a/arch/mips/pci/fixup-ath79.c b/arch/mips/pci/fixup-ath79.c
index 09a4ce53424f..6a6c4f58f7f4 100644
--- a/arch/mips/pci/fixup-ath79.c
+++ b/arch/mips/pci/fixup-ath79.c
@@ -9,7 +9,7 @@
 
 int pcibios_plat_dev_init(struct pci_dev *dev)
 {
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index dc6dc2741272..3e88e4869f37 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -115,7 +115,7 @@ static int bcm63xx_do_cfg_read(int type, unsigned int busn,
 
 	*val = postprocess_read(data, where, size);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm63xx_do_cfg_write(int type, unsigned int busn,
@@ -141,7 +141,7 @@ static int bcm63xx_do_cfg_write(int type, unsigned int busn,
 	/* restore IO space normal behaviour */
 	bcm_mpi_writel(0, MPI_L2PCFG_REG);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
@@ -282,7 +282,7 @@ static int fake_cb_bridge_read(int where, int size, u32 *val)
 	}
 
 	*val = postprocess_read(data, where, size);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 /*
@@ -295,7 +295,7 @@ static int fake_cb_bridge_write(int where, int size, u32 val)
 	int ret;
 
 	ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
-	if (ret != PCIBIOS_SUCCESSFUL)
+	if (ret != 0)
 		return ret;
 
 	data = preprocess_write(data, val, where, size);
@@ -356,7 +356,7 @@ static int fake_cb_bridge_write(int where, int size, u32 val)
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,
@@ -496,7 +496,7 @@ static int bcm63xx_pcie_read(struct pci_bus *bus, unsigned int devfn,
 
 	*val = postprocess_read(data, where, size);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 
 }
 
@@ -518,7 +518,7 @@ static int bcm63xx_pcie_write(struct pci_bus *bus, unsigned int devfn,
 	data = preprocess_write(data, val, where, size);
 	bcm_pcie_writel(data, reg);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
diff --git a/arch/mips/pci/ops-bonito64.c b/arch/mips/pci/ops-bonito64.c
index 4d5fe614f55e..0d0a5d52dee6 100644
--- a/arch/mips/pci/ops-bonito64.c
+++ b/arch/mips/pci/ops-bonito64.c
@@ -107,7 +107,7 @@ static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -139,7 +139,7 @@ static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 				       &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops bonito64_pci_ops = {
diff --git a/arch/mips/pci/ops-gt64xxx_pci0.c b/arch/mips/pci/ops-gt64xxx_pci0.c
index 501dcdf5a18c..d50a0ac0848d 100644
--- a/arch/mips/pci/ops-gt64xxx_pci0.c
+++ b/arch/mips/pci/ops-gt64xxx_pci0.c
@@ -104,7 +104,7 @@ static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -131,7 +131,7 @@ static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 					       where, &data))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops gt64xxx_pci0_ops = {
diff --git a/arch/mips/pci/ops-lantiq.c b/arch/mips/pci/ops-lantiq.c
index 7d71355394a6..9e9fd1c01199 100644
--- a/arch/mips/pci/ops-lantiq.c
+++ b/arch/mips/pci/ops-lantiq.c
@@ -83,7 +83,7 @@ int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
@@ -109,5 +109,5 @@ int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
 	if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 0d1b36ba1c21..79d7ad3aa19f 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -136,7 +136,7 @@ static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -168,7 +168,7 @@ static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 				       &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops loongson_pci_ops = {
diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c
index 951d8070fb48..1593514d71f8 100644
--- a/arch/mips/pci/ops-mace.c
+++ b/arch/mips/pci/ops-mace.c
@@ -69,7 +69,7 @@ mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 
 	DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -91,7 +91,7 @@ mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 
 	DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops mace_pci_ops = {
diff --git a/arch/mips/pci/ops-msc.c b/arch/mips/pci/ops-msc.c
index 1f438baaf907..722a7992d7b5 100644
--- a/arch/mips/pci/ops-msc.c
+++ b/arch/mips/pci/ops-msc.c
@@ -93,7 +93,7 @@ static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -125,7 +125,7 @@ static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 				       &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops msc_pci_ops = {
diff --git a/arch/mips/pci/ops-rc32434.c b/arch/mips/pci/ops-rc32434.c
index 874ed6df9768..52714e58572d 100644
--- a/arch/mips/pci/ops-rc32434.c
+++ b/arch/mips/pci/ops-rc32434.c
@@ -140,7 +140,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
 	if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
@@ -160,7 +160,7 @@ write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
 		return -1;
 
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
@@ -171,7 +171,7 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
 	if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_config_read(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index 35daa7fe6571..27468a603470 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -34,7 +34,7 @@ static int set_config_address(unsigned int busno, unsigned int devfn, int reg)
 		 ((devfn    & 0xff) <<	8) |
 		  (reg	    & 0xfc);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg,
@@ -94,7 +94,7 @@ static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int r
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
 	outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg,
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index d35dc9c9ab9d..7fe187879897 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -70,7 +70,7 @@ static inline int check_abort(void)
 		iob();
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index f7802f100401..1b3cea631448 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -74,7 +74,7 @@ static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where,
 
 static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
 {
-	int code = PCIBIOS_SUCCESSFUL;
+	int code = 0;
 
 	/* wait write cycle completion before checking error status */
 	while (__raw_readl(&pcicptr->pcicstatus) & TX4927_PCIC_PCICSTATUS_IWB)
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c
index 7b7709aa14c7..f54cb555c743 100644
--- a/arch/mips/pci/ops-vr41xx.c
+++ b/arch/mips/pci/ops-vr41xx.c
@@ -70,7 +70,7 @@ static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
@@ -104,7 +104,7 @@ static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
 
 	writel(data, PCICONFDREG);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops vr41xx_pci_ops = {
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 7285b5667568..937f912fba20 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -103,7 +103,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
 	unsigned int device = PCI_SLOT(dev_fn);
 	unsigned int function = PCI_FUNC(dev_fn);
 	unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r;
-	int error = PCIBIOS_SUCCESSFUL;
+	int error = 0;
 
 	if (device > 19) {
 		*data = 0xffffffff;
@@ -231,7 +231,7 @@ static int write_config_byte(struct pci_bus *bus, unsigned int devfn,
 	if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int write_config_word(struct pci_bus *bus, unsigned int devfn,
@@ -248,7 +248,7 @@ static int write_config_word(struct pci_bus *bus, unsigned int devfn,
 	if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
 		return -1;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int write_config_dword(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c
index 490953f51528..2268b63d20e8 100644
--- a/arch/mips/pci/pci-ar2315.c
+++ b/arch/mips/pci/pci-ar2315.c
@@ -260,7 +260,7 @@ static int ar2315_pci_cfg_access(struct ar2315_pci_ctrl *apc, unsigned devfn,
 			    0);
 
 	return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND :
-					    PCIBIOS_SUCCESSFUL;
+					    0;
 }
 
 static inline int ar2315_pci_local_cfg_rd(struct ar2315_pci_ctrl *apc,
@@ -311,7 +311,7 @@ static int ar2315_pci_host_setup(struct ar2315_pci_ctrl *apc)
 	u32 id;
 
 	res = ar2315_pci_local_cfg_rd(apc, devfn, PCI_VENDOR_ID, &id);
-	if (res != PCIBIOS_SUCCESSFUL || id != AR2315_PCI_HOST_DEVID)
+	if (res != 0 || id != AR2315_PCI_HOST_DEVID)
 		return -ENODEV;
 
 	/* Program MBARs */
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index a9f8e7c881bd..4216162858b1 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -182,7 +182,7 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 	int err;
 	int ret;
 
-	ret = PCIBIOS_SUCCESSFUL;
+	ret = 0;
 	data = ~0;
 
 	err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
@@ -206,7 +206,7 @@ static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 	int ret;
 
 	value = value << (8 * (where & 3));
-	ret = PCIBIOS_SUCCESSFUL;
+	ret = 0;
 
 	err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
 				     AR71XX_PCI_CFG_CMD_WRITE);
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 869d5c9a2f8d..09c607b82cfc 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -107,7 +107,7 @@ static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
 	/* flush write */
 	__raw_readl(base + (where & ~3));
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
@@ -154,7 +154,7 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 		*value = data;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
@@ -218,7 +218,7 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 	/* flush write */
 	__raw_readl(base + (where & ~3));
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops ar724x_pci_ops = {
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index db0d4d22d46f..614f82cb42d2 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -126,7 +126,7 @@ static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -156,7 +156,7 @@ static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 
 	WRITECFG32(cfgaddr, data);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops bcm1480_pci_ops = {
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index 3d996acd294c..249b54c499b4 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -115,7 +115,7 @@ static int bcm1480ht_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm1480ht_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -145,7 +145,7 @@ static int bcm1480ht_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 
 	WRITECFG32(cfgaddr, data);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int bcm1480ht_pcibios_get_busno(void)
diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c
index d36061603752..669347689d84 100644
--- a/arch/mips/pci/pci-mt7620.c
+++ b/arch/mips/pci/pci-mt7620.c
@@ -162,7 +162,7 @@ static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
@@ -198,7 +198,7 @@ static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
 
 	bridge_w32(data, RALINK_PCI_CONFIG_DATA_VIRT_REG);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops mt7620_pci_ops = {
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index fc29b85cfa92..be6d0bf3aca4 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -273,13 +273,13 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
 	switch (size) {
 	case 4:
 		*val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	case 2:
 		*val = le16_to_cpu(cvmx_read64_uint16(pci_addr.u64));
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	case 1:
 		*val = cvmx_read64_uint8(pci_addr.u64);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	return PCIBIOS_FUNC_NOT_SUPPORTED;
 }
@@ -307,13 +307,13 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
 	switch (size) {
 	case 4:
 		cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	case 2:
 		cvmx_write64_uint16(pci_addr.u64, cpu_to_le16(val));
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	case 1:
 		cvmx_write64_uint8(pci_addr.u64, val);
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 	}
 	return PCIBIOS_FUNC_NOT_SUPPORTED;
 }
diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
index e1f12e398136..4f4774c2c777 100644
--- a/arch/mips/pci/pci-rt2880.c
+++ b/arch/mips/pci/pci-rt2880.c
@@ -87,7 +87,7 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
@@ -121,7 +121,7 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
 	rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
 	spin_unlock_irqrestore(&rt2880_pci_lock, flags);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops rt2880_pci_ops = {
diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c
index 0ac6346026d0..cb160ba7480f 100644
--- a/arch/mips/pci/pci-rt3883.c
+++ b/arch/mips/pci/pci-rt3883.c
@@ -256,7 +256,7 @@ static int rt3883_pci_config_read(struct pci_bus *bus, unsigned int devfn,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int rt3883_pci_config_write(struct pci_bus *bus, unsigned int devfn,
@@ -294,7 +294,7 @@ static int rt3883_pci_config_write(struct pci_bus *bus, unsigned int devfn,
 
 	rt3883_pci_w32(rpc, data, RT3883_PCI_REG_CFGDATA);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops rt3883_pci_ops = {
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index c3f82b280484..7f0fd484ef85 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -135,7 +135,7 @@ static int sb1250_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int sb1250_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -165,7 +165,7 @@ static int sb1250_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 
 	WRITECFG32(cfgaddr, data);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops sb1250_pci_ops = {
diff --git a/arch/mips/pci/pci-virtio-guest.c b/arch/mips/pci/pci-virtio-guest.c
index 40a078bc4617..fb67b009b2cb 100644
--- a/arch/mips/pci/pci-virtio-guest.c
+++ b/arch/mips/pci/pci-virtio-guest.c
@@ -70,7 +70,7 @@ static int pci_virtio_guest_write_config(struct pci_bus *bus,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_virtio_guest_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -89,7 +89,7 @@ static int pci_virtio_guest_read_config(struct pci_bus *bus, unsigned int devfn,
 		*val = inl(PCI_CONFIG_DATA);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops pci_virtio_guest_ops = {
diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c
index 9eff9137f78e..75ea7d85913c 100644
--- a/arch/mips/pci/pci-xlp.c
+++ b/arch/mips/pci/pci-xlp.c
@@ -118,7 +118,7 @@ static int nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
@@ -145,7 +145,7 @@ static int nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 
 	pci_cfg_write_32bit(bus, devfn, where, data);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops nlm_pci_ops = {
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 2a1c81a129ba..b6c72ac170d9 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -100,7 +100,7 @@ static int nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn,
 	else
 		*val = data;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
@@ -127,7 +127,7 @@ static int nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn,
 
 	pci_cfg_write_32bit(bus, devfn, where, data);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops nlm_pci_ops = {
diff --git a/arch/mips/pci/pci-xtalk-bridge.c b/arch/mips/pci/pci-xtalk-bridge.c
index 3b2552fb7735..101b18cd8817 100644
--- a/arch/mips/pci/pci-xtalk-bridge.c
+++ b/arch/mips/pci/pci-xtalk-bridge.c
@@ -67,7 +67,7 @@ static int ioc3_cfg_rd(void *addr, int where, int size, u32 *value, u32 sid)
 	mask = 0xffffffffU >> ((4 - size) << 3);
 	*value = (cf >> shift) & mask;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ioc3_cfg_wr(void *addr, int where, int size, u32 value)
@@ -75,7 +75,7 @@ static int ioc3_cfg_wr(void *addr, int where, int size, u32 value)
 	u32 cf, shift, mask, smask;
 
 	if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
-		return PCIBIOS_SUCCESSFUL;
+		return 0;
 
 	if (get_dbe(cf, (u32 *)addr))
 		return PCIBIOS_DEVICE_NOT_FOUND;
@@ -88,7 +88,7 @@ static int ioc3_cfg_wr(void *addr, int where, int size, u32 value)
 	if (put_dbe(cf, (u32 *)addr))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static void bridge_disable_swapping(struct pci_dev *dev)
@@ -149,7 +149,7 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
 	else
 		res = get_dbe(*value, (u32 *)addr);
 
-	return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return res ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -188,7 +188,7 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
 	else
 		res = get_dbe(*value, (u32 *)addr);
 
-	return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+	return res ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -236,7 +236,7 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
 	if (res)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -277,7 +277,7 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
 	if (res)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index d919a0d813a1..11e9ed38ca2b 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -1703,7 +1703,7 @@ static int octeon_pcie_read_config(unsigned int pcie_port, struct pci_bus *bus,
 	if (OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1) ||
 	    OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_1))
 		write_c0_cvmmemctl(cvmmemctl_save.u64);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int octeon_pcie0_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -1759,7 +1759,7 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
 	default:
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int octeon_pcie0_write_config(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index fb998726bd5d..bdff45b6b57d 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -62,7 +62,7 @@ int __init txx9_pci66_check(struct pci_controller *hose, int top_bus,
 			continue;
 		if (early_read_config_word(hose, top_bus, current_bus,
 					   pci_devfn, PCI_VENDOR_ID, &vid) !=
-		    PCIBIOS_SUCCESSFUL)
+		    0)
 			continue;
 		if (vid == 0xffff)
 			continue;
@@ -346,7 +346,7 @@ static void final_fixup(struct pci_dev *dev)
 	unsigned char bist;
 
 	/* Do build-in self test */
-	if (pci_read_config_byte(dev, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL &&
+	if (pci_read_config_byte(dev, PCI_BIST, &bist) == 0 &&
 	    (bist & PCI_BIST_CAPABLE)) {
 		unsigned long timeout;
 		pci_set_power_state(dev, PCI_D0);
-- 
2.18.2

[RFC PATCH 29/35] mips: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 28/35

 arch/mips/pci/ops-bcm63xx.c  | 2 +-
 arch/mips/pci/pci-ar2315.c   | 5 ++---
 arch/mips/txx9/generic/pci.c | 3 +--
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index 3e88e4869f37..f2810af4fa24 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -295,7 +295,7 @@ static int fake_cb_bridge_write(int where, int size, u32 val)
 	int ret;
 
 	ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
-	if (ret != 0)
+	if (ret)
 		return ret;
 
 	data = preprocess_write(data, val, where, size);
diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c
index 2268b63d20e8..c2b9e62fbc18 100644
--- a/arch/mips/pci/pci-ar2315.c
+++ b/arch/mips/pci/pci-ar2315.c
@@ -259,8 +259,7 @@ static int ar2315_pci_cfg_access(struct ar2315_pci_ctrl *apc, unsigned devfn,
 	ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL,
 			    0);
 
-	return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND :
-					    0;
+	return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static inline int ar2315_pci_local_cfg_rd(struct ar2315_pci_ctrl *apc,
@@ -311,7 +310,7 @@ static int ar2315_pci_host_setup(struct ar2315_pci_ctrl *apc)
 	u32 id;
 
 	res = ar2315_pci_local_cfg_rd(apc, devfn, PCI_VENDOR_ID, &id);
-	if (res != 0 || id != AR2315_PCI_HOST_DEVID)
+	if (res || id != AR2315_PCI_HOST_DEVID)
 		return -ENODEV;
 
 	/* Program MBARs */
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index bdff45b6b57d..9da38f8fa036 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -61,8 +61,7 @@ int __init txx9_pci66_check(struct pci_controller *hose, int top_bus,
 		if (PCI_FUNC(pci_devfn))
 			continue;
 		if (early_read_config_word(hose, top_bus, current_bus,
-					   pci_devfn, PCI_VENDOR_ID, &vid) !=
-		    0)
+					   pci_devfn, PCI_VENDOR_ID, &vid))
 			continue;
 		if (vid == 0xffff)
 			continue;
-- 
2.18.2

[RFC PATCH 30/35] microblaze: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/microblaze/pci/indirect_pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
index 1caf7d3e0eef..1f04a1f2c30b 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -65,7 +65,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
 		*val = in_le32(cfg_data);
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -132,7 +132,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops indirect_pci_ops = {
-- 
2.18.2

[RFC PATCH 31/35] m68k: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/m68k/coldfire/pci.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/m68k/coldfire/pci.c b/arch/m68k/coldfire/pci.c
index 84eab0f5e00a..ecd11a19487a 100644
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -64,7 +64,7 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn,
 
 	if (bus->number == 0) {
 		if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0)
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 	}
 
 	addr = mcf_mk_pcicar(bus->number, devfn, where);
@@ -86,7 +86,7 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn,
 
 	__raw_writel(0, PCICAR);
 	__raw_readl(PCICAR);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
@@ -96,7 +96,7 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
 
 	if (bus->number == 0) {
 		if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0)
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 	}
 
 	addr = mcf_mk_pcicar(bus->number, devfn, where);
@@ -118,7 +118,7 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
 
 	__raw_writel(0, PCICAR);
 	__raw_readl(PCICAR);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static struct pci_ops mcf_pci_ops = {
-- 
2.18.2

[RFC PATCH 32/35] arm/PCI: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/arm/common/it8152.c           | 4 ++--
 arch/arm/mach-cns3xxx/pcie.c       | 2 +-
 arch/arm/mach-footbridge/dc21285.c | 4 ++--
 arch/arm/mach-iop32x/pci.c         | 6 +++---
 arch/arm/mach-ixp4xx/common-pci.c  | 8 ++++----
 arch/arm/mach-orion5x/pci.c        | 4 ++--
 arch/arm/plat-orion/pcie.c         | 8 ++++----
 7 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 9ec740cac469..331911b627c4 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -186,7 +186,7 @@ static int it8152_pci_read_config(struct pci_bus *bus,
 
 	*value = v;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int it8152_pci_write_config(struct pci_bus *bus,
@@ -216,7 +216,7 @@ static int it8152_pci_write_config(struct pci_bus *bus,
 	__raw_writel((addr + where), IT8152_PCI_CFG_ADDR);
 	__raw_writel((v | vtemp), IT8152_PCI_CFG_DATA);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops it8152_ops = {
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index e92fbd679dfb..7020071a2dc5 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -92,7 +92,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 
 	ret = pci_generic_config_read(bus, devfn, where, size, val);
 
-	if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
+	if (ret == 0 && !bus->number && !devfn &&
 	    (where & 0xffc) == PCI_CLASS_REVISION)
 		/*
 		 * RC's class is 0xb, but Linux PCI driver needs 0x604
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 416462e3f5d6..5ad78b38c659 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -86,7 +86,7 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		return -1;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -121,7 +121,7 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		return -1;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops dc21285_ops = {
diff --git a/arch/arm/mach-iop32x/pci.c b/arch/arm/mach-iop32x/pci.c
index ab0010dc3145..a29d33ce20c8 100644
--- a/arch/arm/mach-iop32x/pci.c
+++ b/arch/arm/mach-iop32x/pci.c
@@ -118,7 +118,7 @@ iop3xx_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 
 	*value = val;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -131,7 +131,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 	if (size != 4) {
 		val = iop3xx_read(addr);
 		if (iop3xx_pci_status())
-			return PCIBIOS_SUCCESSFUL;
+			return 0;
 
 		where = (where & 3) * 8;
 
@@ -154,7 +154,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 			  "r" (IOP3XX_OCCAR), "r" (IOP3XX_OCCDR));
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops iop3xx_ops = {
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 893c19c254e3..f7cd535d4971 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -208,7 +208,7 @@ static int local_read_config(int where, int size, u32 *value)
 	crp_read(where & ~3, &data);
 	*value = (data >> (8*n)) & bytemask[size];
 	pr_debug("local_read_config read %#x\n", *value);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int local_write_config(int where, int size, u32 value)
@@ -221,7 +221,7 @@ static int local_write_config(int where, int size, u32 value)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 	data = value << (8*n);
 	crp_write((where & ~3) | byte_enables, data);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static u32 byte_lane_enable_bits(u32 n, int size)
@@ -255,7 +255,7 @@ static int ixp4xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, int w
 
 	*value = (data >> (8*n)) & bytemask[size];
 	pr_debug("read_config_byte read %#x\n", *value);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int ixp4xx_pci_write_config(struct pci_bus *bus,  unsigned int devfn, int where, int size, u32 value)
@@ -276,7 +276,7 @@ static int ixp4xx_pci_write_config(struct pci_bus *bus,  unsigned int devfn, int
 	if (ixp4xx_pci_write(addr, byte_enables | NP_CMD_CONFIGWRITE, data))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops ixp4xx_ops = {
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 76951bfbacf5..2b587225e244 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -289,14 +289,14 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
 
 	spin_unlock_irqrestore(&orion5x_pci_lock, flags);
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
 					u32 where, u32 size, u32 val)
 {
 	unsigned long flags;
-	int ret = PCIBIOS_SUCCESSFUL;
+	int ret = 0;
 
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 8b8c06d2e9c4..6fb142f893ac 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -221,7 +221,7 @@ int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
 	else if (size == 2)
 		*val = (*val >> (8 * (where & 3))) & 0xffff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
@@ -244,7 +244,7 @@ int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
 	else if (size == 2)
 		*val = (*val >> (8 * (where & 3))) & 0xffff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
@@ -260,13 +260,13 @@ int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
 	else if (size == 2)
 		*val = (*val >> (8 * (where & 3))) & 0xffff;
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus,
 		       u32 devfn, int where, int size, u32 val)
 {
-	int ret = PCIBIOS_SUCCESSFUL;
+	int ret = 0;
 
 	writel(PCIE_CONF_BUS(bus->number) |
 		PCIE_CONF_DEV(PCI_SLOT(devfn)) |
-- 
2.18.2

[RFC PATCH 33/35] arm/PCI: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on PATCH 32/35

 arch/arm/mach-cns3xxx/pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 7020071a2dc5..c249d4cbf4f0 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -92,7 +92,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 
 	ret = pci_generic_config_read(bus, devfn, where, size, val);
 
-	if (ret == 0 && !bus->number && !devfn &&
+	if (!ret && !bus->number && !devfn &&
 	    (where & 0xffc) == PCI_CLASS_REVISION)
 		/*
 		 * RC's class is 0xb, but Linux PCI driver needs 0x604
-- 
2.18.2

[RFC PATCH 34/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

[Saheed O. Bolarinwa]

In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
 arch/alpha/kernel/core_apecs.c    | 4 ++--
 arch/alpha/kernel/core_cia.c      | 4 ++--
 arch/alpha/kernel/core_irongate.c | 4 ++--
 arch/alpha/kernel/core_lca.c      | 4 ++--
 arch/alpha/kernel/core_marvel.c   | 4 ++--
 arch/alpha/kernel/core_mcpcia.c   | 4 ++--
 arch/alpha/kernel/core_polaris.c  | 4 ++--
 arch/alpha/kernel/core_t2.c       | 4 ++--
 arch/alpha/kernel/core_titan.c    | 4 ++--
 arch/alpha/kernel/core_tsunami.c  | 4 ++--
 arch/alpha/kernel/core_wildfire.c | 4 ++--
 arch/alpha/kernel/sys_miata.c     | 2 +-
 12 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c
index 6df765ff2b10..d74d78d92434 100644
--- a/arch/alpha/kernel/core_apecs.c
+++ b/arch/alpha/kernel/core_apecs.c
@@ -287,7 +287,7 @@ apecs_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 	shift = (where & 3) * 8;
 	addr = (pci_addr << 5) + mask + APECS_CONF;
 	*value = conf_read(addr, type1) >> (shift);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -304,7 +304,7 @@ apecs_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 	mask = (size - 1) * 8;
 	addr = (pci_addr << 5) + mask + APECS_CONF;
 	conf_write(addr, value << ((where & 3) * 8), type1);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops apecs_pci_ops = 
diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c
index f489170201c3..25300bc19c48 100644
--- a/arch/alpha/kernel/core_cia.c
+++ b/arch/alpha/kernel/core_cia.c
@@ -221,7 +221,7 @@ cia_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
 	shift = (where & 3) * 8;
 	addr = (pci_addr << 5) + mask + CIA_CONF;
 	*value = conf_read(addr, type1) >> (shift);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -238,7 +238,7 @@ cia_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
 	mask = (size - 1) * 8;
 	addr = (pci_addr << 5) + mask + CIA_CONF;
 	conf_write(addr, value << ((where & 3) * 8), type1);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops cia_pci_ops = 
diff --git a/arch/alpha/kernel/core_irongate.c b/arch/alpha/kernel/core_irongate.c
index a9fd133a7fb2..858a2293c786 100644
--- a/arch/alpha/kernel/core_irongate.c
+++ b/arch/alpha/kernel/core_irongate.c
@@ -121,7 +121,7 @@ irongate_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -152,7 +152,7 @@ irongate_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops irongate_pci_ops =
diff --git a/arch/alpha/kernel/core_lca.c b/arch/alpha/kernel/core_lca.c
index 57e0750419f2..a7a00d73e2c5 100644
--- a/arch/alpha/kernel/core_lca.c
+++ b/arch/alpha/kernel/core_lca.c
@@ -213,7 +213,7 @@ lca_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 	mask = (size - 1) * 8;
 	addr = (pci_addr << 5) + mask + LCA_CONF;
 	*value = conf_read(addr) >> (shift);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -229,7 +229,7 @@ lca_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
 	mask = (size - 1) * 8;
 	addr = (pci_addr << 5) + mask + LCA_CONF;
 	conf_write(addr, value << ((where & 3) * 8));
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops lca_pci_ops = 
diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c
index 1db9d0eb2922..c076b97a9961 100644
--- a/arch/alpha/kernel/core_marvel.c
+++ b/arch/alpha/kernel/core_marvel.c
@@ -561,7 +561,7 @@ marvel_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -593,7 +593,7 @@ marvel_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops marvel_pci_ops =
diff --git a/arch/alpha/kernel/core_mcpcia.c b/arch/alpha/kernel/core_mcpcia.c
index 74b1d018124c..fdb6d055bcc0 100644
--- a/arch/alpha/kernel/core_mcpcia.c
+++ b/arch/alpha/kernel/core_mcpcia.c
@@ -216,7 +216,7 @@ mcpcia_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		*value = w;
 		break;
 	}
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int
@@ -233,7 +233,7 @@ mcpcia_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 	addr |= (size - 1) * 8;
 	value = __kernel_insql(value, where & 3);
 	conf_write(addr, value, type1, hose);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops mcpcia_pci_ops = 
diff --git a/arch/alpha/kernel/core_polaris.c b/arch/alpha/kernel/core_polaris.c
index 75d622d96ff2..345b9d5a116f 100644
--- a/arch/alpha/kernel/core_polaris.c
+++ b/arch/alpha/kernel/core_polaris.c
@@ -102,7 +102,7 @@ polaris_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 
@@ -134,7 +134,7 @@ polaris_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops polaris_pci_ops = 
diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c
index 98d5b6ff8a76..0bbf9b028c11 100644
--- a/arch/alpha/kernel/core_t2.c
+++ b/arch/alpha/kernel/core_t2.c
@@ -296,7 +296,7 @@ t2_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 	shift = (where & 3) * 8;
 	addr = (pci_addr << 5) + mask + T2_CONF;
 	*value = conf_read(addr, type1) >> (shift);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -313,7 +313,7 @@ t2_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
 	mask = (size - 1) * 8;
 	addr = (pci_addr << 5) + mask + T2_CONF;
 	conf_write(addr, value << ((where & 3) * 8), type1);
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops t2_pci_ops = 
diff --git a/arch/alpha/kernel/core_titan.c b/arch/alpha/kernel/core_titan.c
index 2a2820fb1be6..aac94708a226 100644
--- a/arch/alpha/kernel/core_titan.c
+++ b/arch/alpha/kernel/core_titan.c
@@ -158,7 +158,7 @@ titan_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -189,7 +189,7 @@ titan_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops titan_pci_ops = 
diff --git a/arch/alpha/kernel/core_tsunami.c b/arch/alpha/kernel/core_tsunami.c
index fc1ab73f23de..88fe80a8b41a 100644
--- a/arch/alpha/kernel/core_tsunami.c
+++ b/arch/alpha/kernel/core_tsunami.c
@@ -134,7 +134,7 @@ tsunami_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -165,7 +165,7 @@ tsunami_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops tsunami_pci_ops = 
diff --git a/arch/alpha/kernel/core_wildfire.c b/arch/alpha/kernel/core_wildfire.c
index e8d3b033018d..012ec2f5b675 100644
--- a/arch/alpha/kernel/core_wildfire.c
+++ b/arch/alpha/kernel/core_wildfire.c
@@ -400,7 +400,7 @@ wildfire_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 static int 
@@ -431,7 +431,7 @@ wildfire_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 		break;
 	}
 
-	return PCIBIOS_SUCCESSFUL;
+	return 0;
 }
 
 struct pci_ops wildfire_pci_ops = 
diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c
index e1bee8f84c58..1b4c03ac34d8 100644
--- a/arch/alpha/kernel/sys_miata.c
+++ b/arch/alpha/kernel/sys_miata.c
@@ -185,7 +185,7 @@ miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 	if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
 		u8 irq=0;
 		struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
-		if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {
+		if (pdev == NULL || pci_read_config_byte(pdev, 0x40, &irq) != 0) {
 			pci_dev_put(pdev);
 			return -1;
 		}
-- 
2.18.2

[RFC PATCH 35/35] alpha: Tidy Success/Failure checks

[Saheed O. Bolarinwa]

Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
---
This patch depends on 34/35

 arch/alpha/kernel/sys_miata.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c
index 1b4c03ac34d8..539f803c1614 100644
--- a/arch/alpha/kernel/sys_miata.c
+++ b/arch/alpha/kernel/sys_miata.c
@@ -185,7 +185,7 @@ miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 	if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
 		u8 irq=0;
 		struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
-		if (pdev == NULL || pci_read_config_byte(pdev, 0x40, &irq) != 0) {
+		if (pdev == NULL || pci_read_config_byte(pdev, 0x40, &irq)) {
 			pci_dev_put(pdev);
 			return -1;
 		}
-- 
2.18.2

Re: [RFC PATCH 12/35] r8169: Tidy Success/Failure checks

[Saheed Bolarinwa]

Thank you for the review.

On 7/13/20 3:45 PM, Heiner Kallweit wrote:
>
> Patches 11 and 12 are both trivial, wouldn't it make sense to merge them?
> Apart from that: Acked-by: Heiner Kallweit <hkallweit1@gmail.com>

I separated them for easy review, I will merge them in the next version.

- Saheed

Re: [RFC PATCH 12/35] r8169: Tidy Success/Failure checks

[Heiner Kallweit]

On 13.07.2020 14:22, Saheed O. Bolarinwa wrote:
> Remove unnecessary check for 0.
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
> This patch depends on PATCH 11/35
> 
>  drivers/net/ethernet/realtek/r8169_main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index 206dac958cb2..79edbc0c4476 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -2656,7 +2656,7 @@ static void rtl_csi_access_enable(struct rtl8169_private *tp, u8 val)
>  	 * first and if it fails fall back to CSI.
>  	 */
>  	if (pdev->cfg_size > 0x070f &&
> -	    pci_write_config_byte(pdev, 0x070f, val) == 0)
> +	    !pci_write_config_byte(pdev, 0x070f, val))
>  		return;
>  
>  	netdev_notice_once(tp->dev,
> 
Patches 11 and 12 are both trivial, wouldn't it make sense to merge them?
Apart from that: Acked-by: Heiner Kallweit <hkallweit1@gmail.com>

RE: [RFC PATCH 06/35] PCI: Tidy Success/Failure checks

[Gustavo Pimentel]

On Mon, Jul 13, 2020 at 13:22:18, Saheed O. Bolarinwa 
<refactormyself@gmail.com> wrote:

> Remove unnecessary check for 0.
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
> This patch depends on PATCH 05/35
> 
>  drivers/pci/controller/dwc/pci-meson.c            | 2 +-
>  drivers/pci/controller/dwc/pcie-designware-host.c | 2 +-
>  drivers/pci/controller/pci-xgene.c                | 3 +--
>  drivers/pci/controller/pcie-altera.c              | 4 ++--
>  drivers/pci/controller/pcie-iproc.c               | 2 +-
>  drivers/pci/controller/pcie-rcar-host.c           | 4 ++--
>  6 files changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
> index 58142f03d300..8203d5f95d28 100644
> --- a/drivers/pci/controller/dwc/pci-meson.c
> +++ b/drivers/pci/controller/dwc/pci-meson.c
> @@ -390,7 +390,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
>  	int ret;
>  
>  	ret = dw_pcie_read(pci->dbi_base + where, size, val);
> -	if (ret != 0)
> +	if (ret)
>  		return ret;
>  
>  	/*
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 7c97c54f787c..2dd3965365f6 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -459,7 +459,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
>  	}
>  
>  	ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
> -	if (ret != 0) {
> +	if (ret) {
>  		dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg (ret: 0x%x)\n",
>  			ret);
>  		ret = pcibios_err_to_errno(ret);
> diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c
> index bf74f0a8b451..8d55cfc4ff8a 100644
> --- a/drivers/pci/controller/pci-xgene.c
> +++ b/drivers/pci/controller/pci-xgene.c
> @@ -167,8 +167,7 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
>  {
>  	struct xgene_pcie_port *port = pcie_bus_to_port(bus);
>  
> -	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
> -	    0)
> +	if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val))
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  
>  	/*
> diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c
> index 96f5bda32b58..9f7b12ad0c04 100644
> --- a/drivers/pci/controller/pcie-altera.c
> +++ b/drivers/pci/controller/pcie-altera.c
> @@ -367,7 +367,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
>  						    value, false);
>  
>  	ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL);
> -	if (ret != 0)
> +	if (ret)
>  		return ret;
>  
>  	/*
> @@ -453,7 +453,7 @@ static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno,
>  
>  	ret = tlp_cfg_dword_read(pcie, busno, devfn,
>  				 (where & ~DWORD_MASK), byte_en, &data);
> -	if (ret != 0)
> +	if (ret)
>  		return ret;
>  
>  	switch (size) {
> diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c
> index dac9352c0cb2..d34c9457fbe4 100644
> --- a/drivers/pci/controller/pcie-iproc.c
> +++ b/drivers/pci/controller/pcie-iproc.c
> @@ -584,7 +584,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
>  	/* root complex access */
>  	if (busno == 0) {
>  		ret = pci_generic_config_read32(bus, devfn, where, size, val);
> -		if (ret == 0)
> +		if (!ret)
>  			iproc_pcie_fix_cap(pcie, where, val);
>  
>  		return ret;
> diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c
> index 363a8630de28..2bb250c6f767 100644
> --- a/drivers/pci/controller/pcie-rcar-host.c
> +++ b/drivers/pci/controller/pcie-rcar-host.c
> @@ -157,7 +157,7 @@ static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
>  
>  	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
>  				      bus, devfn, where, val);
> -	if (ret != 0) {
> +	if (ret) {
>  		*val = 0xffffffff;
>  		return ret;
>  	}
> @@ -184,7 +184,7 @@ static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn,
>  
>  	ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
>  				      bus, devfn, where, &data);
> -	if (ret != 0)
> +	if (ret)
>  		return ret;
>  
>  	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n",
> -- 
> 2.18.2

Seems harmless to me.

Re: [RFC PATCH 09/35] nvme-pci: Change PCIBIOS_SUCCESSFUL to 0

[Rajashekar, Revanth]

Hi,

On 7/13/2020 6:22 AM, Saheed O. Bolarinwa wrote:
> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
> Their scope should be limited within arch/x86.
>
> Change all PCIBIOS_SUCCESSFUL to 0
>
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
>  drivers/nvme/host/pci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> index b1d18f0633c7..d426efb53f44 100644
> --- a/drivers/nvme/host/pci.c
> +++ b/drivers/nvme/host/pci.c
> @@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
>  
>  	result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
>  				      &pci_status);
> -	if (result == PCIBIOS_SUCCESSFUL)
> +	if (result == 0)
How about simplifying the check to if (!result)?
>  		dev_warn(dev->ctrl.device,
>  			 "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n",
>  			 csts, pci_status);
Thanks!
Revanth

Re: [RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

[Larry Finger]

On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
> Their scope should be limited within arch/x86.
> 
> Change all PCIBIOS_SUCCESSFUL to 0
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>

Could you please tell me what difference this makes? It looks like source churn 
rather than a substantive change. The symbol is defined in pci.h and is used in 
many architures. Certainly, PCIBIOS_SUCCESSFUL indicates success even more 
clearly than 0 does.

Why is your name inside quotes in your s-o-b?

Larry

Re: [RFC PATCH 09/35] nvme-pci: Change PCIBIOS_SUCCESSFUL to 0

[Saheed Bolarinwa]

On 7/13/20 6:42 PM, Rajashekar, Revanth wrote:
> Hi,
>
> On 7/13/2020 6:22 AM, Saheed O. Bolarinwa wrote:
>> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
>> Their scope should be limited within arch/x86.
>>
>> Change all PCIBIOS_SUCCESSFUL to 0
>>
>> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
>> ---
>>   drivers/nvme/host/pci.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
>> index b1d18f0633c7..d426efb53f44 100644
>> --- a/drivers/nvme/host/pci.c
>> +++ b/drivers/nvme/host/pci.c
>> @@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
>>   
>>   	result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
>>   				      &pci_status);
>> -	if (result == PCIBIOS_SUCCESSFUL)
>> +	if (result == 0)
> How about simplifying the check to if (!result)?

Thank you for the review.  I did in PATCH 10/35. I will merge both.

I wanted to separate the goal from the fix but I see it's confusing.

- Saheed

Re: [RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

[Arnd Bergmann]

On Mon, Jul 13, 2020 at 8:13 PM Saheed Bolarinwa
<refactormyself@gmail.com> wrote:
> On 7/13/20 7:16 PM, Larry Finger wrote:
>
> > Why is your name inside quotes in your s-o-b?
> >
> To keep me company before I get to know my way within the kernel.
>
> I saw people with >2 names do it, so I did! Please let me know if it is odd.

It's required for a proper email header if you have a dor (.) in your cleartext
name, but it is not required in a Signed-off-by tag, though a number of people
still do it out of habit. I'm sure it's fine either way.

     Arnd

Re: [RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

[Larry Finger]

On 7/13/20 2:13 PM, Saheed Bolarinwa wrote:
> Hello Larry,
> 
> On 7/13/20 7:16 PM, Larry Finger wrote:
>> On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
>>> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
>>> Their scope should be limited within arch/x86.
>>>
>>> Change all PCIBIOS_SUCCESSFUL to 0
>>>
>>> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
>>
>> Could you please tell me what difference this makes? It looks like source 
>> churn rather than a substantive change. The symbol is defined in pci.h and is 
>> used in many architures. Certainly, PCIBIOS_SUCCESSFUL indicates success even 
>> more clearly than 0 does.
>>
> It is a trivial first step towards a probably significant task. I explained in 
> the Cover Letter, I can see it didn't get through but I Cc linux-wireless 
> (properly this time). Probably, too many addresses.
> 
> I have resent it. It is here 
> https://lore.kernel.org/linux-wireless/20200713185559.31967-1-refactormyself@gmail.com/T/#u 
> 
> 
>> Why is your name inside quotes in your s-o-b?
>>
> To keep me company before I get to know my way within the kernel.
> 
> I saw people with >2 names do it, so I did! Please let me know if it is odd.
> 

Thank you for the explanations. The cover letter did help.

For both SSB and BMCA changes,

Acked-by: Larry Finger <Larry.Finger@lwfinger.net>

Larry

Re: [RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

[Saheed Bolarinwa]

Hello Larry,

On 7/13/20 7:16 PM, Larry Finger wrote:
> On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
>> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
>> Their scope should be limited within arch/x86.
>>
>> Change all PCIBIOS_SUCCESSFUL to 0
>>
>> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
>
> Could you please tell me what difference this makes? It looks like 
> source churn rather than a substantive change. The symbol is defined 
> in pci.h and is used in many architures. Certainly, PCIBIOS_SUCCESSFUL 
> indicates success even more clearly than 0 does.
>
It is a trivial first step towards a probably significant task. I 
explained in the Cover Letter, I can see it didn't get through but I Cc 
linux-wireless (properly this time). Probably, too many addresses.

I have resent it. It is here 
https://lore.kernel.org/linux-wireless/20200713185559.31967-1-refactormyself@gmail.com/T/#u

> Why is your name inside quotes in your s-o-b?
>
To keep me company before I get to know my way within the kernel.

I saw people with >2 names do it, so I did! Please let me know if it is odd.

Thank you.

- Saheed

Re: [RFC PATCH 16/35] hwmon: (sis5595) Change PCIBIOS_SUCCESSFUL to 0

[Guenter Roeck]

On 7/13/20 5:22 AM, Saheed O. Bolarinwa wrote:
> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
> Their scope should be limited within arch/x86.
> 
> Change all PCIBIOS_SUCCESSFUL to 0
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
>  drivers/hwmon/sis5595.c | 8 ++++----
>  drivers/hwmon/via686a.c | 8 ++++----
>  drivers/hwmon/vt8231.c  | 8 ++++----
>  3 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
> index 0c6741f949f5..0ea174fb3048 100644
> --- a/drivers/hwmon/sis5595.c
> +++ b/drivers/hwmon/sis5595.c
> @@ -825,7 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
>  		pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
>  	}
>  
> -	if (PCIBIOS_SUCCESSFUL !=
> +	if (0 !=
>  	    pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {

Yoda programming already terrible is, but "0 !=" is even worse than that
(and completely unnecessary). If you want to clean this up, do it right
and drop those unnecessary comparisons.

Guenter

Re: [RFC PATCH 17/35] hwmon: (sis5595) Tidy Success/Failure checks

[Guenter Roeck]

On 7/13/20 5:22 AM, Saheed O. Bolarinwa wrote:
> Remove unnecessary check for 0.
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
> This patch depends on PATCH 16/35
> 
>  drivers/hwmon/sis5595.c | 13 ++++---------
>  drivers/hwmon/via686a.c | 13 ++++---------
>  drivers/hwmon/vt8231.c  | 13 ++++---------
>  3 files changed, 12 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
> index 0ea174fb3048..91fdddaa4136 100644
> --- a/drivers/hwmon/sis5595.c
> +++ b/drivers/hwmon/sis5595.c
> @@ -825,8 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
>  		pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
>  	}
>  
> -	if (0 !=
> -	    pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
> +	if (pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {

Ah, there is is, and I see that others commented on it.
Single patch, please.

Guenter

Re: [RFC PATCH 14/35] i2c/busses: Change PCIBIOS_SUCCESSFUL to 0

[Jean Delvare]

Hi Saheed,

On Mon, 13 Jul 2020 14:22:26 +0200, Saheed O. Bolarinwa wrote:
> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
> Their scope should be limited within arch/x86.

Which PCI specification are you talking about here. In my "PCI Local
Bus Revision 2.3" specification (March 29, 2002), chapter 2 is about
Signal Definition and has nothing to do with the BIOS.

> 
> Change all PCIBIOS_SUCCESSFUL to 0
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
>  drivers/i2c/busses/i2c-ali15x3.c |  4 ++--
>  drivers/i2c/busses/i2c-nforce2.c |  2 +-
>  drivers/i2c/busses/i2c-sis5595.c | 10 +++++-----
>  3 files changed, 8 insertions(+), 8 deletions(-)

Hmmm. That seems to be a lot of changes to solve an essentially
theoretical problem (if a problem at all). I am not familiar enough
with the PCI subsystem to claim that it is fundamentally wrong, but
enough to say I'm skeptical.

PCI is a cross-architecture standard, and we can't possibly have the
return value of core functions such as pci_write_config_word follow
different conventions depending on the architecture, can we? Does
pci_write_config_word() currently return PCIBIOS_SUCCESSFUL on success
on x86 and 0 on success on other architectures? What about errors, do
we return positive, "PCIBIOS-specific" error codes on x86 and negative,
unix-like error codes on other architectures?

> diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
> index 02185a1cfa77..359ee3e0864a 100644
> --- a/drivers/i2c/busses/i2c-ali15x3.c
> +++ b/drivers/i2c/busses/i2c-ali15x3.c
> @@ -167,11 +167,11 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
>  	if(force_addr) {
>  		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
>  			ali15x3_smba);
> -		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
> +		if (0 != pci_write_config_word(ALI15X3_dev,
>  								SMBBA,
>  								ali15x3_smba))
>  			goto error;

This leaves the code horribly aligned.

> -		if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
> +		if (0 != pci_read_config_word(ALI15X3_dev,
>  								SMBBA, &a))
>  			goto error;
>  		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
> diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
> index 777278386f58..385f4f446f36 100644
> --- a/drivers/i2c/busses/i2c-nforce2.c
> +++ b/drivers/i2c/busses/i2c-nforce2.c
> @@ -328,7 +328,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
>  		u16 iobase;
>  
>  		if (pci_read_config_word(dev, alt_reg, &iobase)
> -		    != PCIBIOS_SUCCESSFUL) {
> +		    != 0) {
>  			dev_err(&dev->dev, "Error reading PCI config for %s\n",
>  				name);
>  			return -EIO;
> diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
> index c793a5c14cda..fbe3ee31eae3 100644
> --- a/drivers/i2c/busses/i2c-sis5595.c
> +++ b/drivers/i2c/busses/i2c-sis5595.c
> @@ -176,10 +176,10 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
>  	if (force_addr) {
>  		dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", sis5595_base);
>  		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
> -		    != PCIBIOS_SUCCESSFUL)
> +		    != 0)
>  			goto error;
>  		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
> -		    != PCIBIOS_SUCCESSFUL)
> +		    != 0)
>  			goto error;
>  		if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
>  			/* doesn't work for some chips! */
> @@ -189,15 +189,15 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
>  	}
>  
>  	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
> -	    != PCIBIOS_SUCCESSFUL)
> +	    != 0)
>  		goto error;
>  	if ((val & 0x80) == 0) {
>  		dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
>  		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80)
> -		    != PCIBIOS_SUCCESSFUL)
> +		    != 0)
>  			goto error;
>  		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
> -		    != PCIBIOS_SUCCESSFUL)
> +		    != 0)
>  			goto error;
>  		if ((val & 0x80) == 0) {
>  			/* doesn't work for some chips? */


-- 
Jean Delvare
SUSE L3 Support

Re: [RFC PATCH 15/35] i2c/busses: Tidy Success/Failure checks

[Jean Delvare]

On Mon, 13 Jul 2020 14:22:27 +0200, Saheed O. Bolarinwa wrote:
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
> This patch depends on PATCH 15/35

Not possible, as this *is* patch 15/35. Not really worth mentioning
anyway, as it is expected that patches in a given series may depend on
any earlier patch in the same series.

> 
>  drivers/i2c/busses/i2c-ali15x3.c |  5 ++---
>  drivers/i2c/busses/i2c-nforce2.c |  3 +--
>  drivers/i2c/busses/i2c-sis5595.c | 15 +++++----------
>  3 files changed, 8 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
> index 359ee3e0864a..c9e779cc184e 100644
> --- a/drivers/i2c/busses/i2c-ali15x3.c
> +++ b/drivers/i2c/busses/i2c-ali15x3.c
> @@ -167,11 +167,10 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
>  	if(force_addr) {
>  		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
>  			ali15x3_smba);
> -		if (0 != pci_write_config_word(ALI15X3_dev,
> -								SMBBA,
> +		if (pci_write_config_word(ALI15X3_dev, SMBBA,
>  								ali15x3_smba))
>  			goto error;

You can't possibly leave the code with such a ugly alignment and run
away. The whole point of tidying patches it to have more readable code
in the end, right?

> -		if (0 != pci_read_config_word(ALI15X3_dev,
> +		if (pci_read_config_word(ALI15X3_dev,
>  								SMBBA, &a))
>  			goto error;
>  		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
> diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
> index 385f4f446f36..54d2985b7aaf 100644
> --- a/drivers/i2c/busses/i2c-nforce2.c
> +++ b/drivers/i2c/busses/i2c-nforce2.c
> @@ -327,8 +327,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
>  		/* Older incarnations of the device used non-standard BARs */
>  		u16 iobase;
>  
> -		if (pci_read_config_word(dev, alt_reg, &iobase)
> -		    != 0) {
> +		if (pci_read_config_word(dev, alt_reg, &iobase)) {
>  			dev_err(&dev->dev, "Error reading PCI config for %s\n",
>  				name);
>  			return -EIO;
> diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
> index fbe3ee31eae3..b016f48519d3 100644
> --- a/drivers/i2c/busses/i2c-sis5595.c
> +++ b/drivers/i2c/busses/i2c-sis5595.c
> @@ -175,11 +175,9 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
>  
>  	if (force_addr) {
>  		dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", sis5595_base);
> -		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
> -		    != 0)
> +		if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base))
>  			goto error;
> -		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
> -		    != 0)
> +		if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a))
>  			goto error;
>  		if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
>  			/* doesn't work for some chips! */
> @@ -188,16 +186,13 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
>  		}
>  	}
>  
> -	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
> -	    != 0)
> +	if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
>  		goto error;
>  	if ((val & 0x80) == 0) {
>  		dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
> -		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80)
> -		    != 0)
> +		if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val | 0x80))
>  			goto error;
> -		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
> -		    != 0)
> +		if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
>  			goto error;
>  		if ((val & 0x80) == 0) {
>  			/* doesn't work for some chips? */

Overall I'd be happy to have a more consistent style for checking
errors on PCI config registers access, so this seems to be going into
the right direction.

-- 
Jean Delvare
SUSE L3 Support

Re: [RFC PATCH 14/35] i2c/busses: Change PCIBIOS_SUCCESSFUL to 0

[Saheed Bolarinwa]

On 7/17/20 4:58 PM, Jean Delvare wrote:

> Which PCI specification are you talking about here. In my "PCI Local
> Bus Revision 2.3" specification (March 29, 2002), chapter 2 is about
> Signal Definition and has nothing to do with the BIOS.
http://read.pudn.com/downloads211/doc/comm/994029/pcifw_r3_0_updated.pdf
>> Change all PCIBIOS_SUCCESSFUL to 0
>>
>> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
>> ---
>>   drivers/i2c/busses/i2c-ali15x3.c |  4 ++--
>>   drivers/i2c/busses/i2c-nforce2.c |  2 +-
>>   drivers/i2c/busses/i2c-sis5595.c | 10 +++++-----
>>   3 files changed, 8 insertions(+), 8 deletions(-)
> Hmmm. That seems to be a lot of changes to solve an essentially
> theoretical problem (if a problem at all). I am not familiar enough
> with the PCI subsystem to claim that it is fundamentally wrong, but
> enough to say I'm skeptical.
>
> PCI is a cross-architecture standard, and we can't possibly have the
> return value of core functions such as pci_write_config_word follow
> different conventions depending on the architecture, can we? Does
> pci_write_config_word() currently return PCIBIOS_SUCCESSFUL on success
> on x86 and 0 on success on other architectures? What about errors, do
> we return positive, "PCIBIOS-specific" error codes on x86 and negative,
> unix-like error codes on other architectures?

Unfortunately, the cover letter did not go through. I have resent it now:

https://lore.kernel.org/linux-i2c/20200718184558.110942-1-refactormyself@gmail.com/T/#u

Here is a discussion thread on it:

https://lore.kernel.org/linux-pci/fb40545a8de8df8914df40d7d6167752c5244ce6.camel@kernel.crashing.org/T/#t

>> diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
>> index 02185a1cfa77..359ee3e0864a 100644
>> --- a/drivers/i2c/busses/i2c-ali15x3.c
>> +++ b/drivers/i2c/busses/i2c-ali15x3.c
>> @@ -167,11 +167,11 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
>>   	if(force_addr) {
>>   		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
>>   			ali15x3_smba);
>> -		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
>> +		if (0 != pci_write_config_word(ALI15X3_dev,
>>   								SMBBA,
>>   								ali15x3_smba))
>>   			goto error;
> This leaves the code horribly aligned.

Sorry about that, lessons learnt.

Thank you for the review.

- Saheed

Re: [RFC PATCH 24/35] sh: Change PCIBIOS_SUCCESSFUL to 0

[Rich Felker]

On Mon, Jul 13, 2020 at 02:22:36PM +0200, Saheed O. Bolarinwa wrote:
> In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
> Their scope should be limited within arch/x86.
> 
> Change all PCIBIOS_SUCCESSFUL to 0
> 
> Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
> ---
>  arch/sh/drivers/pci/common.c        | 2 +-
>  arch/sh/drivers/pci/ops-dreamcast.c | 4 ++--
>  arch/sh/drivers/pci/ops-sh4.c       | 4 ++--
>  arch/sh/drivers/pci/ops-sh7786.c    | 8 ++++----
>  arch/sh/drivers/pci/pci.c           | 2 +-
>  5 files changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
> index fe163ecd0719..ee27cdfd3e68 100644
> --- a/arch/sh/drivers/pci/common.c
> +++ b/arch/sh/drivers/pci/common.c
> @@ -61,7 +61,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
>  			continue;
>  		if (early_read_config_word(hose, top_bus, current_bus,
>  					   pci_devfn, PCI_VENDOR_ID, &vid) !=
> -		    PCIBIOS_SUCCESSFUL)
> +		    0)
>  			continue;
>  		if (vid == 0xffff)
>  			continue;
> diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
> index 517a8a9702f6..431cd006951f 100644
> --- a/arch/sh/drivers/pci/ops-dreamcast.c
> +++ b/arch/sh/drivers/pci/ops-dreamcast.c
> @@ -56,7 +56,7 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
>  	case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
>  	}
>  
> -        return PCIBIOS_SUCCESSFUL;
> +	return 0;
>  }
>  
>  static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
> @@ -70,7 +70,7 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
>  	case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
>  	}
>  
> -        return PCIBIOS_SUCCESSFUL;
> +	return 0;
>  }
>  
>  struct pci_ops gapspci_pci_ops = {
> diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
> index a205be3bfc4a..4d757e5f38c6 100644
> --- a/arch/sh/drivers/pci/ops-sh4.c
> +++ b/arch/sh/drivers/pci/ops-sh4.c
> @@ -49,7 +49,7 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
>  		return PCIBIOS_FUNC_NOT_SUPPORTED;
>  	}
>  
> -	return PCIBIOS_SUCCESSFUL;
> +	return 0;
>  }
>  
>  /*
> @@ -90,7 +90,7 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
>  
>  	pci_write_reg(chan, data, SH4_PCIPDR);
>  
> -	return PCIBIOS_SUCCESSFUL;
> +	return 0;
>  }
>  
>  struct pci_ops sh4_pci_ops = {
> diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
> index a10f9f4ebd7f..7c329e467360 100644
> --- a/arch/sh/drivers/pci/ops-sh7786.c
> +++ b/arch/sh/drivers/pci/ops-sh7786.c
> @@ -52,7 +52,7 @@ static int sh7786_pcie_config_access(unsigned char access_type,
>  			else
>  				pci_write_reg(chan, *data, PCI_REG(reg));
>  
> -			return PCIBIOS_SUCCESSFUL;
> +			return 0;
>  		} else if (dev > 1)
>  			return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
> @@ -83,7 +83,7 @@ static int sh7786_pcie_config_access(unsigned char access_type,
>  	/* Disable the configuration access */
>  	pci_write_reg(chan, 0, SH4A_PCIEPCTLR);
>  
> -	return PCIBIOS_SUCCESSFUL;
> +	return 0;
>  }
>  
>  static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
> @@ -101,7 +101,7 @@ static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
>  	raw_spin_lock_irqsave(&pci_config_lock, flags);
>  	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
>  					devfn, where, &data);
> -	if (ret != PCIBIOS_SUCCESSFUL) {
> +	if (ret != 0) {
>  		*val = 0xffffffff;
>  		goto out;
>  	}
> @@ -137,7 +137,7 @@ static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn,
>  	raw_spin_lock_irqsave(&pci_config_lock, flags);
>  	ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
>  					devfn, where, &data);
> -	if (ret != PCIBIOS_SUCCESSFUL)
> +	if (ret != 0)
>  		goto out;
>  
>  	dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
> diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
> index c7784e156964..77130f035fdd 100644
> --- a/arch/sh/drivers/pci/pci.c
> +++ b/arch/sh/drivers/pci/pci.c
> @@ -204,7 +204,7 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
>  			continue;
>  		ret = early_read_config_word(hose, top_bus, current_bus,
>  					     pci_devfn, PCI_STATUS, &status);
> -		if (ret != PCIBIOS_SUCCESSFUL)
> +		if (ret != 0)
>  			continue;
>  		if (status == 0xffff)
>  			continue;
> -- 
> 2.18.2

Acked-by: Rich Felker <dalias@libc.org>

(for both this and the following one in the series)

Re: [RFC PATCH 14/35] i2c/busses: Change PCIBIOS_SUCCESSFUL to 0

[Wolfram Sang]

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> Sorry about that, lessons learnt.

I'll mark the I2C patches as RFC for me. If you resend them, please
mention if I should pick them or if the series shall go in via some
other tree.


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