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From: Christoph Hellwig <hch@lst.de>
To: Jonathan Marek <jonathan@marek.ca>
Cc: freedreno@lists.freedesktop.org, hch@lst.de,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<linux-arm-msm@vger.kernel.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<dri-devel@lists.freedesktop.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [RESEND PATCH v2 3/5] drm/msm: call dma_direct_bypass()
Date: Sat, 14 Nov 2020 17:21:59 +0100	[thread overview]
Message-ID: <20201114162159.GB24411@lst.de> (raw)
In-Reply-To: <20201114151717.5369-4-jonathan@marek.ca>

On Sat, Nov 14, 2020 at 10:17:11AM -0500, Jonathan Marek wrote:
> Always use direct dma ops and no swiotlb.
> 
> Note: arm-smmu-qcom already avoids creating iommu dma ops, but not
> everything uses arm-smmu-qcom and this also sets the dma mask.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/gpu/drm/msm/Kconfig   | 1 +
>  drivers/gpu/drm/msm/msm_drv.c | 8 +++++---
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
> index e5816b498494..07c50405970a 100644
> --- a/drivers/gpu/drm/msm/Kconfig
> +++ b/drivers/gpu/drm/msm/Kconfig
> @@ -20,6 +20,7 @@ config DRM_MSM
>  	select SND_SOC_HDMI_CODEC if SND_SOC
>  	select SYNC_FILE
>  	select PM_OPP
> +	select DMA_OPS_BYPASS
>  	help
>  	  DRM/KMS driver for MSM/snapdragon.
>  
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index 49685571dc0e..bae48afca82e 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -6,6 +6,7 @@
>   */
>  
>  #include <linux/dma-mapping.h>
> +#include <linux/dma-direct.h>
>  #include <linux/kthread.h>
>  #include <linux/uaccess.h>
>  #include <uapi/linux/sched/types.h>
> @@ -1288,10 +1289,11 @@ static int msm_pdev_probe(struct platform_device *pdev)
>  	if (ret)
>  		goto fail;
>  
> -	/* on all devices that I am aware of, iommu's which can map
> -	 * any address the cpu can see are used:
> +	/* always use direct dma ops and no swiotlb

Again, and implementation detail.  Comments should not explain details
obvious from the code (especially layers away) but the intent.

  reply	other threads:[~2020-11-14 16:22 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-14 15:17 [RESEND PATCH v2 0/5] drm/msm: support for host-cached BOs Jonathan Marek
2020-11-14 15:17 ` [RESEND PATCH v2 1/5] drm/msm: add MSM_BO_CACHED_COHERENT Jonathan Marek
2020-11-14 15:17 ` [RESEND PATCH v2 2/5] dma-direct: add dma_direct_bypass() to force direct ops Jonathan Marek
2020-11-14 16:21   ` Christoph Hellwig
2020-11-14 15:17 ` [RESEND PATCH v2 3/5] drm/msm: call dma_direct_bypass() Jonathan Marek
2020-11-14 16:21   ` Christoph Hellwig [this message]
2020-11-14 15:17 ` [RESEND PATCH v2 4/5] drm/msm: add DRM_MSM_GEM_SYNC_CACHE for non-coherent cache maintenance Jonathan Marek
2020-11-14 16:24   ` Christoph Hellwig
2020-11-14 18:46     ` Rob Clark
2020-11-14 18:54       ` Jonathan Marek
2020-11-14 19:39         ` Rob Clark
2020-11-14 20:07           ` Jonathan Marek
2020-11-14 20:48             ` Rob Clark
2020-11-16 17:33             ` Christoph Hellwig
2020-11-16 17:50               ` Rob Clark
2020-11-16 17:52                 ` Jonathan Marek
2020-11-29 18:51                   ` Rob Clark
2020-11-16 17:27           ` [Freedreno] " Jordan Crouse
2020-11-16 17:25   ` Jordan Crouse
2020-11-14 15:17 ` [RESEND PATCH v2 5/5] drm/msm: bump up the uapi version Jonathan Marek

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