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From: Thara Gopinath <thara.gopinath@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com
Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: [Patch v2 2/6] clk: qcom: rpmh: Add CE clock on sdm845.
Date: Thu, 19 Nov 2020 10:52:29 -0500	[thread overview]
Message-ID: <20201119155233.3974286-3-thara.gopinath@linaro.org> (raw)
In-Reply-To: <20201119155233.3974286-1-thara.gopinath@linaro.org>

Qualcomm CE clock resource that is managed by BCM is required
by crypto driver to access the core clock.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
---
 drivers/clk/qcom/clk-rpmh.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index e2c669b08aff..7e2a4a9b9bf6 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -349,6 +349,7 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1);
 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1);
 DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1);
 DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0");
+DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0");
 
 static struct clk_hw *sdm845_rpmh_clocks[] = {
 	[RPMH_CXO_CLK]		= &sdm845_bi_tcxo.hw,
@@ -364,6 +365,7 @@ static struct clk_hw *sdm845_rpmh_clocks[] = {
 	[RPMH_RF_CLK3]		= &sdm845_rf_clk3.hw,
 	[RPMH_RF_CLK3_A]	= &sdm845_rf_clk3_ao.hw,
 	[RPMH_IPA_CLK]		= &sdm845_ipa.hw,
+	[RPMH_CE_CLK]		= &sdm845_ce.hw,
 };
 
 static const struct clk_rpmh_desc clk_rpmh_sdm845 = {
-- 
2.25.1


  parent reply	other threads:[~2020-11-19 15:53 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-19 15:52 [Patch v2 0/6] Enable Qualcomm Crypto Engine on sdm845 Thara Gopinath
2020-11-19 15:52 ` [Patch v2 1/6] dt-bindings: clock: Add entry for crypto engine RPMH clock resource Thara Gopinath
2020-11-25  2:05   ` Stephen Boyd
2020-11-19 15:52 ` Thara Gopinath [this message]
2020-11-25  2:05   ` [Patch v2 2/6] clk: qcom: rpmh: Add CE clock on sdm845 Stephen Boyd
2020-11-19 15:52 ` [Patch v2 3/6] drivers: crypto: qce: Enable support for crypto engine " Thara Gopinath
2020-11-19 15:52 ` [Patch v2 4/6] drivers: crypto: qce: Fix SHA result buffer corruption issues Thara Gopinath
2020-11-25  2:05   ` Stephen Boyd
2020-11-19 15:52 ` [Patch v2 5/6] dts: qcom: sdm845: Add dt entries to support crypto engine Thara Gopinath
2020-11-19 15:52 ` [Patch v2 6/6] dt-bindings: crypto: qcom-qce: Add v5.4 to binding Thara Gopinath
2020-12-07 22:09   ` Rob Herring
2020-12-12 15:25     ` Thara Gopinath
2020-11-19 22:44 ` [Patch v2 0/6] Enable Qualcomm Crypto Engine on sdm845 Eric Biggers
2020-11-24  2:42   ` Thara Gopinath
2020-11-27  6:25 ` Herbert Xu

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