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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Mark Brown <broonie@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Kevin Hilman <khilman@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Viresh Kumar <vireshk@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>
Cc: devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-media@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: [PATCH v2 40/48] media: staging: tegra-vde: Support OPP and generic power domain
Date: Thu, 17 Dec 2020 21:06:30 +0300	[thread overview]
Message-ID: <20201217180638.22748-41-digetx@gmail.com> (raw)
In-Reply-To: <20201217180638.22748-1-digetx@gmail.com>

Add OPP and generic power domain support to the video decoder driver.
This allows us to utilize a modern GENPD API for newer device-trees and
support DVFS of the decoder hardware. Note that older DTBs will continue
to work like they did it before this patch.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/staging/media/tegra-vde/vde.c | 63 ++++++++++++++++++++++-----
 1 file changed, 53 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c
index 28845b5bafaf..5be26b9bd5d8 100644
--- a/drivers/staging/media/tegra-vde/vde.c
+++ b/drivers/staging/media/tegra-vde/vde.c
@@ -15,11 +15,14 @@
 #include <linux/miscdevice.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_opp.h>
 #include <linux/pm_runtime.h>
 #include <linux/reset.h>
 #include <linux/slab.h>
 #include <linux/uaccess.h>
 
+#include <soc/tegra/common.h>
 #include <soc/tegra/pmc.h>
 
 #include "uapi.h"
@@ -918,13 +921,17 @@ static __maybe_unused int tegra_vde_runtime_suspend(struct device *dev)
 	struct tegra_vde *vde = dev_get_drvdata(dev);
 	int err;
 
-	err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC);
-	if (err) {
-		dev_err(dev, "Failed to power down HW: %d\n", err);
-		return err;
+	if (!dev->pm_domain) {
+		err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC);
+		if (err) {
+			dev_err(dev, "Failed to power down HW: %d\n", err);
+			return err;
+		}
 	}
 
 	clk_disable_unprepare(vde->clk);
+	reset_control_release(vde->rst);
+	dev_pm_opp_set_rate(dev, 0);
 
 	return 0;
 }
@@ -934,18 +941,44 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev)
 	struct tegra_vde *vde = dev_get_drvdata(dev);
 	int err;
 
-	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC,
-						vde->clk, vde->rst);
+	err = dev_pm_opp_set_rate(dev, clk_get_rate(vde->clk));
+	if (err) {
+		dev_err(dev, "Failed to prepare OPP: %d\n", err);
+		return err;
+	}
+
+	err = reset_control_acquire(vde->rst);
 	if (err) {
-		dev_err(dev, "Failed to power up HW : %d\n", err);
+		dev_err(dev, "Failed to acquire reset: %d\n", err);
 		return err;
 	}
 
+	if (!dev->pm_domain) {
+		err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC,
+							vde->clk, vde->rst);
+		if (err) {
+			dev_err(dev, "Failed to power up HW : %d\n", err);
+			goto release_reset;
+		}
+	}
+
+	err = clk_prepare_enable(vde->clk);
+	if (err) {
+		dev_err(dev, "Failed to enable clock: %d\n", err);
+		goto release_reset;
+	}
+
 	return 0;
+
+release_reset:
+	reset_control_release(vde->rst);
+
+	return err;
 }
 
 static int tegra_vde_probe(struct platform_device *pdev)
 {
+	struct tegra_core_opp_params opp_params = {};
 	struct device *dev = &pdev->dev;
 	struct tegra_vde *vde;
 	int irq, err;
@@ -999,7 +1032,7 @@ static int tegra_vde_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	vde->rst = devm_reset_control_get(dev, NULL);
+	vde->rst = devm_reset_control_get_exclusive_released(dev, NULL);
 	if (IS_ERR(vde->rst)) {
 		err = PTR_ERR(vde->rst);
 		dev_err(dev, "Could not get VDE reset %d\n", err);
@@ -1024,6 +1057,12 @@ static int tegra_vde_probe(struct platform_device *pdev)
 		return err;
 	}
 
+	opp_params.init_state = true;
+
+	err = devm_tegra_core_dev_init_opp_table(dev, &opp_params);
+	if (err && err != -ENODEV)
+		return err;
+
 	vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0);
 	if (!vde->iram_pool) {
 		dev_err(dev, "Could not get IRAM pool\n");
@@ -1117,8 +1156,12 @@ static void tegra_vde_shutdown(struct platform_device *pdev)
 	 * On some devices bootloader isn't ready to a power-gated VDE on
 	 * a warm-reboot, machine will hang in that case.
 	 */
-	if (pm_runtime_status_suspended(&pdev->dev))
-		tegra_vde_runtime_resume(&pdev->dev);
+	if (pm_runtime_status_suspended(&pdev->dev)) {
+		if (pdev->dev.pm_domain)
+			dev_pm_genpd_resume(&pdev->dev);
+		else
+			tegra_vde_runtime_resume(&pdev->dev);
+	}
 }
 
 static __maybe_unused int tegra_vde_pm_suspend(struct device *dev)
-- 
2.29.2


  parent reply	other threads:[~2020-12-17 18:09 UTC|newest]

Thread overview: 127+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-17 18:05 [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 01/48] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain Dmitry Osipenko
2020-12-21 22:53   ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 02/48] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-12-21 22:54   ` Rob Herring
2020-12-22 19:16     ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 03/48] dt-bindings: memory: tegra124: " Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 04/48] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2020-12-22  0:09   ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 05/48] media: dt: bindings: tegra-vde: " Dmitry Osipenko
2020-12-22  0:09   ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 06/48] dt-bindings: clock: tegra: Document clocks sub-node Dmitry Osipenko
2020-12-22  0:14   ` Rob Herring
2020-12-22 19:16     ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 07/48] dt-bindings: arm: tegra: Add binding for core power domain Dmitry Osipenko
2020-12-19 10:57   ` Krzysztof Kozlowski
2020-12-20 18:26     ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 08/48] regulator: Make regulator_sync_voltage() usable by coupled regulators Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 09/48] opp: Add dev_pm_opp_sync_regulators() Dmitry Osipenko
2020-12-22  6:41   ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 10/48] opp: Add dev_pm_opp_set_voltage() Dmitry Osipenko
2020-12-22  6:41   ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 11/48] opp: Add dev_pm_opp_find_level_ceil() Dmitry Osipenko
2020-12-22  6:42   ` Viresh Kumar
2020-12-22 19:15     ` Dmitry Osipenko
2020-12-23  4:19       ` Viresh Kumar
2020-12-23 20:37         ` Dmitry Osipenko
2020-12-24  6:43           ` Viresh Kumar
2020-12-24 13:00             ` Dmitry Osipenko
2020-12-28  6:22               ` Viresh Kumar
2020-12-28 14:03                 ` Dmitry Osipenko
2020-12-30  4:46                   ` Viresh Kumar
2020-12-30 14:02                     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 12/48] opp: Add dev_pm_opp_get_required_pstate() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 13/48] opp: Add resource-managed versions of OPP API functions Dmitry Osipenko
2020-12-22  8:55   ` Viresh Kumar
2020-12-22 19:14     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 14/48] opp: Filter out OPPs based on availability of a required-OPP Dmitry Osipenko
2020-12-22  8:59   ` Viresh Kumar
2020-12-22 19:17     ` Dmitry Osipenko
2020-12-23  4:22       ` Viresh Kumar
2020-12-23 20:48         ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 15/48] opp: Support set_opp() customization without requiring to use regulators Dmitry Osipenko
2020-12-22  9:01   ` Viresh Kumar
2020-12-22 19:18     ` Dmitry Osipenko
2020-12-23  6:01   ` Viresh Kumar
2020-12-23 20:38     ` Dmitry Osipenko
2020-12-24  4:10       ` Viresh Kumar
2020-12-24 12:16         ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 16/48] opp: Handle missing OPP table in dev_pm_opp_xlate_performance_state() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 17/48] opp: Correct debug message in _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 18/48] opp: Print OPP level in debug message of _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 19/48] opp: Fix adding OPP entries in a wrong order if rate is unavailable Dmitry Osipenko
2020-12-22  9:12   ` Viresh Kumar
2020-12-22 19:19     ` Dmitry Osipenko
2020-12-23  4:34       ` Viresh Kumar
2020-12-23 20:36         ` Dmitry Osipenko
2020-12-24  6:28           ` Viresh Kumar
2020-12-24 12:14             ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 20/48] PM: domains: Make set_performance_state() callback optional Dmitry Osipenko
2021-01-11  9:10   ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 21/48] PM: domains: Add "performance" column to debug summary Dmitry Osipenko
2021-01-11  9:13   ` Ulf Hansson
2021-01-11 11:28     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 22/48] soc/tegra: pmc: Fix imbalanced clock disabling in error code path Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 23/48] soc/tegra: pmc: Pulse resets after removing power clamp Dmitry Osipenko
2020-12-30 14:56   ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 24/48] soc/tegra: pmc: Ensure that clock rates aren't too high Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 25/48] soc/tegra: pmc: Print out domain name when reset fails to acquire Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 26/48] soc/tegra: Add devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 27/48] soc/tegra: Add CONFIG_SOC_TEGRA_COMMON and select PM_OPP by default Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 28/48] soc/tegra: Introduce core power domain driver Dmitry Osipenko
2020-12-22  6:40   ` Viresh Kumar
2020-12-22 19:21     ` Dmitry Osipenko
2020-12-22 19:39       ` Dmitry Osipenko
2020-12-23  5:57         ` Viresh Kumar
2020-12-23 20:37           ` Dmitry Osipenko
2020-12-23 20:59             ` Dmitry Osipenko
2020-12-24  6:51             ` Viresh Kumar
2020-12-24 12:14               ` Dmitry Osipenko
2021-01-12 13:57   ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 29/48] soc/tegra: pmc: Link domains to the parent Core domain Dmitry Osipenko
2021-01-12 13:30   ` Ulf Hansson
2021-01-12 16:22     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 30/48] soc/tegra: regulators: Fix locking up when voltage-spread is out of range Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 31/48] soc/tegra: regulators: Support Core domain state syncing Dmitry Osipenko
2021-01-12 13:57   ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 32/48] clk: tegra: Support runtime PM, power domain and OPP Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 33/48] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 34/48] gpu: host1x: Support power management Dmitry Osipenko
2020-12-17 18:21   ` Mikko Perttunen
2020-12-17 18:45     ` Dmitry Osipenko
2020-12-17 20:58       ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 35/48] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-01-12 14:16   ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 36/48] drm/tegra: gr2d: Correct swapped device-tree compatibles Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 37/48] drm/tegra: gr2d: Support OPP and power management Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 38/48] drm/tegra: g3d: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 39/48] drm/tegra: vic: Stop channel before suspending Dmitry Osipenko
2020-12-17 18:06 ` Dmitry Osipenko [this message]
2020-12-17 18:06 ` [PATCH v2 41/48] memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-19 11:02   ` Krzysztof Kozlowski
2020-12-20 18:34     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 42/48] memory: tegra30-emc: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 43/48] ARM: tegra: Add OPP tables and power domains to Tegra20 device-tree Dmitry Osipenko
2020-12-22  5:47   ` Viresh Kumar
2020-12-22 19:24     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 44/48] ARM: tegra: Add OPP tables and power domains to Tegra30 device-tree Dmitry Osipenko
2020-12-22  9:14   ` Viresh Kumar
2020-12-22 19:25     ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 45/48] ARM: tegra: acer-a500: Enable core voltage scaling Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 46/48] ARM: tegra: ventana: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 47/48] ARM: tegra: ventana: Support CPU voltage scaling and thermal throttling Dmitry Osipenko
2020-12-17 18:28   ` Daniel Lezcano
2020-12-17 19:01     ` Dmitry Osipenko
2020-12-17 19:36       ` Daniel Lezcano
2020-12-17 20:28         ` Dmitry Osipenko
2020-12-17 21:19           ` Daniel Lezcano
2020-12-17 21:56             ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 48/48] ARM: tegra: cardhu: " Dmitry Osipenko
2020-12-17 18:28   ` Daniel Lezcano
2020-12-18  7:14 ` [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Viresh Kumar
2020-12-18 13:51   ` Dmitry Osipenko
2020-12-22  9:15     ` Viresh Kumar
2020-12-22 19:14       ` Dmitry Osipenko
2021-01-05 17:11 ` Krzysztof Kozlowski
2021-01-07 19:39   ` Dmitry Osipenko

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