From: Krzysztof Kozlowski <krzk@kernel.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Mark Brown <broonie@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Kevin Hilman <khilman@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Viresh Kumar <vireshk@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-media@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 07/48] dt-bindings: arm: tegra: Add binding for core power domain
Date: Sat, 19 Dec 2020 11:57:20 +0100 [thread overview]
Message-ID: <20201219105720.GA5323@kozik-lap> (raw)
In-Reply-To: <20201217180638.22748-8-digetx@gmail.com>
On Thu, Dec 17, 2020 at 09:05:57PM +0300, Dmitry Osipenko wrote:
> All NVIDIA Tegra SoCs have a core power domain where majority of hardware
> blocks reside. Add binding for the core power domain.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> .../arm/tegra/nvidia,tegra20-core-domain.yaml | 48 +++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
> new file mode 100644
> index 000000000000..f3d8fd2d8371
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-core-domain.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-core-domain.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Core Power Domain
> +
> +maintainers:
> + - Dmitry Osipenko <digetx@gmail.com>
> + - Jon Hunter <jonathanh@nvidia.com>
> + - Thierry Reding <thierry.reding@gmail.com>
> +
> +properties:
> + compatible:
> + enum:
> + - nvidia,tegra20-core-domain
> + - nvidia,tegra30-core-domain
The file should be in bindings/power.
Include also the power-domain.yaml schema.
> +
> + operating-points-v2:
> + description:
> + Should contain level, voltages and opp-supported-hw property.
> + The supported-hw is a bitfield indicating SoC speedo or process
> + ID mask.
> +
> + "#power-domain-cells":
> + const: 0
> +
> + power-supply:
> + description:
> + Phandle to voltage regulator connected to the SoC Core power rail.
> +
> +required:
> + - compatible
> + - operating-points-v2
> + - "#power-domain-cells"
> + - power-supply
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + core-domain {
power-domain (to follow schema and devicetree spec)
Best regards,
Krzysztof
> + compatible = "nvidia,tegra20-core-domain";
> + operating-points-v2 = <&opp_table>;
> + power-supply = <®ulator>;
> + #power-domain-cells = <0>;
> + };
> --
> 2.29.2
>
next prev parent reply other threads:[~2020-12-19 10:58 UTC|newest]
Thread overview: 127+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 18:05 [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 01/48] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain Dmitry Osipenko
2020-12-21 22:53 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 02/48] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-12-21 22:54 ` Rob Herring
2020-12-22 19:16 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 03/48] dt-bindings: memory: tegra124: " Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 04/48] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2020-12-22 0:09 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 05/48] media: dt: bindings: tegra-vde: " Dmitry Osipenko
2020-12-22 0:09 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 06/48] dt-bindings: clock: tegra: Document clocks sub-node Dmitry Osipenko
2020-12-22 0:14 ` Rob Herring
2020-12-22 19:16 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 07/48] dt-bindings: arm: tegra: Add binding for core power domain Dmitry Osipenko
2020-12-19 10:57 ` Krzysztof Kozlowski [this message]
2020-12-20 18:26 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 08/48] regulator: Make regulator_sync_voltage() usable by coupled regulators Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 09/48] opp: Add dev_pm_opp_sync_regulators() Dmitry Osipenko
2020-12-22 6:41 ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 10/48] opp: Add dev_pm_opp_set_voltage() Dmitry Osipenko
2020-12-22 6:41 ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 11/48] opp: Add dev_pm_opp_find_level_ceil() Dmitry Osipenko
2020-12-22 6:42 ` Viresh Kumar
2020-12-22 19:15 ` Dmitry Osipenko
2020-12-23 4:19 ` Viresh Kumar
2020-12-23 20:37 ` Dmitry Osipenko
2020-12-24 6:43 ` Viresh Kumar
2020-12-24 13:00 ` Dmitry Osipenko
2020-12-28 6:22 ` Viresh Kumar
2020-12-28 14:03 ` Dmitry Osipenko
2020-12-30 4:46 ` Viresh Kumar
2020-12-30 14:02 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 12/48] opp: Add dev_pm_opp_get_required_pstate() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 13/48] opp: Add resource-managed versions of OPP API functions Dmitry Osipenko
2020-12-22 8:55 ` Viresh Kumar
2020-12-22 19:14 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 14/48] opp: Filter out OPPs based on availability of a required-OPP Dmitry Osipenko
2020-12-22 8:59 ` Viresh Kumar
2020-12-22 19:17 ` Dmitry Osipenko
2020-12-23 4:22 ` Viresh Kumar
2020-12-23 20:48 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 15/48] opp: Support set_opp() customization without requiring to use regulators Dmitry Osipenko
2020-12-22 9:01 ` Viresh Kumar
2020-12-22 19:18 ` Dmitry Osipenko
2020-12-23 6:01 ` Viresh Kumar
2020-12-23 20:38 ` Dmitry Osipenko
2020-12-24 4:10 ` Viresh Kumar
2020-12-24 12:16 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 16/48] opp: Handle missing OPP table in dev_pm_opp_xlate_performance_state() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 17/48] opp: Correct debug message in _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 18/48] opp: Print OPP level in debug message of _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 19/48] opp: Fix adding OPP entries in a wrong order if rate is unavailable Dmitry Osipenko
2020-12-22 9:12 ` Viresh Kumar
2020-12-22 19:19 ` Dmitry Osipenko
2020-12-23 4:34 ` Viresh Kumar
2020-12-23 20:36 ` Dmitry Osipenko
2020-12-24 6:28 ` Viresh Kumar
2020-12-24 12:14 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 20/48] PM: domains: Make set_performance_state() callback optional Dmitry Osipenko
2021-01-11 9:10 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 21/48] PM: domains: Add "performance" column to debug summary Dmitry Osipenko
2021-01-11 9:13 ` Ulf Hansson
2021-01-11 11:28 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 22/48] soc/tegra: pmc: Fix imbalanced clock disabling in error code path Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 23/48] soc/tegra: pmc: Pulse resets after removing power clamp Dmitry Osipenko
2020-12-30 14:56 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 24/48] soc/tegra: pmc: Ensure that clock rates aren't too high Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 25/48] soc/tegra: pmc: Print out domain name when reset fails to acquire Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 26/48] soc/tegra: Add devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 27/48] soc/tegra: Add CONFIG_SOC_TEGRA_COMMON and select PM_OPP by default Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 28/48] soc/tegra: Introduce core power domain driver Dmitry Osipenko
2020-12-22 6:40 ` Viresh Kumar
2020-12-22 19:21 ` Dmitry Osipenko
2020-12-22 19:39 ` Dmitry Osipenko
2020-12-23 5:57 ` Viresh Kumar
2020-12-23 20:37 ` Dmitry Osipenko
2020-12-23 20:59 ` Dmitry Osipenko
2020-12-24 6:51 ` Viresh Kumar
2020-12-24 12:14 ` Dmitry Osipenko
2021-01-12 13:57 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 29/48] soc/tegra: pmc: Link domains to the parent Core domain Dmitry Osipenko
2021-01-12 13:30 ` Ulf Hansson
2021-01-12 16:22 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 30/48] soc/tegra: regulators: Fix locking up when voltage-spread is out of range Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 31/48] soc/tegra: regulators: Support Core domain state syncing Dmitry Osipenko
2021-01-12 13:57 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 32/48] clk: tegra: Support runtime PM, power domain and OPP Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 33/48] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 34/48] gpu: host1x: Support power management Dmitry Osipenko
2020-12-17 18:21 ` Mikko Perttunen
2020-12-17 18:45 ` Dmitry Osipenko
2020-12-17 20:58 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 35/48] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-01-12 14:16 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 36/48] drm/tegra: gr2d: Correct swapped device-tree compatibles Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 37/48] drm/tegra: gr2d: Support OPP and power management Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 38/48] drm/tegra: g3d: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 39/48] drm/tegra: vic: Stop channel before suspending Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 40/48] media: staging: tegra-vde: Support OPP and generic power domain Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 41/48] memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-19 11:02 ` Krzysztof Kozlowski
2020-12-20 18:34 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 42/48] memory: tegra30-emc: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 43/48] ARM: tegra: Add OPP tables and power domains to Tegra20 device-tree Dmitry Osipenko
2020-12-22 5:47 ` Viresh Kumar
2020-12-22 19:24 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 44/48] ARM: tegra: Add OPP tables and power domains to Tegra30 device-tree Dmitry Osipenko
2020-12-22 9:14 ` Viresh Kumar
2020-12-22 19:25 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 45/48] ARM: tegra: acer-a500: Enable core voltage scaling Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 46/48] ARM: tegra: ventana: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 47/48] ARM: tegra: ventana: Support CPU voltage scaling and thermal throttling Dmitry Osipenko
2020-12-17 18:28 ` Daniel Lezcano
2020-12-17 19:01 ` Dmitry Osipenko
2020-12-17 19:36 ` Daniel Lezcano
2020-12-17 20:28 ` Dmitry Osipenko
2020-12-17 21:19 ` Daniel Lezcano
2020-12-17 21:56 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 48/48] ARM: tegra: cardhu: " Dmitry Osipenko
2020-12-17 18:28 ` Daniel Lezcano
2020-12-18 7:14 ` [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Viresh Kumar
2020-12-18 13:51 ` Dmitry Osipenko
2020-12-22 9:15 ` Viresh Kumar
2020-12-22 19:14 ` Dmitry Osipenko
2021-01-05 17:11 ` Krzysztof Kozlowski
2021-01-07 19:39 ` Dmitry Osipenko
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