From: Mikko Perttunen <cyndis@kapsi.fi>
To: Dmitry Osipenko <digetx@gmail.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Mark Brown <broonie@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Kevin Hilman <khilman@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Viresh Kumar <vireshk@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-media@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 34/48] gpu: host1x: Support power management
Date: Thu, 17 Dec 2020 20:21:23 +0200 [thread overview]
Message-ID: <cb8dca7c-6ef2-5116-6c04-816a63525e2e@kapsi.fi> (raw)
In-Reply-To: <20201217180638.22748-35-digetx@gmail.com>
On 12/17/20 8:06 PM, Dmitry Osipenko wrote:
> Add suspend/resume and generic power domain support to the Host1x driver.
> This is required for enabling system-wide DVFS and supporting dynamic
> power management using a generic power domain.
>
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/gpu/host1x/dev.c | 102 ++++++++++++++++++++++++++++++++++-----
> 1 file changed, 91 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
> index d0ebb70e2fdd..c1525cffe7b1 100644
> --- a/drivers/gpu/host1x/dev.c
> +++ b/drivers/gpu/host1x/dev.c
> @@ -12,6 +12,7 @@
> #include <linux/module.h>
> #include <linux/of_device.h>
> #include <linux/of.h>
> +#include <linux/pm_runtime.h>
> #include <linux/slab.h>
>
> #define CREATE_TRACE_POINTS
> @@ -417,7 +418,7 @@ static int host1x_probe(struct platform_device *pdev)
> return err;
> }
>
> - host->rst = devm_reset_control_get(&pdev->dev, "host1x");
> + host->rst = devm_reset_control_get_exclusive_released(&pdev->dev, "host1x");
> if (IS_ERR(host->rst)) {
> err = PTR_ERR(host->rst);
> dev_err(&pdev->dev, "failed to get reset: %d\n", err);
> @@ -437,16 +438,15 @@ static int host1x_probe(struct platform_device *pdev)
> goto iommu_exit;
> }
>
> - err = clk_prepare_enable(host->clk);
> - if (err < 0) {
> - dev_err(&pdev->dev, "failed to enable clock\n");
> - goto free_channels;
> - }
> + pm_runtime_enable(&pdev->dev);
> + err = pm_runtime_get_sync(&pdev->dev);
> + if (err < 0)
> + goto rpm_disable;
>
> err = reset_control_deassert(host->rst);
> if (err < 0) {
> dev_err(&pdev->dev, "failed to deassert reset: %d\n", err);
> - goto unprepare_disable;
> + goto rpm_disable;
> }
>
> err = host1x_syncpt_init(host);
> @@ -485,9 +485,10 @@ static int host1x_probe(struct platform_device *pdev)
> host1x_syncpt_deinit(host);
> reset_assert:
> reset_control_assert(host->rst);
> -unprepare_disable:
> - clk_disable_unprepare(host->clk);
> -free_channels:
> +rpm_disable:
> + pm_runtime_put(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> +
> host1x_channel_list_free(&host->channel_list);
> iommu_exit:
> host1x_iommu_exit(host);
> @@ -504,16 +505,95 @@ static int host1x_remove(struct platform_device *pdev)
> host1x_intr_deinit(host);
> host1x_syncpt_deinit(host);
> reset_control_assert(host->rst);
> - clk_disable_unprepare(host->clk);
> + pm_runtime_put(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> host1x_iommu_exit(host);
>
> return 0;
> }
>
> +static int __maybe_unused host1x_runtime_suspend(struct device *dev)
> +{
> + struct host1x *host = dev_get_drvdata(dev);
> +
> + clk_disable_unprepare(host->clk);
> + reset_control_release(host->rst);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused host1x_runtime_resume(struct device *dev)
> +{
> + struct host1x *host = dev_get_drvdata(dev);
> + int err;
> +
> + err = reset_control_acquire(host->rst);
> + if (err) {
> + dev_err(dev, "failed to acquire reset: %d\n", err);
> + return err;
> + }
> +
> + err = clk_prepare_enable(host->clk);
> + if (err) {
> + dev_err(dev, "failed to enable clock: %d\n", err);
> + goto release_reset;
> + }
> +
> + return 0;
> +
> +release_reset:
> + reset_control_release(host->rst);
> +
> + return err;
> +}
> +
> +static __maybe_unused int host1x_suspend(struct device *dev)
> +{
> + struct host1x *host = dev_get_drvdata(dev);
> + int err;
> +
> + host1x_syncpt_save(host);
> +
> + err = pm_runtime_force_suspend(dev);
> + if (err < 0)
> + return err;
> +
> + return 0;
> +}
> +
> +static __maybe_unused int host1x_resume(struct device *dev)
> +{
> + struct host1x *host = dev_get_drvdata(dev);
> + struct host1x_channel *channel;
> + unsigned int index;
> + int err;
> +
> + err = pm_runtime_force_resume(dev);
> + if (err < 0)
> + return err;
> +
> + host1x_syncpt_restore(host);
We also need to execute 'host1x_setup_sid_table' upon resume.
cheers,
Mikko
> +
> + for_each_set_bit(index, host->channel_list.allocated_channels,
> + host->info->nb_channels) {
> + channel = &host->channel_list.channels[index];
> + host1x_hw_channel_init(host, channel, channel->id);
> + }
> +
> + return 0;
> +}
> +
> +static const struct dev_pm_ops host1x_pm = {
> + SET_RUNTIME_PM_OPS(host1x_runtime_suspend, host1x_runtime_resume,
> + NULL)
> + SET_SYSTEM_SLEEP_PM_OPS(host1x_suspend, host1x_resume)
> +};
> +
> static struct platform_driver tegra_host1x_driver = {
> .driver = {
> .name = "tegra-host1x",
> .of_match_table = host1x_of_match,
> + .pm = &host1x_pm,
> },
> .probe = host1x_probe,
> .remove = host1x_remove,
>
next prev parent reply other threads:[~2020-12-17 18:22 UTC|newest]
Thread overview: 127+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 18:05 [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 01/48] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain Dmitry Osipenko
2020-12-21 22:53 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 02/48] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-12-21 22:54 ` Rob Herring
2020-12-22 19:16 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 03/48] dt-bindings: memory: tegra124: " Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 04/48] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2020-12-22 0:09 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 05/48] media: dt: bindings: tegra-vde: " Dmitry Osipenko
2020-12-22 0:09 ` Rob Herring
2020-12-17 18:05 ` [PATCH v2 06/48] dt-bindings: clock: tegra: Document clocks sub-node Dmitry Osipenko
2020-12-22 0:14 ` Rob Herring
2020-12-22 19:16 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 07/48] dt-bindings: arm: tegra: Add binding for core power domain Dmitry Osipenko
2020-12-19 10:57 ` Krzysztof Kozlowski
2020-12-20 18:26 ` Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 08/48] regulator: Make regulator_sync_voltage() usable by coupled regulators Dmitry Osipenko
2020-12-17 18:05 ` [PATCH v2 09/48] opp: Add dev_pm_opp_sync_regulators() Dmitry Osipenko
2020-12-22 6:41 ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 10/48] opp: Add dev_pm_opp_set_voltage() Dmitry Osipenko
2020-12-22 6:41 ` Viresh Kumar
2020-12-17 18:06 ` [PATCH v2 11/48] opp: Add dev_pm_opp_find_level_ceil() Dmitry Osipenko
2020-12-22 6:42 ` Viresh Kumar
2020-12-22 19:15 ` Dmitry Osipenko
2020-12-23 4:19 ` Viresh Kumar
2020-12-23 20:37 ` Dmitry Osipenko
2020-12-24 6:43 ` Viresh Kumar
2020-12-24 13:00 ` Dmitry Osipenko
2020-12-28 6:22 ` Viresh Kumar
2020-12-28 14:03 ` Dmitry Osipenko
2020-12-30 4:46 ` Viresh Kumar
2020-12-30 14:02 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 12/48] opp: Add dev_pm_opp_get_required_pstate() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 13/48] opp: Add resource-managed versions of OPP API functions Dmitry Osipenko
2020-12-22 8:55 ` Viresh Kumar
2020-12-22 19:14 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 14/48] opp: Filter out OPPs based on availability of a required-OPP Dmitry Osipenko
2020-12-22 8:59 ` Viresh Kumar
2020-12-22 19:17 ` Dmitry Osipenko
2020-12-23 4:22 ` Viresh Kumar
2020-12-23 20:48 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 15/48] opp: Support set_opp() customization without requiring to use regulators Dmitry Osipenko
2020-12-22 9:01 ` Viresh Kumar
2020-12-22 19:18 ` Dmitry Osipenko
2020-12-23 6:01 ` Viresh Kumar
2020-12-23 20:38 ` Dmitry Osipenko
2020-12-24 4:10 ` Viresh Kumar
2020-12-24 12:16 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 16/48] opp: Handle missing OPP table in dev_pm_opp_xlate_performance_state() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 17/48] opp: Correct debug message in _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 18/48] opp: Print OPP level in debug message of _opp_add_static_v2() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 19/48] opp: Fix adding OPP entries in a wrong order if rate is unavailable Dmitry Osipenko
2020-12-22 9:12 ` Viresh Kumar
2020-12-22 19:19 ` Dmitry Osipenko
2020-12-23 4:34 ` Viresh Kumar
2020-12-23 20:36 ` Dmitry Osipenko
2020-12-24 6:28 ` Viresh Kumar
2020-12-24 12:14 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 20/48] PM: domains: Make set_performance_state() callback optional Dmitry Osipenko
2021-01-11 9:10 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 21/48] PM: domains: Add "performance" column to debug summary Dmitry Osipenko
2021-01-11 9:13 ` Ulf Hansson
2021-01-11 11:28 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 22/48] soc/tegra: pmc: Fix imbalanced clock disabling in error code path Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 23/48] soc/tegra: pmc: Pulse resets after removing power clamp Dmitry Osipenko
2020-12-30 14:56 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 24/48] soc/tegra: pmc: Ensure that clock rates aren't too high Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 25/48] soc/tegra: pmc: Print out domain name when reset fails to acquire Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 26/48] soc/tegra: Add devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 27/48] soc/tegra: Add CONFIG_SOC_TEGRA_COMMON and select PM_OPP by default Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 28/48] soc/tegra: Introduce core power domain driver Dmitry Osipenko
2020-12-22 6:40 ` Viresh Kumar
2020-12-22 19:21 ` Dmitry Osipenko
2020-12-22 19:39 ` Dmitry Osipenko
2020-12-23 5:57 ` Viresh Kumar
2020-12-23 20:37 ` Dmitry Osipenko
2020-12-23 20:59 ` Dmitry Osipenko
2020-12-24 6:51 ` Viresh Kumar
2020-12-24 12:14 ` Dmitry Osipenko
2021-01-12 13:57 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 29/48] soc/tegra: pmc: Link domains to the parent Core domain Dmitry Osipenko
2021-01-12 13:30 ` Ulf Hansson
2021-01-12 16:22 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 30/48] soc/tegra: regulators: Fix locking up when voltage-spread is out of range Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 31/48] soc/tegra: regulators: Support Core domain state syncing Dmitry Osipenko
2021-01-12 13:57 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 32/48] clk: tegra: Support runtime PM, power domain and OPP Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 33/48] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 34/48] gpu: host1x: Support power management Dmitry Osipenko
2020-12-17 18:21 ` Mikko Perttunen [this message]
2020-12-17 18:45 ` Dmitry Osipenko
2020-12-17 20:58 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 35/48] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-01-12 14:16 ` Ulf Hansson
2020-12-17 18:06 ` [PATCH v2 36/48] drm/tegra: gr2d: Correct swapped device-tree compatibles Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 37/48] drm/tegra: gr2d: Support OPP and power management Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 38/48] drm/tegra: g3d: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 39/48] drm/tegra: vic: Stop channel before suspending Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 40/48] media: staging: tegra-vde: Support OPP and generic power domain Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 41/48] memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2020-12-19 11:02 ` Krzysztof Kozlowski
2020-12-20 18:34 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 42/48] memory: tegra30-emc: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 43/48] ARM: tegra: Add OPP tables and power domains to Tegra20 device-tree Dmitry Osipenko
2020-12-22 5:47 ` Viresh Kumar
2020-12-22 19:24 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 44/48] ARM: tegra: Add OPP tables and power domains to Tegra30 device-tree Dmitry Osipenko
2020-12-22 9:14 ` Viresh Kumar
2020-12-22 19:25 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 45/48] ARM: tegra: acer-a500: Enable core voltage scaling Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 46/48] ARM: tegra: ventana: " Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 47/48] ARM: tegra: ventana: Support CPU voltage scaling and thermal throttling Dmitry Osipenko
2020-12-17 18:28 ` Daniel Lezcano
2020-12-17 19:01 ` Dmitry Osipenko
2020-12-17 19:36 ` Daniel Lezcano
2020-12-17 20:28 ` Dmitry Osipenko
2020-12-17 21:19 ` Daniel Lezcano
2020-12-17 21:56 ` Dmitry Osipenko
2020-12-17 18:06 ` [PATCH v2 48/48] ARM: tegra: cardhu: " Dmitry Osipenko
2020-12-17 18:28 ` Daniel Lezcano
2020-12-18 7:14 ` [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Viresh Kumar
2020-12-18 13:51 ` Dmitry Osipenko
2020-12-22 9:15 ` Viresh Kumar
2020-12-22 19:14 ` Dmitry Osipenko
2021-01-05 17:11 ` Krzysztof Kozlowski
2021-01-07 19:39 ` Dmitry Osipenko
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