* [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system
2020-12-30 21:22 [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
@ 2020-12-30 21:22 ` Bert Vermeulen
2021-01-05 10:20 ` Thomas Bogendoerfer
2020-12-30 21:22 ` [PATCH v3 3/4] dt-bindings: Add Cisco prefix to vendor list Bert Vermeulen
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Bert Vermeulen @ 2020-12-30 21:22 UTC (permalink / raw)
To: Thomas Bogendoerfer, Rob Herring, Sander Vanheule, linux-mips,
linux-kernel, devicetree
Cc: Bert Vermeulen
This is just enough system to boot the kernel with earlycon working.
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
arch/mips/Kconfig | 21 ++++++++++++++++++
arch/mips/generic/Platform | 1 +
arch/mips/include/asm/realtek/ioremap.h | 29 +++++++++++++++++++++++++
3 files changed, 51 insertions(+)
create mode 100644 arch/mips/include/asm/realtek/ioremap.h
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 0a17bedf4f0d..0986d0c4405f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -627,6 +627,27 @@ config RALINK
select ARCH_HAS_RESET_CONTROLLER
select RESET_CONTROLLER
+config MACH_REALTEK_RTL
+ bool "Realtek RTL838x/RTL839x based machines"
+ select MIPS_GENERIC
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
+ select CSRC_R4K
+ select CEVT_R4K
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_MIPS16
+ select SYS_SUPPORTS_MULTITHREADING
+ select SYS_SUPPORTS_VPE_LOADER
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_HAS_EARLY_PRINTK_8250
+ select USE_GENERIC_EARLY_PRINTK_8250
+ select BOOT_RAW
+ select PINCTRL
+ select USE_OF
+
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC_MEMORY
diff --git a/arch/mips/generic/Platform b/arch/mips/generic/Platform
index b871af16b5b6..5dff52295b0a 100644
--- a/arch/mips/generic/Platform
+++ b/arch/mips/generic/Platform
@@ -10,6 +10,7 @@
# Note: order matters, keep the asm/mach-generic include last.
cflags-$(CONFIG_MACH_INGENIC_SOC) += -I$(srctree)/arch/mips/include/asm/mach-ingenic
+cflags-$(CONFIG_MACH_REALTEK_RTL) += -I$(srctree)/arch/mips/include/asm/realtek
cflags-$(CONFIG_MIPS_GENERIC) += -I$(srctree)/arch/mips/include/asm/mach-generic
load-$(CONFIG_MIPS_GENERIC) += 0xffffffff80100000
diff --git a/arch/mips/include/asm/realtek/ioremap.h b/arch/mips/include/asm/realtek/ioremap.h
new file mode 100644
index 000000000000..ea51af023e26
--- /dev/null
+++ b/arch/mips/include/asm/realtek/ioremap.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _REALTEK_RTL_IOREMAP_H_
+#define _REALTEK_RTL_IOREMAP_H_
+
+static inline int is_rtl8380_internal_registers(phys_addr_t offset)
+{
+ /* IO Block */
+ if (offset >= 0xb8000000 && offset < 0xb9000000)
+ return 1;
+ /* Switch block */
+ if (offset >= 0xbb000000 && offset < 0xbc000000)
+ return 1;
+ return 0;
+}
+
+static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
+ unsigned long flags)
+{
+ if (is_rtl8380_internal_registers(offset))
+ return (void __iomem *)offset;
+ return NULL;
+}
+
+static inline int plat_iounmap(const volatile void __iomem *addr)
+{
+ return is_rtl8380_internal_registers((unsigned long)addr);
+}
+
+#endif /* _REALTEK_RTL_IOREMAP_H_ */
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system
2020-12-30 21:22 ` [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system Bert Vermeulen
@ 2021-01-05 10:20 ` Thomas Bogendoerfer
0 siblings, 0 replies; 8+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 10:20 UTC (permalink / raw)
To: Bert Vermeulen
Cc: Rob Herring, Sander Vanheule, linux-mips, linux-kernel, devicetree
On Wed, Dec 30, 2020 at 10:22:03PM +0100, Bert Vermeulen wrote:
> This is just enough system to boot the kernel with earlycon working.
>
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Signed-off-by: Sander Vanheule <sander@svanheule.net>
> ---
> arch/mips/Kconfig | 21 ++++++++++++++++++
> arch/mips/generic/Platform | 1 +
> arch/mips/include/asm/realtek/ioremap.h | 29 +++++++++++++++++++++++++
> 3 files changed, 51 insertions(+)
> create mode 100644 arch/mips/include/asm/realtek/ioremap.h
> [..]
> diff --git a/arch/mips/include/asm/realtek/ioremap.h b/arch/mips/include/asm/realtek/ioremap.h
> new file mode 100644
> index 000000000000..ea51af023e26
> --- /dev/null
> +++ b/arch/mips/include/asm/realtek/ioremap.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef _REALTEK_RTL_IOREMAP_H_
> +#define _REALTEK_RTL_IOREMAP_H_
> +
> +static inline int is_rtl8380_internal_registers(phys_addr_t offset)
> +{
> + /* IO Block */
> + if (offset >= 0xb8000000 && offset < 0xb9000000)
> + return 1;
> + /* Switch block */
> + if (offset >= 0xbb000000 && offset < 0xbc000000)
> + return 1;
> + return 0;
> +}
> +
> +static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
> + unsigned long flags)
> +{
> + if (is_rtl8380_internal_registers(offset))
> + return (void __iomem *)offset;
> + return NULL;
> +}
> +
> +static inline int plat_iounmap(const volatile void __iomem *addr)
> +{
> + return is_rtl8380_internal_registers((unsigned long)addr);
> +}
> +
> +#endif /* _REALTEK_RTL_IOREMAP_H_ */
this looks like papering over using KSEG1 addresses instead of
physical addresses in your DT. You should be able to drop this file
and use 0x18000000/0x1B000000 instead of 0xb8000000/0xbb000000
in the DT file.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 3/4] dt-bindings: Add Cisco prefix to vendor list
2020-12-30 21:22 [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
2020-12-30 21:22 ` [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system Bert Vermeulen
@ 2020-12-30 21:22 ` Bert Vermeulen
2021-01-11 22:01 ` Rob Herring
2020-12-30 21:22 ` [PATCH v3 4/4] dts: Add support for Cisco SG220-26 switch Bert Vermeulen
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Bert Vermeulen @ 2020-12-30 21:22 UTC (permalink / raw)
To: Thomas Bogendoerfer, Rob Herring, Sander Vanheule, linux-mips,
linux-kernel, devicetree
Cc: Bert Vermeulen
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 041ae90b0d8f..e6e3a51fc2e3 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -229,6 +229,8 @@ patternProperties:
description: Computadora Industrial Abierta Argentina
"^cirrus,.*":
description: Cirrus Logic, Inc.
+ "^cisco,.*":
+ description: Cisco Systems, Inc.
"^cloudengines,.*":
description: Cloud Engines, Inc.
"^cnm,.*":
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 4/4] dts: Add support for Cisco SG220-26 switch
2020-12-30 21:22 [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
2020-12-30 21:22 ` [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system Bert Vermeulen
2020-12-30 21:22 ` [PATCH v3 3/4] dt-bindings: Add Cisco prefix to vendor list Bert Vermeulen
@ 2020-12-30 21:22 ` Bert Vermeulen
2020-12-30 21:26 ` [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
2021-01-11 21:59 ` Rob Herring
4 siblings, 0 replies; 8+ messages in thread
From: Bert Vermeulen @ 2020-12-30 21:22 UTC (permalink / raw)
To: Thomas Bogendoerfer, Rob Herring, Sander Vanheule, linux-mips,
linux-kernel, devicetree
Cc: Bert Vermeulen
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
arch/mips/Kconfig | 10 +++
arch/mips/boot/dts/realtek/Makefile | 2 +
arch/mips/boot/dts/realtek/cisco_sg220-26.dts | 81 +++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 arch/mips/boot/dts/realtek/Makefile
create mode 100644 arch/mips/boot/dts/realtek/cisco_sg220-26.dts
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 0986d0c4405f..a398416842ca 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1055,6 +1055,16 @@ config NLM_XLP_BOARD
endchoice
+if MACH_REALTEK_RTL
+choice
+ prompt "Realtek RTL838x/RTL839x-based switch"
+ optional
+
+ config DT_CISCO_SG220_26
+ bool "Cisco SG220-26"
+endchoice
+endif
+
source "arch/mips/alchemy/Kconfig"
source "arch/mips/ath25/Kconfig"
source "arch/mips/ath79/Kconfig"
diff --git a/arch/mips/boot/dts/realtek/Makefile b/arch/mips/boot/dts/realtek/Makefile
new file mode 100644
index 000000000000..f0a3e5816767
--- /dev/null
+++ b/arch/mips/boot/dts/realtek/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_DT_CISCO_SG220_26) += cisco_sg220-26.dtb
diff --git a/arch/mips/boot/dts/realtek/cisco_sg220-26.dts b/arch/mips/boot/dts/realtek/cisco_sg220-26.dts
new file mode 100644
index 000000000000..5d8ba3df95aa
--- /dev/null
+++ b/arch/mips/boot/dts/realtek/cisco_sg220-26.dts
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
+
+/dts-v1/;
+
+#include "rtl83xx.dtsi"
+#include "rtl838x.dtsi"
+
+/ {
+ model = "Cisco SG220-26";
+ compatible = "cisco,sg220-26", "realtek,rtl8382-soc";
+
+ chosen {
+ stdout-path = "serial0:9600n8";
+ bootargs = "earlycon console=ttyS0,9600";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <10000000>;
+ reg = <0>;
+ m25p,fast-read;
+ broken-flash-reset;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ loader: partition@0 {
+ label = "boot";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ bdinfo: partition@80000 {
+ label = "bdinfo";
+ reg = <0x80000 0x10000>;
+ read-only;
+ };
+
+ sysinfo: partition@90000 {
+ label = "sysinfo";
+ reg = <0x90000 0x10000>;
+ read-only;
+ };
+
+ jffs2_cfg: partition@a0000 {
+ label = "jffs2 cfg";
+ reg = <0xa0000 0x400000>;
+ };
+
+ jffs2_log: partition@4a0000 {
+ label = "jffs2 log";
+ reg = <0x4a0000 0x100000>;
+ };
+
+ runtime: partition@5a0000 {
+ label = "runtime";
+ reg = <0x5a0000 0xd30000>;
+ };
+
+ runtime2: partition@12d0000 {
+ label = "runtime2";
+ reg = <0x12d0000 0xd30000>;
+ };
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs
2020-12-30 21:22 [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
` (2 preceding siblings ...)
2020-12-30 21:22 ` [PATCH v3 4/4] dts: Add support for Cisco SG220-26 switch Bert Vermeulen
@ 2020-12-30 21:26 ` Bert Vermeulen
2021-01-11 21:59 ` Rob Herring
4 siblings, 0 replies; 8+ messages in thread
From: Bert Vermeulen @ 2020-12-30 21:26 UTC (permalink / raw)
To: Thomas Bogendoerfer, Rob Herring, Sander Vanheule, linux-mips,
linux-kernel, devicetree
Cc: Birger Koblitz, John Crispin
On 12/30/20 10:22 PM, Bert Vermeulen wrote:
> The RTL838x/839x family of SoCs are Realtek switches with an embedded
> MIPS core.
Oops, forgot patch version note:
v3:
- all code removed, the base system is now only device tree files and docs
and some build config.
- ioremap.h restored to the v1 version, with hardcoded I/O ranges, since I
got flak on changing that as suggested. This brings it in line with other
systems in arch/mips/generic.
--
Bert Vermeulen
bert@biot.com
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs
2020-12-30 21:22 [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
` (3 preceding siblings ...)
2020-12-30 21:26 ` [PATCH v3 1/4] Add support for Realtek RTL838x/RTL839x switch SoCs Bert Vermeulen
@ 2021-01-11 21:59 ` Rob Herring
4 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-01-11 21:59 UTC (permalink / raw)
To: Bert Vermeulen
Cc: Thomas Bogendoerfer, Sander Vanheule, linux-mips, linux-kernel,
devicetree, Birger Koblitz, John Crispin
On Wed, Dec 30, 2020 at 10:22:02PM +0100, Bert Vermeulen wrote:
> The RTL838x/839x family of SoCs are Realtek switches with an embedded
> MIPS core.
>
> * RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features
> * RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features
>
> These switches, depending on the exact part number, will have anywhere
> between 8 and 50 ports. The MIPS core is wired to a switch cpu port which
> has a tagging feature allowing us to make use of the DSA subsystem.
> The SoCs are somewhat basic in certain areas, getting better with more
> advanced features on newer series.
>
> The switch functionality is MMIO-mapped via a large MFD region.
>
> The SoCs have the following peripherals
> * ethernet
> * switch
> * uart - ns16550a
> * spi-flash interface
> * gpio
> * wdt
> * led
>
> The code was derived from various vendor SDKs based on Linux v2.6
> kernels.
>
> This patchset allows us to boot RTL838x/RTL839x units with basic support.
> Most of the other drivers are already written and functional, and work to
> get them upstream is already in progress.
>
> Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Sander Vanheule <sander@svanheule.net>
> ---
> .../devicetree/bindings/mips/realtek-rtl.yaml | 24 ++++++
Generally, this should be a separate patch.
> arch/mips/boot/dts/Makefile | 1 +
> arch/mips/boot/dts/realtek/rtl838x.dtsi | 21 +++++
> arch/mips/boot/dts/realtek/rtl839x.dtsi | 21 +++++
> arch/mips/boot/dts/realtek/rtl83xx.dtsi | 83 +++++++++++++++++++
> 5 files changed, 150 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mips/realtek-rtl.yaml
> create mode 100644 arch/mips/boot/dts/realtek/rtl838x.dtsi
> create mode 100644 arch/mips/boot/dts/realtek/rtl839x.dtsi
> create mode 100644 arch/mips/boot/dts/realtek/rtl83xx.dtsi
>
> diff --git a/Documentation/devicetree/bindings/mips/realtek-rtl.yaml b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml
> new file mode 100644
> index 000000000000..aadff8ce0f49
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml
> @@ -0,0 +1,24 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Realtek RTL83xx/93xx SoC series device tree bindings
> +
> +maintainers:
> + - Bert Vermeulen <bert@biot.com>
> + - Sander Vanheule <sander@svanheule.net>
> +
> +properties:
> + $nodename:
> + const: "/"
> + compatible:
> + oneOf:
> + # RTL8382-based boards
> + - items:
> + - enum:
> + - cisco,sg220-26
> + - const: realtek,rtl8382-soc
> +
> +additionalProperties: true
> diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
> index 0259238d7a2e..60bd7d2a9ad8 100644
> --- a/arch/mips/boot/dts/Makefile
> +++ b/arch/mips/boot/dts/Makefile
> @@ -14,6 +14,7 @@ subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni
> subdir-$(CONFIG_MACH_PIC32) += pic32
> subdir-$(CONFIG_ATH79) += qca
> subdir-$(CONFIG_RALINK) += ralink
> +subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek
> subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga
>
> obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
> diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi
> new file mode 100644
> index 000000000000..6cc4ff5c0d19
> --- /dev/null
> +++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +
> +/ {
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + compatible = "mips,mips4KEc";
> + reg = <0>;
> + clocks = <&baseclk 0>;
> + clock-names = "cpu";
> + };
> + };
> +
> + baseclk: baseclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <500000000>;
> + };
> +};
> diff --git a/arch/mips/boot/dts/realtek/rtl839x.dtsi b/arch/mips/boot/dts/realtek/rtl839x.dtsi
> new file mode 100644
> index 000000000000..2b5bad8fcf2f
> --- /dev/null
> +++ b/arch/mips/boot/dts/realtek/rtl839x.dtsi
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +
> +/ {
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + compatible = "mips,mips34Kc";
> + reg = <0>;
> + clocks = <&baseclk 0>;
> + clock-names = "cpu";
> + };
> + };
> +
> + baseclk: baseclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <500000000>;
> + };
> +};
> diff --git a/arch/mips/boot/dts/realtek/rtl83xx.dtsi b/arch/mips/boot/dts/realtek/rtl83xx.dtsi
> new file mode 100644
> index 000000000000..17fa90002e00
> --- /dev/null
> +++ b/arch/mips/boot/dts/realtek/rtl83xx.dtsi
> @@ -0,0 +1,83 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + aliases {
> + serial0 = &uart0;
> + serial1 = &uart1;
> + };
> +
> + cpuintc: cpuintc {
> + compatible = "mti,cpu-interrupt-controller";
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0xb8000000 0x10000>;
> +
> + spi: spi@1200 {
> + compatible = "realtek,rtl-spi";
Not documented. Needs to have an SoC specific compatible.
> + reg = <0x1200 0x100>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> + uart0: uart@2000 {
serial@2000
Build the dtb with W=1 and run 'make dtbs_check' and fix any warnings.
The above issue should show up.
> + compatible = "ns16550a";
No quirks for this? Best to have a more specific compatible in case you
do.
> + reg = <0x2000 0x100>;
> +
> + clock-frequency = <200000000>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <31>;
> +
> + reg-io-width = <1>;
> + reg-shift = <2>;
> + fifo-size = <1>;
> + no-loopback-test;
> +
> + status = "disabled";
> + };
> +
> + uart1: uart@2100 {
> + compatible = "ns16550a";
> + reg = <0x2100 0x100>;
> +
> + clock-frequency = <200000000>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <30>;
> +
> + reg-io-width = <1>;
> + reg-shift = <2>;
> + fifo-size = <1>;
> + no-loopback-test;
> +
> + status = "disabled";
> + };
> +
> + intc: interrupt-controller@3000 {
> + compatible = "realtek,rtl-intc";
Not documented.
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0x3000 0x20>;
> + };
> + };
> +
> + switch_bus: switch-bus@bb000000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0xbb000000 0x10000>;
> + };
> +};
> --
> 2.25.1
>
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