[PATCH 0/5] v3u: enable I2C0-6

[PATCH 0/5] v3u: enable I2C0-6

[Wolfram Sang]

These patches are needed to enable I2C on the Falcon board for the V3U.
Patch #5 is only for demonstration purposes. The series depends on my
RWDT series, Ulrich's PFC v2 series and Geert's DMA placeholder. A
branch can be found here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/v3u/i2c

There is also a series in-flight to handle spurious interrupts on the
V3U. Because I have never seen one, I wouldn't call it a dependency, so
the series is handled seperately.

Looking forward to comments...


Koji Matsuoka (2):
  arm64: dts: renesas: Add I2C to R8A779A0
  arm64: dts: renesas: Add I2C support for falcon board

Wolfram Sang (3):
  dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support
  clk: renesas: r8a779a0: add clocks for I2C
  v3u: enable other I2C busses for testing

 .../devicetree/bindings/i2c/renesas,i2c.txt   |   1 +
 .../boot/dts/renesas/r8a779a0-falcon.dts      |  93 +++++++++++++
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 122 ++++++++++++++++++
 drivers/clk/renesas/r8a779a0-cpg-mssr.c       |   7 +
 4 files changed, 223 insertions(+)

-- 
2.28.0

[PATCH 1/5] dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support

[Wolfram Sang]

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 Documentation/devicetree/bindings/i2c/renesas,i2c.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/renesas,i2c.txt b/Documentation/devicetree/bindings/i2c/renesas,i2c.txt
index 96d869ac3839..5762d2d1ab9c 100644
--- a/Documentation/devicetree/bindings/i2c/renesas,i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/renesas,i2c.txt
@@ -26,6 +26,7 @@ Required properties:
 	"renesas,i2c-r8a77980" if the device is a part of a R8A77980 SoC.
 	"renesas,i2c-r8a77990" if the device is a part of a R8A77990 SoC.
 	"renesas,i2c-r8a77995" if the device is a part of a R8A77995 SoC.
+	"renesas,i2c-r8a779a0" if the device is a part of a R8A779A0 SoC.
 	"renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
 	"renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible
 				device.
-- 
2.28.0

[PATCH 2/5] clk: renesas: r8a779a0: add clocks for I2C

[Wolfram Sang]

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index bf9fdcdd7d85..989b83c26421 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -152,6 +152,13 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
 	DEF_MOD("csi41",	400,	R8A779A0_CLK_CSI0),
 	DEF_MOD("csi42",	401,	R8A779A0_CLK_CSI0),
 	DEF_MOD("csi43",	402,	R8A779A0_CLK_CSI0),
+	DEF_MOD("i2c0",		518,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c1",		519,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c2",		520,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c3",		521,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c4",		522,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c5",		523,	R8A779A0_CLK_S3D2),
+	DEF_MOD("i2c6",		524,	R8A779A0_CLK_S3D2),
 	DEF_MOD("scif0",	702,	R8A779A0_CLK_S1D8),
 	DEF_MOD("scif1",	703,	R8A779A0_CLK_S1D8),
 	DEF_MOD("scif3",	704,	R8A779A0_CLK_S1D8),
-- 
2.28.0

[PATCH 3/5] arm64: dts: renesas: Add I2C to R8A779A0

[Wolfram Sang]

From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>

Add I2C devicetree description to V3U

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: rebased and double checked]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 122 ++++++++++++++++++++++
 1 file changed, 122 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 742c04f55f74..177c4e8acc52 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -14,6 +14,16 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -115,6 +125,118 @@ sysc: system-controller@e6180000 {
 			#power-domain-cells = <1>;
 		};
 
+		i2c0: i2c@e6500000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe6500000 0 0x40>;
+			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 518>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 518>;
+			dmas = <&dmac1 0x91>, <&dmac1 0x90>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@e6508000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe6508000 0 0x40>;
+			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 519>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 519>;
+			dmas = <&dmac1 0x93>, <&dmac1 0x92>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@e6510000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe6510000 0 0x40>;
+			interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 520>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 520>;
+			dmas = <&dmac1 0x95>, <&dmac1 0x94>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@e66d0000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe66d0000 0 0x40>;
+			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 521>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 521>;
+			dmas = <&dmac1 0x97>, <&dmac1 0x96>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@e66d8000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe66d8000 0 0x40>;
+			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 522>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 522>;
+			dmas = <&dmac1 0x99>, <&dmac1 0x98>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@e66e0000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe66e0000 0 0x40>;
+			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c6: i2c@e66e8000 {
+			compatible = "renesas,i2c-r8a779a0",
+				     "renesas,rcar-gen3-i2c";
+			reg = <0 0xe66e8000 0 0x40>;
+			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 524>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 524>;
+			dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
+			dma-names = "tx", "rx";
+			i2c-scl-internal-delay-ns = <110>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		scif0: serial@e6e60000 {
 			compatible = "renesas,scif-r8a779a0",
 				     "renesas,rcar-gen3-scif", "renesas,scif";
-- 
2.28.0

[PATCH 4/5] arm64: dts: renesas: Add I2C support for falcon board

[Wolfram Sang]

From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 .../boot/dts/renesas/r8a779a0-falcon.dts      | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index fb9978ea18f4..7de3eed96ceb 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -21,6 +21,34 @@ chosen {
 	};
 };
 
+&i2c0 {
+	pinctrl-0 = <&i2c0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <400000>;
+};
+
+&i2c1 {
+	pinctrl-0 = <&i2c1_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <400000>;
+};
+
+&pfc {
+	i2c0_pins: i2c0 {
+		groups = "i2c0";
+		function = "i2c0";
+	};
+
+	i2c1_pins: i2c1 {
+		groups = "i2c1";
+		function = "i2c1";
+	};
+};
+
 &rwdt {
 	timeout-sec = <60>;
 	status = "okay";
-- 
2.28.0

[PATCH 5/5] v3u: enable other I2C busses for testing

[Wolfram Sang]

Not for upstream!

Not-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 .../boot/dts/renesas/r8a779a0-falcon.dts      | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index 7de3eed96ceb..f7f62fc40429 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -37,6 +37,46 @@ &i2c1 {
 	clock-frequency = <400000>;
 };
 
+&i2c2 {
+	pinctrl-0 = <&i2c2_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&i2c3 {
+	pinctrl-0 = <&i2c3_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&i2c4 {
+	pinctrl-0 = <&i2c4_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&i2c5 {
+	pinctrl-0 = <&i2c5_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
+&i2c6 {
+	pinctrl-0 = <&i2c6_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	clock-frequency = <100000>;
+};
+
 &pfc {
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
@@ -47,6 +87,31 @@ i2c1_pins: i2c1 {
 		groups = "i2c1";
 		function = "i2c1";
 	};
+
+	i2c2_pins: i2c2 {
+		groups = "i2c2";
+		function = "i2c2";
+	};
+
+	i2c3_pins: i2c3 {
+		groups = "i2c3";
+		function = "i2c3";
+	};
+
+	i2c4_pins: i2c4 {
+		groups = "i2c4";
+		function = "i2c4";
+	};
+
+	i2c5_pins: i2c5 {
+		groups = "i2c5";
+		function = "i2c5";
+	};
+
+	i2c6_pins: i2c6 {
+		groups = "i2c6";
+		function = "i2c6";
+	};
 };
 
 &rwdt {
-- 
2.28.0

Re: [PATCH 2/5] clk: renesas: r8a779a0: add clocks for I2C

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Dec 23, 2020 at 6:25 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -152,6 +152,13 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
>         DEF_MOD("csi41",        400,    R8A779A0_CLK_CSI0),
>         DEF_MOD("csi42",        401,    R8A779A0_CLK_CSI0),
>         DEF_MOD("csi43",        402,    R8A779A0_CLK_CSI0),
> +       DEF_MOD("i2c0",         518,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c1",         519,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c2",         520,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c3",         521,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c4",         522,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c5",         523,    R8A779A0_CLK_S3D2),
> +       DEF_MOD("i2c6",         524,    R8A779A0_CLK_S3D2),

The R-Car V3U Series User’s Manual Rev.0.5 says the parent clock is S1D4
for all instances?

>         DEF_MOD("scif0",        702,    R8A779A0_CLK_S1D8),
>         DEF_MOD("scif1",        703,    R8A779A0_CLK_S1D8),
>         DEF_MOD("scif3",        704,    R8A779A0_CLK_S1D8),

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/5] arm64: dts: renesas: Add I2C to R8A779A0

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Dec 23, 2020 at 6:25 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
>
> Add I2C devicetree description to V3U
>
> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> [wsa: rebased and double checked]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -14,6 +14,16 @@ / {
>         #address-cells = <2>;
>         #size-cells = <2>;
>
> +       aliases {
> +               i2c0 = &i2c0;
> +               i2c1 = &i2c1;
> +               i2c2 = &i2c2;
> +               i2c3 = &i2c3;
> +               i2c4 = &i2c4;
> +               i2c5 = &i2c5;
> +               i2c6 = &i2c6;
> +       };

Do we need the i2c aliases? ;-)

> @@ -115,6 +125,118 @@ sysc: system-controller@e6180000 {
>                         #power-domain-cells = <1>;
>                 };
>
> +               i2c0: i2c@e6500000 {
> +                       compatible = "renesas,i2c-r8a779a0",
> +                                    "renesas,rcar-gen3-i2c";
> +                       reg = <0 0xe6500000 0 0x40>;
> +                       interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 518>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 518>;
> +                       dmas = <&dmac1 0x91>, <&dmac1 0x90>;
> +                       dma-names = "tx", "rx";

Might be wise to leave out the DMA properties until we have verified that
DMA works?

> +                       i2c-scl-internal-delay-ns = <110>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 4/5] arm64: dts: renesas: Add I2C support for falcon board

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Dec 23, 2020 at 6:25 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
>
> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> [wsa: rebased]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> @@ -21,6 +21,34 @@ chosen {
>         };
>  };
>
> +&i2c0 {
> +       pinctrl-0 = <&i2c0_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <400000>;
> +};
> +
> +&i2c1 {
> +       pinctrl-0 = <&i2c1_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <400000>;
> +};
> +
> +&pfc {
> +       i2c0_pins: i2c0 {
> +               groups = "i2c0";
> +               function = "i2c0";
> +       };
> +
> +       i2c1_pins: i2c1 {
> +               groups = "i2c1";
> +               function = "i2c1";
> +       };
> +};
> +

BTW, why not adding i2c6, which also has slave devices connected to it?

>  &rwdt {
>         timeout-sec = <60>;
>         status = "okay";


Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 5/5] v3u: enable other I2C busses for testing

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Dec 23, 2020 at 6:25 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Not for upstream!
>
> Not-Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> @@ -37,6 +37,46 @@ &i2c1 {
>         clock-frequency = <400000>;
>  };
>
> +&i2c2 {
> +       pinctrl-0 = <&i2c2_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <100000>;
> +};
> +
> +&i2c3 {
> +       pinctrl-0 = <&i2c3_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <100000>;
> +};
> +
> +&i2c4 {
> +       pinctrl-0 = <&i2c4_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <100000>;
> +};
> +
> +&i2c5 {
> +       pinctrl-0 = <&i2c5_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <100000>;
> +};
> +
> +&i2c6 {
> +       pinctrl-0 = <&i2c6_pins>;
> +       pinctrl-names = "default";
> +
> +       status = "okay";
> +       clock-frequency = <100000>;
> +};

I think the i2c6 part belongs to "[PATCH 4/5] arm64: dts: renesas: Add
I2C support for falcon board",
possibly with clock-frequency = <400000>.

> +
>  &pfc {
>         i2c0_pins: i2c0 {
>                 groups = "i2c0";
> @@ -47,6 +87,31 @@ i2c1_pins: i2c1 {
>                 groups = "i2c1";
>                 function = "i2c1";
>         };
> +
> +       i2c2_pins: i2c2 {
> +               groups = "i2c2";
> +               function = "i2c2";
> +       };
> +
> +       i2c3_pins: i2c3 {
> +               groups = "i2c3";
> +               function = "i2c3";
> +       };
> +
> +       i2c4_pins: i2c4 {
> +               groups = "i2c4";
> +               function = "i2c4";
> +       };
> +
> +       i2c5_pins: i2c5 {
> +               groups = "i2c5";
> +               function = "i2c5";
> +       };
> +
> +       i2c6_pins: i2c6 {
> +               groups = "i2c6";
> +               function = "i2c6";
> +       };

Likewise.

>  };
>
>  &rwdt {
> --
> 2.28.0
>


--
Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/5] dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support

[Geert Uytterhoeven]

On Wed, Dec 23, 2020 at 6:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/Documentation/devicetree/bindings/i2c/renesas,i2c.txt
> +++ b/Documentation/devicetree/bindings/i2c/renesas,i2c.txt
> @@ -26,6 +26,7 @@ Required properties:
>         "renesas,i2c-r8a77980" if the device is a part of a R8A77980 SoC.
>         "renesas,i2c-r8a77990" if the device is a part of a R8A77990 SoC.
>         "renesas,i2c-r8a77995" if the device is a part of a R8A77995 SoC.
> +       "renesas,i2c-r8a779a0" if the device is a part of a R8A779A0 SoC.
>         "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
>         "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible
>                                 device.

Note that this doesn't say anything about (in)compatibility with generic
R-Car Gen3 compatible devices (hint: yaml conversion?).

New features:
  - Slave Clock Stretch Select,
  - Fast Mode+ Enable,
  - Enhanced First Bit Setup Cycle configuration.

Looks like the R-Car V3U variant can be treated as a generic R-Car Gen3
variant (lacking the new features, of course).

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/5] dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support

[Rob Herring]

On Wed, 23 Dec 2020 18:25:00 +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
>  Documentation/devicetree/bindings/i2c/renesas,i2c.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 4/5] arm64: dts: renesas: Add I2C support for falcon board

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Dec 23, 2020 at 6:25 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
>
> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> [wsa: rebased]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
>  .../boot/dts/renesas/r8a779a0-falcon.dts      | 28 +++++++++++++++++++

Shouldn't all of this be added to r8a779a0-falcon-cpu.dtsi instead of
r8a779a0-falcon.dts?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/5] dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support

[Wolfram Sang]

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On Wed, Dec 23, 2020 at 06:25:00PM +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Applied to for-next, thanks!


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Re: [PATCH 1/5] dt-bindings: i2c: renesas,i2c: add r8a779a0 (V3U) support

[Wolfram Sang]

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> New features:
>   - Slave Clock Stretch Select,
>   - Fast Mode+ Enable,
>   - Enhanced First Bit Setup Cycle configuration.
> 
> Looks like the R-Car V3U variant can be treated as a generic R-Car Gen3
> variant (lacking the new features, of course).

FM+ doesn't need an update. It will just handle higher values for the
bus frequency. This is also the most likely one to be supported in
Linux. First Bit setup is not even supported yet in the basic version.
Configuration via Linux is unclear same as SlaveClockStretch. Use cases
are unclear, too, which we would need for implementating any of this.


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