From: Roger Lu <roger.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Enric Balletbo Serra <eballetbo@gmail.com>,
Kevin Hilman <khilman@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Nicolas Boichat <drinkcat@google.com>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Fan Chen <fan.chen@mediatek.com>,
HenryC Chen <HenryC.Chen@mediatek.com>,
YT Lee <yt.lee@mediatek.com>,
Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
Charles Yang <Charles.Yang@mediatek.com>,
Angus Lin <Angus.Lin@mediatek.com>,
Mark Rutland <mark.rutland@arm.com>, Nishanth Menon <nm@ti.com>,
Roger Lu <roger.lu@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v16 1/7] dt-bindings: soc: mediatek: add mtk svs dt-bindings
Date: Wed, 28 Apr 2021 14:54:34 +0800 [thread overview]
Message-ID: <20210428065440.3704-2-roger.lu@mediatek.com> (raw)
In-Reply-To: <20210428065440.3704-1-roger.lu@mediatek.com>
Document the binding for enabling mtk svs on MediaTek SoC.
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/soc/mediatek/mtk-svs.yaml | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
new file mode 100644
index 000000000000..a855ced410f8
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Smart Voltage Scaling (SVS) Device Tree Bindings
+
+maintainers:
+ - Roger Lu <roger.lu@mediatek.com>
+ - Matthias Brugger <matthias.bgg@gmail.com>
+ - Kevin Hilman <khilman@kernel.org>
+
+description: |+
+ The SVS engine is a piece of hardware which has several
+ controllers(banks) for calculating suitable voltage to
+ different power domains(CPU/GPU/CCI) according to
+ chip process corner, temperatures and other factors. Then DVFS
+ driver could apply SVS bank voltage to PMIC/Buck.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8183-svs
+
+ reg:
+ maxItems: 1
+ description: Address range of the MTK SVS controller.
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+ description: Main clock for MTK SVS controller to work.
+
+ clock-names:
+ const: main
+
+ nvmem-cells:
+ minItems: 1
+ maxItems: 2
+ description:
+ Phandle to the calibration data provided by a nvmem device.
+ items:
+ - description: SVS efuse for SVS controller
+ - description: Thermal efuse for SVS controller
+
+ nvmem-cell-names:
+ items:
+ - const: svs-calibration-data
+ - const: t-calibration-data
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - nvmem-cells
+ - nvmem-cell-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ svs@1100b000 {
+ compatible = "mediatek,mt8183-svs";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_THERM>;
+ clock-names = "main";
+ nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
+ nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+ };
+ };
--
2.18.0
next prev parent reply other threads:[~2021-04-28 7:18 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-28 6:54 [PATCH v16 0/7] soc: mediatek: SVS: introduce MTK SVS Roger Lu
2021-04-28 6:54 ` Roger Lu [this message]
2021-04-28 6:54 ` [PATCH v16 2/7] arm64: dts: mt8183: add svs device information Roger Lu
2021-10-20 15:20 ` AngeloGioacchino Del Regno
2021-12-24 7:33 ` Roger Lu
2021-12-30 12:54 ` Matthias Brugger
2022-01-03 6:08 ` Roger Lu
2021-04-28 6:54 ` [PATCH v16 3/7] soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2021-05-06 4:51 ` Guenter Roeck
2021-05-14 3:10 ` Roger Lu
2021-05-14 3:33 ` Guenter Roeck
2021-05-14 5:58 ` Roger Lu
2021-10-21 8:46 ` AngeloGioacchino Del Regno
2021-12-24 9:27 ` Roger Lu
2021-12-24 9:34 ` AngeloGioacchino Del Regno
2021-04-28 6:54 ` [PATCH v16 4/7] soc: mediatek: SVS: add debug commands Roger Lu
2021-10-21 8:52 ` AngeloGioacchino Del Regno
2021-12-24 9:38 ` Roger Lu
2021-04-28 6:54 ` [PATCH v16 5/7] dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Roger Lu
2021-04-28 6:54 ` [PATCH v16 6/7] arm64: dts: mt8192: add svs device information Roger Lu
2021-10-20 15:16 ` AngeloGioacchino Del Regno
2021-12-24 9:42 ` Roger Lu
2021-10-20 15:18 ` AngeloGioacchino Del Regno
2021-04-28 6:54 ` [PATCH v16 7/7] soc: mediatek: SVS: add mt8192 SVS GPU driver Roger Lu
2021-05-14 3:20 ` YT Lee
2021-10-21 9:08 ` AngeloGioacchino Del Regno
2021-12-30 13:18 ` [PATCH v16 0/7] soc: mediatek: SVS: introduce MTK SVS Matthias Brugger
2022-01-03 7:43 ` Roger Lu
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