From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Taniya Das <tdas@codeaurora.org>,
Ansuel Smith <ansuelsmth@gmail.com>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema
Date: Thu, 24 Feb 2022 17:48:17 +0100 [thread overview]
Message-ID: <20220224164831.21475-2-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20220224164831.21475-1-ansuelsmth@gmail.com>
Split qcom,gcc.yaml to common and specific schema to use it as a
template for schema that needs to use the gcc bindings and require
to add additional bindings.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
.../bindings/clock/qcom,gcc-other.yaml | 76 +++++++++++++++++++
.../devicetree/bindings/clock/qcom,gcc.yaml | 59 +-------------
2 files changed, 80 insertions(+), 55 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
new file mode 100644
index 000000000000..4e5903bcd70d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller Binding
+
+maintainers:
+ - Stephen Boyd <sboyd@kernel.org>
+ - Taniya Das <tdas@codeaurora.org>
+
+description:
+ Qualcomm global clock control module which supports the clocks, resets and
+ power domains.
+
+ See also:
+ - dt-bindings/clock/qcom,gcc-apq8084.h
+ - dt-bindings/reset/qcom,gcc-apq8084.h
+ - dt-bindings/clock/qcom,gcc-ipq4019.h
+ - dt-bindings/clock/qcom,gcc-ipq6018.h
+ - dt-bindings/reset/qcom,gcc-ipq6018.h
+ - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
+ - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
+ - dt-bindings/clock/qcom,gcc-msm8939.h
+ - dt-bindings/clock/qcom,gcc-msm8953.h
+ - dt-bindings/reset/qcom,gcc-msm8939.h
+ - dt-bindings/clock/qcom,gcc-msm8660.h
+ - dt-bindings/reset/qcom,gcc-msm8660.h
+ - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
+ - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
+ - dt-bindings/clock/qcom,gcc-mdm9607.h
+ - dt-bindings/clock/qcom,gcc-mdm9615.h
+ - dt-bindings/reset/qcom,gcc-mdm9615.h
+ - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660)
+
+allOf:
+ - $ref: "qcom,gcc.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - qcom,gcc-apq8084
+ - qcom,gcc-ipq4019
+ - qcom,gcc-ipq6018
+ - qcom,gcc-ipq8064
+ - qcom,gcc-mdm9607
+ - qcom,gcc-msm8226
+ - qcom,gcc-msm8660
+ - qcom,gcc-msm8916
+ - qcom,gcc-msm8939
+ - qcom,gcc-msm8953
+ - qcom,gcc-msm8960
+ - qcom,gcc-msm8974
+ - qcom,gcc-msm8974pro
+ - qcom,gcc-msm8974pro-ac
+ - qcom,gcc-mdm9615
+ - qcom,gcc-sdm630
+ - qcom,gcc-sdm660
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ # Example for GCC for MSM8960:
+ - |
+ clock-controller@900000 {
+ compatible = "qcom,gcc-msm8960";
+ reg = <0x900000 0x4000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
index f66d703bd913..2ed27a2ef445 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
@@ -4,57 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding
+title: Qualcomm Global Clock & Reset Controller Binding Common Bindings
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains.
-
- See also:
- - dt-bindings/clock/qcom,gcc-apq8084.h
- - dt-bindings/reset/qcom,gcc-apq8084.h
- - dt-bindings/clock/qcom,gcc-ipq4019.h
- - dt-bindings/clock/qcom,gcc-ipq6018.h
- - dt-bindings/reset/qcom,gcc-ipq6018.h
- - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
- - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
- - dt-bindings/clock/qcom,gcc-msm8939.h
- - dt-bindings/clock/qcom,gcc-msm8953.h
- - dt-bindings/reset/qcom,gcc-msm8939.h
- - dt-bindings/clock/qcom,gcc-msm8660.h
- - dt-bindings/reset/qcom,gcc-msm8660.h
- - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
- - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
- - dt-bindings/clock/qcom,gcc-mdm9607.h
- - dt-bindings/clock/qcom,gcc-mdm9615.h
- - dt-bindings/reset/qcom,gcc-mdm9615.h
- - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660)
+ Common bindings for Qualcomm global clock control module which supports
+ the clocks, resets and power domains.
properties:
- compatible:
- enum:
- - qcom,gcc-apq8084
- - qcom,gcc-ipq4019
- - qcom,gcc-ipq6018
- - qcom,gcc-ipq8064
- - qcom,gcc-mdm9607
- - qcom,gcc-msm8226
- - qcom,gcc-msm8660
- - qcom,gcc-msm8916
- - qcom,gcc-msm8939
- - qcom,gcc-msm8953
- - qcom,gcc-msm8960
- - qcom,gcc-msm8974
- - qcom,gcc-msm8974pro
- - qcom,gcc-msm8974pro-ac
- - qcom,gcc-mdm9615
- - qcom,gcc-sdm630
- - qcom,gcc-sdm660
-
'#clock-cells':
const: 1
@@ -72,22 +32,11 @@ properties:
Protected clock specifier list as per common clock binding.
required:
- - compatible
- reg
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
-additionalProperties: false
+additionalProperties: true
-examples:
- # Example for GCC for MSM8960:
- - |
- clock-controller@900000 {
- compatible = "qcom,gcc-msm8960";
- reg = <0x900000 0x4000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- };
...
--
2.34.1
next prev parent reply other threads:[~2022-02-24 16:48 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-24 16:48 [PATCH v5 00/15] Multiple addition and improvement to ipq8064 gcc Ansuel Smith
2022-02-24 16:48 ` Ansuel Smith [this message]
2022-02-24 18:43 ` [PATCH v5 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema Rob Herring
2022-02-24 22:04 ` Stephen Boyd
2022-03-23 13:55 ` Rob Herring
2022-03-23 19:47 ` Ansuel Smith
2022-03-24 13:16 ` Rob Herring
2022-02-24 16:48 ` [PATCH v5 02/15] dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation Ansuel Smith
2022-02-24 18:46 ` Rob Herring
2022-02-24 18:50 ` Ansuel Smith
2022-02-24 16:48 ` [PATCH v5 03/15] dt-bindings: clock: document qcom,gcc-ipq8064 binding Ansuel Smith
2022-02-24 19:09 ` Rob Herring
2022-02-24 22:07 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 04/15] clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0 Ansuel Smith
2022-02-24 22:07 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 05/15] clk: qcom: gcc-ipq806x: convert parent_names to parent_data Ansuel Smith
2022-02-24 22:09 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 06/15] clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents Ansuel Smith
2022-02-24 22:09 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 07/15] clk: qcom: gcc-ipq806x: add additional freq nss cores Ansuel Smith
2022-02-24 22:10 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 08/15] clk: qcom: gcc-ipq806x: add unusued flag for critical clock Ansuel Smith
2022-02-24 16:48 ` [PATCH v5 09/15] clk: qcom: clk-rcg: add clk_rcg_floor_ops ops Ansuel Smith
2022-02-24 22:11 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 10/15] clk: qcom: gcc-ipq806x: add additional freq for sdc table Ansuel Smith
2022-02-24 22:11 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 11/15] dt-bindings: clock: add ipq8064 ce5 clk define Ansuel Smith
2022-02-24 19:09 ` Rob Herring
2022-02-24 22:12 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 12/15] clk: qcom: gcc-ipq806x: add CryptoEngine clocks Ansuel Smith
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 13/15] dt-bindings: reset: add ipq8064 ce5 resets Ansuel Smith
2022-02-24 19:10 ` Rob Herring
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 14/15] clk: qcom: gcc-ipq806x: add CryptoEngine resets Ansuel Smith
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 15/15] ARM: dts: qcom: add syscon and cxo/pxo clock to gcc node for ipq8064 Ansuel Smith
2022-02-24 22:14 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220224164831.21475-2-ansuelsmth@gmail.com \
--to=ansuelsmth@gmail.com \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=tdas@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).