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* [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support
@ 2022-04-11  4:46 Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1 Samuel Holland
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Samuel Holland @ 2022-04-11  4:46 UTC (permalink / raw)
  To: Vinod Koul, dmaengine
  Cc: Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

D1 is a new RISC-V SoC that uses mostly the same peripherals as
existing ARM-based sunxi SoCs. This series adds dmaengine support for
D1, after fixing an issue where the driver depended on architecture-
specific behavior (patch 2) and resolving a TODO item (patch 3).

Changes in v2:
 - Fix `checkpatch.pl --strict` style issues (missing spaces)

Samuel Holland (4):
  dt-bindings: dma: sun50i-a64: Add compatible for D1
  dmaengine: sun6i: Do not use virt_to_phys
  dmaengine: sun6i: Add support for 34-bit physical addresses
  dmaengine: sun6i: Add support for the D1 variant

 .../dma/allwinner,sun50i-a64-dma.yaml         |  9 ++-
 drivers/dma/Kconfig                           |  2 +-
 drivers/dma/sun6i-dma.c                       | 78 +++++++++++++------
 3 files changed, 61 insertions(+), 28 deletions(-)

-- 
2.35.1


^ permalink raw reply	[flat|nested] 8+ messages in thread
* [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1
  2022-04-11  4:46 [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support Samuel Holland
@ 2022-04-11  4:46 ` Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Samuel Holland
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 8+ messages in thread
From: Samuel Holland @ 2022-04-11  4:46 UTC (permalink / raw)
  To: Vinod Koul, dmaengine
  Cc: Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi, Rob Herring,
	Maxime Ripard

D1 has a DMA controller similar to the one in other Allwinner SoCs.
Add its compatible, and include it in the list of variants with a
separate MBUS clock gate.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

(no changes since v1)

 .../bindings/dma/allwinner,sun50i-a64-dma.yaml           | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml
index b6e1ebfaf366..ff0a5c58d78c 100644
--- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml
@@ -20,9 +20,11 @@ properties:
 
   compatible:
     oneOf:
-      - const: allwinner,sun50i-a64-dma
-      - const: allwinner,sun50i-a100-dma
-      - const: allwinner,sun50i-h6-dma
+      - enum:
+          - allwinner,sun20i-d1-dma
+          - allwinner,sun50i-a64-dma
+          - allwinner,sun50i-a100-dma
+          - allwinner,sun50i-h6-dma
       - items:
           - const: allwinner,sun8i-r40-dma
           - const: allwinner,sun50i-a64-dma
@@ -58,6 +60,7 @@ if:
   properties:
     compatible:
       enum:
+        - allwinner,sun20i-d1-dma
         - allwinner,sun50i-a100-dma
         - allwinner,sun50i-h6-dma
 
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys
  2022-04-11  4:46 [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1 Samuel Holland
@ 2022-04-11  4:46 ` Samuel Holland
  2022-04-11  8:10   ` kernel test robot
  2022-04-11  8:20   ` kernel test robot
  2022-04-11  4:46 ` [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 4/4] dmaengine: sun6i: Add support for the D1 variant Samuel Holland
  3 siblings, 2 replies; 8+ messages in thread
From: Samuel Holland @ 2022-04-11  4:46 UTC (permalink / raw)
  To: Vinod Koul, dmaengine
  Cc: Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard

This breaks on RISC-V, because dma_pool_alloc returns addresses which
are not in the linear map. Instead, plumb through the physical address
which is already known anyway.

Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

(no changes since v1)

 drivers/dma/sun6i-dma.c | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 5cadd4d2b824..a9334f969b28 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -241,9 +241,7 @@ static inline void sun6i_dma_dump_com_regs(struct sun6i_dma_dev *sdev)
 static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev,
 					    struct sun6i_pchan *pchan)
 {
-	phys_addr_t reg = virt_to_phys(pchan->base);
-
-	dev_dbg(sdev->slave.dev, "Chan %d reg: %pa\n"
+	dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
 		"\t___en(%04x): \t0x%08x\n"
 		"\tpause(%04x): \t0x%08x\n"
 		"\tstart(%04x): \t0x%08x\n"
@@ -252,7 +250,7 @@ static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev,
 		"\t__dst(%04x): \t0x%08x\n"
 		"\tcount(%04x): \t0x%08x\n"
 		"\t_para(%04x): \t0x%08x\n\n",
-		pchan->idx, &reg,
+		pchan->idx, pchan->base - sdev->base,
 		DMA_CHAN_ENABLE,
 		readl(pchan->base + DMA_CHAN_ENABLE),
 		DMA_CHAN_PAUSE,
@@ -385,17 +383,16 @@ static void *sun6i_dma_lli_add(struct sun6i_dma_lli *prev,
 }
 
 static inline void sun6i_dma_dump_lli(struct sun6i_vchan *vchan,
-				      struct sun6i_dma_lli *lli)
+				      struct sun6i_dma_lli *v_lli,
+				      dma_addr_t p_lli)
 {
-	phys_addr_t p_lli = virt_to_phys(lli);
-
 	dev_dbg(chan2dev(&vchan->vc.chan),
-		"\n\tdesc:   p - %pa v - 0x%p\n"
+		"\n\tdesc:\tp - %pad v - 0x%p\n"
 		"\t\tc - 0x%08x s - 0x%08x d - 0x%08x\n"
 		"\t\tl - 0x%08x p - 0x%08x n - 0x%08x\n",
-		&p_lli, lli,
-		lli->cfg, lli->src, lli->dst,
-		lli->len, lli->para, lli->p_lli_next);
+		&p_lli, v_lli,
+		v_lli->cfg, v_lli->src, v_lli->dst,
+		v_lli->len, v_lli->para, v_lli->p_lli_next);
 }
 
 static void sun6i_dma_free_desc(struct virt_dma_desc *vd)
@@ -445,7 +442,7 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vchan)
 	pchan->desc = to_sun6i_desc(&desc->tx);
 	pchan->done = NULL;
 
-	sun6i_dma_dump_lli(vchan, pchan->desc->v_lli);
+	sun6i_dma_dump_lli(vchan, pchan->desc->v_lli, pchan->desc->p_lli);
 
 	irq_reg = pchan->idx / DMA_IRQ_CHAN_NR;
 	irq_offset = pchan->idx % DMA_IRQ_CHAN_NR;
@@ -670,7 +667,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy(
 
 	sun6i_dma_lli_add(NULL, v_lli, p_lli, txd);
 
-	sun6i_dma_dump_lli(vchan, v_lli);
+	sun6i_dma_dump_lli(vchan, v_lli, p_lli);
 
 	return vchan_tx_prep(&vchan->vc, &txd->vd, flags);
 
@@ -746,14 +743,16 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg(
 	}
 
 	dev_dbg(chan2dev(chan), "First: %pad\n", &txd->p_lli);
-	for (prev = txd->v_lli; prev; prev = prev->v_lli_next)
-		sun6i_dma_dump_lli(vchan, prev);
+	for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli;
+	     p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next)
+		sun6i_dma_dump_lli(vchan, v_lli, p_lli);
 
 	return vchan_tx_prep(&vchan->vc, &txd->vd, flags);
 
 err_lli_free:
-	for (prev = txd->v_lli; prev; prev = prev->v_lli_next)
-		dma_pool_free(sdev->pool, prev, virt_to_phys(prev));
+	for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli;
+	     p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next)
+		dma_pool_free(sdev->pool, v_lli, p_lli);
 	kfree(txd);
 	return NULL;
 }
@@ -820,8 +819,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic(
 	return vchan_tx_prep(&vchan->vc, &txd->vd, flags);
 
 err_lli_free:
-	for (prev = txd->v_lli; prev; prev = prev->v_lli_next)
-		dma_pool_free(sdev->pool, prev, virt_to_phys(prev));
+	for (p_lli = txd->p_lli, v_lli = txd->v_lli; v_lli;
+	     p_lli = v_lli->p_lli_next, v_lli = v_lli->v_lli_next)
+		dma_pool_free(sdev->pool, v_lli, p_lli);
 	kfree(txd);
 	return NULL;
 }
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses
  2022-04-11  4:46 [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1 Samuel Holland
  2022-04-11  4:46 ` [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Samuel Holland
@ 2022-04-11  4:46 ` Samuel Holland
  2022-04-11 12:03   ` kernel test robot
  2022-04-11  4:46 ` [PATCH v2 4/4] dmaengine: sun6i: Add support for the D1 variant Samuel Holland
  3 siblings, 1 reply; 8+ messages in thread
From: Samuel Holland @ 2022-04-11  4:46 UTC (permalink / raw)
  To: Vinod Koul, dmaengine
  Cc: Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard

Recent Allwinner SoCs support >4 GiB of DRAM, so those variants of the
DMA engine support >32 bit physical addresses. This is accomplished by
placing the high bits in the "para" word in the DMA descriptor.

DMA descriptors themselves can be located at >32 bit addresses by
putting the high bits in the LSBs of the descriptor address register,
taking advantage of the required DMA descriptor alignment. However,
support for this is not really necessary, so we can avoid the
complication by allocating them from the DMA_32 zone.

Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

Changes in v2:
 - Fix `checkpatch.pl --strict` style issues (missing spaces)

 drivers/dma/sun6i-dma.c | 39 ++++++++++++++++++++++++++++++++++-----
 1 file changed, 34 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index a9334f969b28..bd5958185ed1 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -90,6 +90,14 @@
 
 #define DMA_CHAN_CUR_PARA	0x1c
 
+/*
+ * LLI address mangling
+ *
+ * The LLI link physical address is also mangled, but we avoid dealing
+ * with that by allocating LLIs from the DMA32 zone.
+ */
+#define SET_SRC_HIGH_ADDR(x)		((((x) >> 32) & 0x3U) << 16)
+#define SET_DST_HIGH_ADDR(x)		((((x) >> 32) & 0x3U) << 18)
 
 /*
  * Various hardware related defines
@@ -132,6 +140,7 @@ struct sun6i_dma_config {
 	u32 dst_burst_lengths;
 	u32 src_addr_widths;
 	u32 dst_addr_widths;
+	bool has_high_addr;
 	bool has_mbus_clk;
 };
 
@@ -223,6 +232,12 @@ to_sun6i_desc(struct dma_async_tx_descriptor *tx)
 	return container_of(tx, struct sun6i_desc, vd.tx);
 }
 
+static inline bool sun6i_dma_has_high_addr(struct sun6i_dma_dev *sdev)
+{
+	return IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &&
+		sdev->cfg->has_high_addr;
+}
+
 static inline void sun6i_dma_dump_com_regs(struct sun6i_dma_dev *sdev)
 {
 	dev_dbg(sdev->slave.dev, "Common register:\n"
@@ -645,7 +660,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy(
 	if (!txd)
 		return NULL;
 
-	v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli);
+	v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli);
 	if (!v_lli) {
 		dev_err(sdev->slave.dev, "Failed to alloc lli memory\n");
 		goto err_txd_free;
@@ -655,6 +670,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy(
 	v_lli->dst = dest;
 	v_lli->len = len;
 	v_lli->para = NORMAL_WAIT;
+	if (sun6i_dma_has_high_addr(sdev))
+		v_lli->para |= SET_SRC_HIGH_ADDR(src) |
+			       SET_DST_HIGH_ADDR(dest);
 
 	burst = convert_burst(8);
 	width = convert_buswidth(DMA_SLAVE_BUSWIDTH_4_BYTES);
@@ -705,7 +723,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg(
 		return NULL;
 
 	for_each_sg(sgl, sg, sg_len, i) {
-		v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli);
+		v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli);
 		if (!v_lli)
 			goto err_lli_free;
 
@@ -715,6 +733,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg(
 		if (dir == DMA_MEM_TO_DEV) {
 			v_lli->src = sg_dma_address(sg);
 			v_lli->dst = sconfig->dst_addr;
+			if (sun6i_dma_has_high_addr(sdev))
+				v_lli->para |= SET_SRC_HIGH_ADDR(sg_dma_address(sg)) |
+					       SET_DST_HIGH_ADDR(sconfig->dst_addr);
 			v_lli->cfg = lli_cfg;
 			sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port);
 			sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE);
@@ -728,6 +749,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg(
 		} else {
 			v_lli->src = sconfig->src_addr;
 			v_lli->dst = sg_dma_address(sg);
+			if (sun6i_dma_has_high_addr(sdev))
+				v_lli->para |= SET_SRC_HIGH_ADDR(sconfig->src_addr) |
+					       SET_DST_HIGH_ADDR(sg_dma_address(sg));
 			v_lli->cfg = lli_cfg;
 			sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM);
 			sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE);
@@ -786,7 +810,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic(
 		return NULL;
 
 	for (i = 0; i < periods; i++) {
-		v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli);
+		v_lli = dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli);
 		if (!v_lli) {
 			dev_err(sdev->slave.dev, "Failed to alloc lli memory\n");
 			goto err_lli_free;
@@ -798,12 +822,18 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic(
 		if (dir == DMA_MEM_TO_DEV) {
 			v_lli->src = buf_addr + period_len * i;
 			v_lli->dst = sconfig->dst_addr;
+			if (sun6i_dma_has_high_addr(sdev))
+				v_lli->para |= SET_SRC_HIGH_ADDR(buf_addr + period_len * i) |
+					       SET_DST_HIGH_ADDR(sconfig->dst_addr);
 			v_lli->cfg = lli_cfg;
 			sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port);
 			sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE);
 		} else {
 			v_lli->src = sconfig->src_addr;
 			v_lli->dst = buf_addr + period_len * i;
+			if (sun6i_dma_has_high_addr(sdev))
+				v_lli->para |= SET_SRC_HIGH_ADDR(sconfig->src_addr) |
+					       SET_DST_HIGH_ADDR(buf_addr + period_len * i);
 			v_lli->cfg = lli_cfg;
 			sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM);
 			sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE);
@@ -1174,8 +1204,6 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
 };
 
 /*
- * TODO: Add support for more than 4g physical addressing.
- *
  * The A100 binding uses the number of dma channels from the
  * device tree node.
  */
@@ -1194,6 +1222,7 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = {
 			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
 			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
 			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
+	.has_high_addr = true,
 	.has_mbus_clk = true,
 };
 
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH v2 4/4] dmaengine: sun6i: Add support for the D1 variant
  2022-04-11  4:46 [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support Samuel Holland
                   ` (2 preceding siblings ...)
  2022-04-11  4:46 ` [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses Samuel Holland
@ 2022-04-11  4:46 ` Samuel Holland
  3 siblings, 0 replies; 8+ messages in thread
From: Samuel Holland @ 2022-04-11  4:46 UTC (permalink / raw)
  To: Vinod Koul, dmaengine
  Cc: Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard

So far it appears to match the configuration of the A100 variant.

Since D1 is a RISC-V chip, it does not meet any of the existing
dependencies for this driver, so relax the dependency somewhat.

Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

(no changes since v1)

 drivers/dma/Kconfig     | 2 +-
 drivers/dma/sun6i-dma.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d5de3f77d3aa..b6845303cf7e 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -163,7 +163,7 @@ config DMA_SUN4I
 
 config DMA_SUN6I
 	tristate "Allwinner A31 SoCs DMA support"
-	depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
+	depends on ARCH_SUNXI || COMPILE_TEST
 	depends on RESET_CONTROLLER
 	select DMA_ENGINE
 	select DMA_VIRTUAL_CHANNELS
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index bd5958185ed1..1b95e93c14ee 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -1277,6 +1277,7 @@ static const struct of_device_id sun6i_dma_match[] = {
 	{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
 	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
 	{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
+	{ .compatible = "allwinner,sun20i-d1-dma", .data = &sun50i_a100_dma_cfg },
 	{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
 	{ .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
 	{ .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys
  2022-04-11  4:46 ` [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Samuel Holland
@ 2022-04-11  8:10   ` kernel test robot
  2022-04-11  8:20   ` kernel test robot
  1 sibling, 0 replies; 8+ messages in thread
From: kernel test robot @ 2022-04-11  8:10 UTC (permalink / raw)
  To: Samuel Holland, Vinod Koul, dmaengine
  Cc: kbuild-all, Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

Hi Samuel,

I love your patch! Perhaps something to improve:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on sunxi/sunxi/for-next v5.18-rc2 next-20220411]
[cannot apply to mripard/sunxi/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: microblaze-buildonly-randconfig-r004-20220411 (https://download.01.org/0day-ci/archive/20220411/202204111614.kGz2adbh-lkp@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/280420721fd264a03a3d3f9fbe2b4e6bfddd0f79
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
        git checkout 280420721fd264a03a3d3f9fbe2b4e6bfddd0f79
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=microblaze SHELL=/bin/bash drivers/dma/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
                    from include/linux/dmaengine.h:8,
                    from drivers/dma/sun6i-dma.c:12:
   drivers/dma/sun6i-dma.c: In function 'sun6i_dma_dump_chan_regs':
>> drivers/dma/sun6i-dma.c:244:34: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'int' [-Wformat=]
     244 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |                                  ^~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:129:41: note: in definition of macro 'dev_printk'
     129 |                 _dev_printk(level, dev, fmt, ##__VA_ARGS__);            \
         |                                         ^~~
   include/linux/dev_printk.h:163:45: note: in expansion of macro 'dev_fmt'
     163 |                 dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \
         |                                             ^~~~~~~
   drivers/dma/sun6i-dma.c:244:9: note: in expansion of macro 'dev_dbg'
     244 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |         ^~~~~~~
   drivers/dma/sun6i-dma.c:244:52: note: format string is defined here
     244 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |                                                  ~~^
         |                                                    |
         |                                                    long unsigned int
         |                                                  %x


vim +244 drivers/dma/sun6i-dma.c

   240	
   241	static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev,
   242						    struct sun6i_pchan *pchan)
   243	{
 > 244		dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
   245			"\t___en(%04x): \t0x%08x\n"
   246			"\tpause(%04x): \t0x%08x\n"
   247			"\tstart(%04x): \t0x%08x\n"
   248			"\t__cfg(%04x): \t0x%08x\n"
   249			"\t__src(%04x): \t0x%08x\n"
   250			"\t__dst(%04x): \t0x%08x\n"
   251			"\tcount(%04x): \t0x%08x\n"
   252			"\t_para(%04x): \t0x%08x\n\n",
   253			pchan->idx, pchan->base - sdev->base,
   254			DMA_CHAN_ENABLE,
   255			readl(pchan->base + DMA_CHAN_ENABLE),
   256			DMA_CHAN_PAUSE,
   257			readl(pchan->base + DMA_CHAN_PAUSE),
   258			DMA_CHAN_LLI_ADDR,
   259			readl(pchan->base + DMA_CHAN_LLI_ADDR),
   260			DMA_CHAN_CUR_CFG,
   261			readl(pchan->base + DMA_CHAN_CUR_CFG),
   262			DMA_CHAN_CUR_SRC,
   263			readl(pchan->base + DMA_CHAN_CUR_SRC),
   264			DMA_CHAN_CUR_DST,
   265			readl(pchan->base + DMA_CHAN_CUR_DST),
   266			DMA_CHAN_CUR_CNT,
   267			readl(pchan->base + DMA_CHAN_CUR_CNT),
   268			DMA_CHAN_CUR_PARA,
   269			readl(pchan->base + DMA_CHAN_CUR_PARA));
   270	}
   271	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys
  2022-04-11  4:46 ` [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Samuel Holland
  2022-04-11  8:10   ` kernel test robot
@ 2022-04-11  8:20   ` kernel test robot
  1 sibling, 0 replies; 8+ messages in thread
From: kernel test robot @ 2022-04-11  8:20 UTC (permalink / raw)
  To: Samuel Holland, Vinod Koul, dmaengine
  Cc: llvm, kbuild-all, Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

Hi Samuel,

I love your patch! Perhaps something to improve:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on sunxi/sunxi/for-next v5.18-rc2 next-20220411]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: hexagon-randconfig-r041-20220410 (https://download.01.org/0day-ci/archive/20220411/202204111641.yuvoMU5q-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project c6e83f560f06cdfe8aa47b248d8bdc58f947274b)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/280420721fd264a03a3d3f9fbe2b4e6bfddd0f79
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
        git checkout 280420721fd264a03a3d3f9fbe2b4e6bfddd0f79
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/dma/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/dma/sun6i-dma.c:253:15: warning: format specifies type 'unsigned long' but the argument has type 'int' [-Wformat]
                   pchan->idx, pchan->base - sdev->base,
                               ^~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:155:39: note: expanded from macro 'dev_dbg'
           dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
                                        ~~~     ^~~~~~~~~~~
   include/linux/dynamic_debug.h:167:19: note: expanded from macro 'dynamic_dev_dbg'
                              dev, fmt, ##__VA_ARGS__)
                                   ~~~    ^~~~~~~~~~~
   include/linux/dynamic_debug.h:152:56: note: expanded from macro '_dynamic_func_call'
           __dynamic_func_call(__UNIQUE_ID(ddebug), fmt, func, ##__VA_ARGS__)
                                                                 ^~~~~~~~~~~
   include/linux/dynamic_debug.h:134:15: note: expanded from macro '__dynamic_func_call'
                   func(&id, ##__VA_ARGS__);               \
                               ^~~~~~~~~~~
   1 warning generated.


vim +253 drivers/dma/sun6i-dma.c

   240	
   241	static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev,
   242						    struct sun6i_pchan *pchan)
   243	{
   244		dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
   245			"\t___en(%04x): \t0x%08x\n"
   246			"\tpause(%04x): \t0x%08x\n"
   247			"\tstart(%04x): \t0x%08x\n"
   248			"\t__cfg(%04x): \t0x%08x\n"
   249			"\t__src(%04x): \t0x%08x\n"
   250			"\t__dst(%04x): \t0x%08x\n"
   251			"\tcount(%04x): \t0x%08x\n"
   252			"\t_para(%04x): \t0x%08x\n\n",
 > 253			pchan->idx, pchan->base - sdev->base,
   254			DMA_CHAN_ENABLE,
   255			readl(pchan->base + DMA_CHAN_ENABLE),
   256			DMA_CHAN_PAUSE,
   257			readl(pchan->base + DMA_CHAN_PAUSE),
   258			DMA_CHAN_LLI_ADDR,
   259			readl(pchan->base + DMA_CHAN_LLI_ADDR),
   260			DMA_CHAN_CUR_CFG,
   261			readl(pchan->base + DMA_CHAN_CUR_CFG),
   262			DMA_CHAN_CUR_SRC,
   263			readl(pchan->base + DMA_CHAN_CUR_SRC),
   264			DMA_CHAN_CUR_DST,
   265			readl(pchan->base + DMA_CHAN_CUR_DST),
   266			DMA_CHAN_CUR_CNT,
   267			readl(pchan->base + DMA_CHAN_CUR_CNT),
   268			DMA_CHAN_CUR_PARA,
   269			readl(pchan->base + DMA_CHAN_CUR_PARA));
   270	}
   271	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses
  2022-04-11  4:46 ` [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses Samuel Holland
@ 2022-04-11 12:03   ` kernel test robot
  0 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2022-04-11 12:03 UTC (permalink / raw)
  To: Samuel Holland, Vinod Koul, dmaengine
  Cc: kbuild-all, Samuel Holland, Chen-Yu Tsai, Jernej Skrabec,
	Krzysztof Kozlowski, Maxime Ripard, Rob Herring, devicetree,
	linux-arm-kernel, linux-kernel, linux-sunxi

Hi Samuel,

I love your patch! Perhaps something to improve:

[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on sunxi/sunxi/for-next v5.18-rc2 next-20220411]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: nios2-randconfig-r011-20220410 (https://download.01.org/0day-ci/archive/20220411/202204111937.ZQ1e600D-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/2e9c7977b871d504bca4e9ee88d3b322a21f3fb7
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Samuel-Holland/dmaengine-sun6i-Allwinner-D1-support/20220411-124826
        git checkout 2e9c7977b871d504bca4e9ee88d3b322a21f3fb7
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=nios2 SHELL=/bin/bash drivers/dma/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
                    from include/linux/dmaengine.h:8,
                    from drivers/dma/sun6i-dma.c:12:
   drivers/dma/sun6i-dma.c: In function 'sun6i_dma_dump_chan_regs':
   drivers/dma/sun6i-dma.c:259:34: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'int' [-Wformat=]
     259 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |                                  ^~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:129:41: note: in definition of macro 'dev_printk'
     129 |                 _dev_printk(level, dev, fmt, ##__VA_ARGS__);            \
         |                                         ^~~
   include/linux/dev_printk.h:158:37: note: in expansion of macro 'dev_fmt'
     158 |         dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__)
         |                                     ^~~~~~~
   drivers/dma/sun6i-dma.c:259:9: note: in expansion of macro 'dev_dbg'
     259 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |         ^~~~~~~
   drivers/dma/sun6i-dma.c:259:52: note: format string is defined here
     259 |         dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n"
         |                                                  ~~^
         |                                                    |
         |                                                    long unsigned int
         |                                                  %x
   drivers/dma/sun6i-dma.c: In function 'sun6i_dma_prep_dma_memcpy':
>> drivers/dma/sun6i-dma.c:99:48: warning: right shift count >= width of type [-Wshift-count-overflow]
      99 | #define SET_SRC_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 16)
         |                                                ^~
   drivers/dma/sun6i-dma.c:674:32: note: in expansion of macro 'SET_SRC_HIGH_ADDR'
     674 |                 v_lli->para |= SET_SRC_HIGH_ADDR(src) |
         |                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c:100:48: warning: right shift count >= width of type [-Wshift-count-overflow]
     100 | #define SET_DST_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 18)
         |                                                ^~
   drivers/dma/sun6i-dma.c:675:32: note: in expansion of macro 'SET_DST_HIGH_ADDR'
     675 |                                SET_DST_HIGH_ADDR(dest);
         |                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c: In function 'sun6i_dma_prep_slave_sg':
>> drivers/dma/sun6i-dma.c:99:48: warning: right shift count >= width of type [-Wshift-count-overflow]
      99 | #define SET_SRC_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 16)
         |                                                ^~
   drivers/dma/sun6i-dma.c:737:48: note: in expansion of macro 'SET_SRC_HIGH_ADDR'
     737 |                                 v_lli->para |= SET_SRC_HIGH_ADDR(sg_dma_address(sg)) |
         |                                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c:100:48: warning: right shift count >= width of type [-Wshift-count-overflow]
     100 | #define SET_DST_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 18)
         |                                                ^~
   drivers/dma/sun6i-dma.c:738:48: note: in expansion of macro 'SET_DST_HIGH_ADDR'
     738 |                                                SET_DST_HIGH_ADDR(sconfig->dst_addr);
         |                                                ^~~~~~~~~~~~~~~~~
>> drivers/dma/sun6i-dma.c:99:48: warning: right shift count >= width of type [-Wshift-count-overflow]
      99 | #define SET_SRC_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 16)
         |                                                ^~
   drivers/dma/sun6i-dma.c:753:48: note: in expansion of macro 'SET_SRC_HIGH_ADDR'
     753 |                                 v_lli->para |= SET_SRC_HIGH_ADDR(sconfig->src_addr) |
         |                                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c:100:48: warning: right shift count >= width of type [-Wshift-count-overflow]
     100 | #define SET_DST_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 18)
         |                                                ^~
   drivers/dma/sun6i-dma.c:754:48: note: in expansion of macro 'SET_DST_HIGH_ADDR'
     754 |                                                SET_DST_HIGH_ADDR(sg_dma_address(sg));
         |                                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c: In function 'sun6i_dma_prep_dma_cyclic':
>> drivers/dma/sun6i-dma.c:99:48: warning: right shift count >= width of type [-Wshift-count-overflow]
      99 | #define SET_SRC_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 16)
         |                                                ^~
   drivers/dma/sun6i-dma.c:826:48: note: in expansion of macro 'SET_SRC_HIGH_ADDR'
     826 |                                 v_lli->para |= SET_SRC_HIGH_ADDR(buf_addr + period_len * i) |
         |                                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c:100:48: warning: right shift count >= width of type [-Wshift-count-overflow]
     100 | #define SET_DST_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 18)
         |                                                ^~
   drivers/dma/sun6i-dma.c:827:48: note: in expansion of macro 'SET_DST_HIGH_ADDR'
     827 |                                                SET_DST_HIGH_ADDR(sconfig->dst_addr);
         |                                                ^~~~~~~~~~~~~~~~~
>> drivers/dma/sun6i-dma.c:99:48: warning: right shift count >= width of type [-Wshift-count-overflow]
      99 | #define SET_SRC_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 16)
         |                                                ^~
   drivers/dma/sun6i-dma.c:835:48: note: in expansion of macro 'SET_SRC_HIGH_ADDR'
     835 |                                 v_lli->para |= SET_SRC_HIGH_ADDR(sconfig->src_addr) |
         |                                                ^~~~~~~~~~~~~~~~~
   drivers/dma/sun6i-dma.c:100:48: warning: right shift count >= width of type [-Wshift-count-overflow]
     100 | #define SET_DST_HIGH_ADDR(x)            ((((x) >> 32) & 0x3U) << 18)
         |                                                ^~
   drivers/dma/sun6i-dma.c:836:48: note: in expansion of macro 'SET_DST_HIGH_ADDR'
     836 |                                                SET_DST_HIGH_ADDR(buf_addr + period_len * i);
         |                                                ^~~~~~~~~~~~~~~~~


vim +99 drivers/dma/sun6i-dma.c

    92	
    93	/*
    94	 * LLI address mangling
    95	 *
    96	 * The LLI link physical address is also mangled, but we avoid dealing
    97	 * with that by allocating LLIs from the DMA32 zone.
    98	 */
  > 99	#define SET_SRC_HIGH_ADDR(x)		((((x) >> 32) & 0x3U) << 16)
   100	#define SET_DST_HIGH_ADDR(x)		((((x) >> 32) & 0x3U) << 18)
   101	

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-04-11 12:04 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-11  4:46 [PATCH v2 0/4] dmaengine: sun6i: Allwinner D1 support Samuel Holland
2022-04-11  4:46 ` [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1 Samuel Holland
2022-04-11  4:46 ` [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Samuel Holland
2022-04-11  8:10   ` kernel test robot
2022-04-11  8:20   ` kernel test robot
2022-04-11  4:46 ` [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses Samuel Holland
2022-04-11 12:03   ` kernel test robot
2022-04-11  4:46 ` [PATCH v2 4/4] dmaengine: sun6i: Add support for the D1 variant Samuel Holland

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