From: Tomer Maimon <tmaimon77@gmail.com>
To: avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au,
venture@google.com, yuenn@google.com, benjaminfair@google.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de, gregkh@linuxfoundation.org,
daniel.lezcano@linaro.org, tglx@linutronix.de,
wim@linux-watchdog.org, linux@roeck-us.net,
catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de,
olof@lixom.net, jirislaby@kernel.org, shawnguo@kernel.org,
bjorn.andersson@linaro.org, geert+renesas@glider.be,
marcel.ziswiler@toradex.com, vkoul@kernel.org,
biju.das.jz@bp.renesas.com, nobuhiro1.iwamatsu@toshiba.co.jp,
robert.hancock@calian.com, j.neuschaefer@gmx.net, lkundrak@v3.sk
Cc: soc@kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-serial@vger.kernel.org, linux-watchdog@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Tomer Maimon <tmaimon77@gmail.com>
Subject: [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX
Date: Sun, 22 May 2022 18:50:38 +0300 [thread overview]
Message-ID: <20220522155046.260146-12-tmaimon77@gmail.com> (raw)
In-Reply-To: <20220522155046.260146-1-tmaimon77@gmail.com>
Add binding document and device tree binding
constants for Nuvoton BMC NPCM8XX reset controller.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
.../bindings/reset/nuvoton,npcm-reset.txt | 17 ++-
.../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 124 ++++++++++++++++++
2 files changed, 139 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt
index cb1613092ee7..b7eb8615b68b 100644
--- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt
+++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt
@@ -1,14 +1,15 @@
Nuvoton NPCM Reset controller
Required properties:
-- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC
+- compatible : "nuvoton,npcm750-reset" for Poleg NPCM7XX BMC.
+ "nuvoton,npcm845-reset" for Arbel NPCM8XX BMC.
- reg : specifies physical base address and size of the register.
- #reset-cells: must be set to 2
- syscon: a phandle to access GCR registers.
Optional property:
- nuvoton,sw-reset-number - Contains the software reset number to restart the SoC.
- NPCM7xx contain four software reset that represent numbers 1 to 4.
+ NPCM7xx and NPCM8xx contain four software reset that represent numbers 1 to 4.
If 'nuvoton,sw-reset-number' is not specified software reset is disabled.
@@ -32,3 +33,15 @@ example:
};
The index could be found in <dt-bindings/reset/nuvoton,npcm7xx-reset.h>.
+
+Specifying reset lines connected to IP NPCM8XX modules
+======================================================
+example:
+
+ spi0: spi@..... {
+ ...
+ resets = <&rstc NPCM8XX_RESET_IPSRST2 NPCM8XX_RESET_PSPI1>;
+ ...
+ };
+
+The index could be found in <dt-bindings/reset/nuvoton,npcm8xx-reset.h>.
diff --git a/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
new file mode 100644
index 000000000000..4b832a0fd1dd
--- /dev/null
+++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+// Copyright (c) 2022 Nuvoton Technology corporation.
+
+#ifndef _DT_BINDINGS_NPCM8XX_RESET_H
+#define _DT_BINDINGS_NPCM8XX_RESET_H
+
+#define NPCM8XX_RESET_IPSRST1 0x20
+#define NPCM8XX_RESET_IPSRST2 0x24
+#define NPCM8XX_RESET_IPSRST3 0x34
+#define NPCM8XX_RESET_IPSRST4 0x74
+
+/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */
+#define NPCM8XX_RESET_GDMA0 3
+#define NPCM8XX_RESET_UDC1 5
+#define NPCM8XX_RESET_GMAC3 6
+#define NPCM8XX_RESET_UART_2_3 7
+#define NPCM8XX_RESET_UDC2 8
+#define NPCM8XX_RESET_PECI 9
+#define NPCM8XX_RESET_AES 10
+#define NPCM8XX_RESET_UART_0_1 11
+#define NPCM8XX_RESET_MC 12
+#define NPCM8XX_RESET_SMB2 13
+#define NPCM8XX_RESET_SMB3 14
+#define NPCM8XX_RESET_SMB4 15
+#define NPCM8XX_RESET_SMB5 16
+#define NPCM8XX_RESET_PWM_M0 18
+#define NPCM8XX_RESET_TIMER_0_4 19
+#define NPCM8XX_RESET_TIMER_5_9 20
+#define NPCM8XX_RESET_GMAC4 21
+#define NPCM8XX_RESET_UDC4 22
+#define NPCM8XX_RESET_UDC5 23
+#define NPCM8XX_RESET_UDC6 24
+#define NPCM8XX_RESET_UDC3 25
+#define NPCM8XX_RESET_ADC 27
+#define NPCM8XX_RESET_SMB6 28
+#define NPCM8XX_RESET_SMB7 29
+#define NPCM8XX_RESET_SMB0 30
+#define NPCM8XX_RESET_SMB1 31
+
+/* Reset lines on IP2 reset module (NPCM8XX_RESET_IPSRST2) */
+#define NPCM8XX_RESET_MFT0 0
+#define NPCM8XX_RESET_MFT1 1
+#define NPCM8XX_RESET_MFT2 2
+#define NPCM8XX_RESET_MFT3 3
+#define NPCM8XX_RESET_MFT4 4
+#define NPCM8XX_RESET_MFT5 5
+#define NPCM8XX_RESET_MFT6 6
+#define NPCM8XX_RESET_MFT7 7
+#define NPCM8XX_RESET_MMC 8
+#define NPCM8XX_RESET_GFX_SYS 10
+#define NPCM8XX_RESET_AHB_PCIBRG 11
+#define NPCM8XX_RESET_VDMA 12
+#define NPCM8XX_RESET_ECE 13
+#define NPCM8XX_RESET_VCD 14
+#define NPCM8XX_RESET_VIRUART1 16
+#define NPCM8XX_RESET_VIRUART2 17
+#define NPCM8XX_RESET_SIOX1 18
+#define NPCM8XX_RESET_SIOX2 19
+#define NPCM8XX_RESET_BT 20
+#define NPCM8XX_RESET_3DES 21
+#define NPCM8XX_RESET_PSPI2 23
+#define NPCM8XX_RESET_GMAC2 25
+#define NPCM8XX_RESET_USBH1 26
+#define NPCM8XX_RESET_GMAC1 28
+#define NPCM8XX_RESET_CP1 31
+
+/* Reset lines on IP3 reset module (NPCM8XX_RESET_IPSRST3) */
+#define NPCM8XX_RESET_PWM_M1 0
+#define NPCM8XX_RESET_SMB12 1
+#define NPCM8XX_RESET_SPIX 2
+#define NPCM8XX_RESET_SMB13 3
+#define NPCM8XX_RESET_UDC0 4
+#define NPCM8XX_RESET_UDC7 5
+#define NPCM8XX_RESET_UDC8 6
+#define NPCM8XX_RESET_UDC9 7
+#define NPCM8XX_RESET_USBHUB 8
+#define NPCM8XX_RESET_PCI_MAILBOX 9
+#define NPCM8XX_RESET_GDMA1 10
+#define NPCM8XX_RESET_GDMA2 11
+#define NPCM8XX_RESET_SMB14 12
+#define NPCM8XX_RESET_SHA 13
+#define NPCM8XX_RESET_SEC_ECC 14
+#define NPCM8XX_RESET_PCIE_RC 15
+#define NPCM8XX_RESET_TIMER_10_14 16
+#define NPCM8XX_RESET_RNG 17
+#define NPCM8XX_RESET_SMB15 18
+#define NPCM8XX_RESET_SMB8 19
+#define NPCM8XX_RESET_SMB9 20
+#define NPCM8XX_RESET_SMB10 21
+#define NPCM8XX_RESET_SMB11 22
+#define NPCM8XX_RESET_ESPI 23
+#define NPCM8XX_RESET_USB_PHY_1 24
+#define NPCM8XX_RESET_USB_PHY_2 25
+
+/* Reset lines on IP4 reset module (NPCM8XX_RESET_IPSRST4) */
+#define NPCM8XX_RESET_SMB16 0
+#define NPCM8XX_RESET_SMB17 1
+#define NPCM8XX_RESET_SMB18 2
+#define NPCM8XX_RESET_SMB19 3
+#define NPCM8XX_RESET_SMB20 4
+#define NPCM8XX_RESET_SMB21 5
+#define NPCM8XX_RESET_SMB22 6
+#define NPCM8XX_RESET_SMB23 7
+#define NPCM8XX_RESET_I3C0 8
+#define NPCM8XX_RESET_I3C1 9
+#define NPCM8XX_RESET_I3C2 10
+#define NPCM8XX_RESET_I3C3 11
+#define NPCM8XX_RESET_I3C4 12
+#define NPCM8XX_RESET_I3C5 13
+#define NPCM8XX_RESET_UART4 16
+#define NPCM8XX_RESET_UART5 17
+#define NPCM8XX_RESET_UART6 18
+#define NPCM8XX_RESET_PCIMBX2 19
+#define NPCM8XX_RESET_SMB24 22
+#define NPCM8XX_RESET_SMB25 23
+#define NPCM8XX_RESET_SMB26 24
+#define NPCM8XX_RESET_USBPHY3 25
+#define NPCM8XX_RESET_PCIRCPHY 27
+#define NPCM8XX_RESET_PWM_M2 28
+#define NPCM8XX_RESET_JTM1 29
+#define NPCM8XX_RESET_JTM2 30
+#define NPCM8XX_RESET_USBH2 31
+
+#endif
--
2.33.0
next prev parent reply other threads:[~2022-05-22 15:58 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-22 15:50 [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 01/19] dt-bindings: timer: npcm: Add npcm845 compatible string Tomer Maimon
2022-05-23 7:31 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 02/19] clocksource: timer-npcm7xx: Add NPCM845 timer support Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 03/19] dt-bindings: serial: 8250: Add npcm845 compatible string Tomer Maimon
2022-05-23 7:32 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 04/19] tty: serial: 8250: Add NPCM845 UART support Tomer Maimon
2022-05-23 9:56 ` Arnd Bergmann
[not found] ` <CAP6Zq1jk=wf3VbxttrHZwS-wywMoO4upgMQH4yr2AeKwYV8G4Q@mail.gmail.com>
2022-05-23 13:06 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 05/19] dt-bindings: watchdog: npcm: Add npcm845 compatible string Tomer Maimon
2022-05-23 7:32 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 06/19] watchdog: npcm_wdt: Add NPCM845 watchdog support Tomer Maimon
2022-05-22 16:45 ` Guenter Roeck
2022-05-22 15:50 ` [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock Tomer Maimon
2022-05-23 7:35 ` Krzysztof Kozlowski
[not found] ` <20220526192412.8ECAAC385A9@smtp.kernel.org>
2022-05-30 14:39 ` Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 08/19] clk: npcm8xx: add clock controller Tomer Maimon
2022-05-23 7:07 ` Ilpo Järvinen
2022-05-22 15:50 ` [PATCH v1 09/19] dt-bindings: reset: add syscon property Tomer Maimon
2022-05-23 7:39 ` Krzysztof Kozlowski
[not found] ` <CAP6Zq1gGZguC9h4A6KL8x1QLf3MAZvvBiA2nmcK_4PS7AdNa+Q@mail.gmail.com>
2022-05-23 13:45 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 10/19] reset: npcm: using syscon instead of device data Tomer Maimon
2022-05-23 8:54 ` Krzysztof Kozlowski
2022-05-22 15:50 ` Tomer Maimon [this message]
2022-05-23 9:01 ` [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX Krzysztof Kozlowski
[not found] ` <CAP6Zq1i2Wj4FCA4-eseVoJyMof5=ocFCUcitVquJqYJ4Z3JTYQ@mail.gmail.com>
2022-05-23 14:22 ` Geert Uytterhoeven
2022-05-23 14:26 ` Krzysztof Kozlowski
2022-05-23 15:11 ` Geert Uytterhoeven
2022-05-23 15:22 ` Krzysztof Kozlowski
2022-05-23 15:24 ` Krzysztof Kozlowski
2022-05-24 7:26 ` Tomer Maimon
2022-05-23 14:23 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 12/19] reset: npcm: Add NPCM8XX support Tomer Maimon
2022-05-23 10:44 ` Arnd Bergmann
2022-05-22 15:50 ` [PATCH v1 13/19] dt-bindings: arm: npcm: Add maintainer Tomer Maimon
2022-06-02 12:58 ` Rob Herring
2022-05-22 15:50 ` [PATCH v1 14/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string Tomer Maimon
2022-05-23 9:02 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR " Tomer Maimon
2022-05-23 9:02 ` Krzysztof Kozlowski
2022-05-23 9:02 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 16/19] arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree Tomer Maimon
2022-05-23 9:08 ` Krzysztof Kozlowski
2022-05-23 13:58 ` Geert Uytterhoeven
2022-05-23 14:16 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 18/19] arm64: dts: nuvoton: Add initial NPCM845 EVB " Tomer Maimon
2022-05-23 9:26 ` Krzysztof Kozlowski
2022-05-23 9:39 ` Arnd Bergmann
[not found] ` <CAP6Zq1j8PEQ2m7rG5YztesiOfXExCr=UMPFhD=Oe+GYDwGP95g@mail.gmail.com>
2022-05-23 15:37 ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 19/19] arm64: defconfig: Add Nuvoton NPCM family support Tomer Maimon
2022-05-23 9:52 ` [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Arnd Bergmann
2022-05-30 12:24 ` Andy Shevchenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220522155046.260146-12-tmaimon77@gmail.com \
--to=tmaimon77@gmail.com \
--cc=arnd@arndb.de \
--cc=avifishman70@gmail.com \
--cc=benjaminfair@google.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=bjorn.andersson@linaro.org \
--cc=catalin.marinas@arm.com \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=geert+renesas@glider.be \
--cc=gregkh@linuxfoundation.org \
--cc=j.neuschaefer@gmx.net \
--cc=jirislaby@kernel.org \
--cc=joel@jms.id.au \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-watchdog@vger.kernel.org \
--cc=linux@roeck-us.net \
--cc=lkundrak@v3.sk \
--cc=marcel.ziswiler@toradex.com \
--cc=mturquette@baylibre.com \
--cc=nobuhiro1.iwamatsu@toshiba.co.jp \
--cc=olof@lixom.net \
--cc=p.zabel@pengutronix.de \
--cc=robert.hancock@calian.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=shawnguo@kernel.org \
--cc=soc@kernel.org \
--cc=tali.perry1@gmail.com \
--cc=tglx@linutronix.de \
--cc=venture@google.com \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
--cc=wim@linux-watchdog.org \
--cc=yuenn@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).