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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "Tomer Maimon" <tmaimon77@gmail.com>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Greg KH" <gregkh@linuxfoundation.org>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
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Subject: Re: [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX
Date: Mon, 23 May 2022 17:11:30 +0200	[thread overview]
Message-ID: <CAMuHMdVFV02t+vbwzEpNbpkSP4M3sGnJpzFMPBw7RkrJ9YvyKw@mail.gmail.com> (raw)
In-Reply-To: <62562cdf-93e3-f642-5bbd-48329eff33ea@linaro.org>

Hi Krzysztof,

On Mon, May 23, 2022 at 4:26 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
> On 23/05/2022 16:22, Geert Uytterhoeven wrote:
> > On Mon, May 23, 2022 at 4:03 PM Tomer Maimon <tmaimon77@gmail.com> wrote:
> >> On Mon, 23 May 2022 at 12:01, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> >>> On 22/05/2022 17:50, Tomer Maimon wrote:
> >>>> Add binding document and device tree binding
> >>>> constants for Nuvoton BMC NPCM8XX reset controller.
> >>>>
> >>>> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> >
> >>>> --- /dev/null
> >>>> +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> >>>> @@ -0,0 +1,124 @@
> >>>> +/* SPDX-License-Identifier: GPL-2.0 */
> >>>> +// Copyright (c) 2022 Nuvoton Technology corporation.
> >>>> +
> >>>> +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H
> >>>> +#define _DT_BINDINGS_NPCM8XX_RESET_H
> >>>> +
> >>>> +#define NPCM8XX_RESET_IPSRST1                0x20
> >>>> +#define NPCM8XX_RESET_IPSRST2                0x24
> >>>> +#define NPCM8XX_RESET_IPSRST3                0x34
> >>>> +#define NPCM8XX_RESET_IPSRST4                0x74
> >>>
> >>> What are these? All IDs should be incremental, decimal and start from 0.
> >>
> >> Register offset, we use the same method in NPCM7xx. please refer
> >> https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h
> >>
> >> and the driver asserts the reset according to the reset include definitions
> >
> > So if they're easy to look up the values, you could do without the
> > definitions? Cfr. the interrupts properties in .dtsi files, where we
> > typically just use the hardcoded numbers.
> >
> > If you do decide to keep them, a comment explaining their origins
> > would be useful.
> >
> >>>> +
> >>>> +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */
> >>>> +#define NPCM8XX_RESET_GDMA0          3
> >>>
> >>> IDs start from 0 and do not have holes.
> >>
> >> This represents the reset BIT in the reset register.
> >
> > Likewise, I think it's a good idea to document that in a comment, cfr.
> > https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/power/r8a7795-sysc.h#L8
>
> Renesas is also doing it not correct (just like many others). The
> bindings are not for register bits or offsets. Such data can be DTS but
> not part of bindings.

I think you are taking a too-extremist standpoint.
The two extremes are:
  1. Numbers correspond to hardware numbers, and are easy to look up
    in the hardware documentation (e.g. GIC SPI interrupt numbers).
     => Use the hardcoded numbers in DTS.
  2. Numbers do not correspond to hardware numbers, so we had to
     invent our own definitions and numbers, usually loosely
     based on some table in the hardware documentation.
     The driver will have to look up the numbers in a data
     structure, to know how to program the hardware.
     The numbers become part of the DT ABI, and cannot be changed
     (header file is append-only).
     => Use the binding definitions in DTS.

We are taking the middle ground: there is a one-to-one relation between
numbers and hardware numbers that can be looked up in or derived from
the hardware documentation, but the conversion is non-trivial (for the
casual human reviewer), or the documentation refers to names instead
of numbers in most sections (e.g. named power domains). Then why not
let the numbers match some feature in the hardware (e.g. register
offset or register bit)?

> Imagine now you made mistake in this register
> offset and hardware uses slightly different value. What now? Change
> bindings? No. Bindings hold here ID, the abstraction, and ID stays fixed.

I see no difference here with using the wrong interrupt number in an
interrupts property in DTS.  What do we do in that case? Fix the DTS.

BTW, are you aware of any driver that transforms interrupt numbers
obtained from DTS, because the DTS used the wrong number?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2022-05-23 15:12 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-22 15:50 [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 01/19] dt-bindings: timer: npcm: Add npcm845 compatible string Tomer Maimon
2022-05-23  7:31   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 02/19] clocksource: timer-npcm7xx: Add NPCM845 timer support Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 03/19] dt-bindings: serial: 8250: Add npcm845 compatible string Tomer Maimon
2022-05-23  7:32   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 04/19] tty: serial: 8250: Add NPCM845 UART support Tomer Maimon
2022-05-23  9:56   ` Arnd Bergmann
     [not found]     ` <CAP6Zq1jk=wf3VbxttrHZwS-wywMoO4upgMQH4yr2AeKwYV8G4Q@mail.gmail.com>
2022-05-23 13:06       ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 05/19] dt-bindings: watchdog: npcm: Add npcm845 compatible string Tomer Maimon
2022-05-23  7:32   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 06/19] watchdog: npcm_wdt: Add NPCM845 watchdog support Tomer Maimon
2022-05-22 16:45   ` Guenter Roeck
2022-05-22 15:50 ` [PATCH v1 07/19] dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock Tomer Maimon
2022-05-23  7:35   ` Krzysztof Kozlowski
     [not found]   ` <20220526192412.8ECAAC385A9@smtp.kernel.org>
2022-05-30 14:39     ` Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 08/19] clk: npcm8xx: add clock controller Tomer Maimon
2022-05-23  7:07   ` Ilpo Järvinen
2022-05-22 15:50 ` [PATCH v1 09/19] dt-bindings: reset: add syscon property Tomer Maimon
2022-05-23  7:39   ` Krzysztof Kozlowski
     [not found]     ` <CAP6Zq1gGZguC9h4A6KL8x1QLf3MAZvvBiA2nmcK_4PS7AdNa+Q@mail.gmail.com>
2022-05-23 13:45       ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 10/19] reset: npcm: using syscon instead of device data Tomer Maimon
2022-05-23  8:54   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX Tomer Maimon
2022-05-23  9:01   ` Krzysztof Kozlowski
     [not found]     ` <CAP6Zq1i2Wj4FCA4-eseVoJyMof5=ocFCUcitVquJqYJ4Z3JTYQ@mail.gmail.com>
2022-05-23 14:22       ` Geert Uytterhoeven
2022-05-23 14:26         ` Krzysztof Kozlowski
2022-05-23 15:11           ` Geert Uytterhoeven [this message]
2022-05-23 15:22             ` Krzysztof Kozlowski
2022-05-23 15:24               ` Krzysztof Kozlowski
2022-05-24  7:26               ` Tomer Maimon
2022-05-23 14:23       ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 12/19] reset: npcm: Add NPCM8XX support Tomer Maimon
2022-05-23 10:44   ` Arnd Bergmann
2022-05-22 15:50 ` [PATCH v1 13/19] dt-bindings: arm: npcm: Add maintainer Tomer Maimon
2022-06-02 12:58   ` Rob Herring
2022-05-22 15:50 ` [PATCH v1 14/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string Tomer Maimon
2022-05-23  9:02   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 15/19] dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR " Tomer Maimon
2022-05-23  9:02   ` Krzysztof Kozlowski
2022-05-23  9:02   ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 16/19] arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC Tomer Maimon
2022-05-22 15:50 ` [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree Tomer Maimon
2022-05-23  9:08   ` Krzysztof Kozlowski
2022-05-23 13:58     ` Geert Uytterhoeven
2022-05-23 14:16       ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 18/19] arm64: dts: nuvoton: Add initial NPCM845 EVB " Tomer Maimon
2022-05-23  9:26   ` Krzysztof Kozlowski
2022-05-23  9:39   ` Arnd Bergmann
     [not found]     ` <CAP6Zq1j8PEQ2m7rG5YztesiOfXExCr=UMPFhD=Oe+GYDwGP95g@mail.gmail.com>
2022-05-23 15:37       ` Krzysztof Kozlowski
2022-05-22 15:50 ` [PATCH v1 19/19] arm64: defconfig: Add Nuvoton NPCM family support Tomer Maimon
2022-05-23  9:52 ` [PATCH v1 00/19] Introduce Nuvoton Arbel NPCM8XX BMC SoC Arnd Bergmann
2022-05-30 12:24   ` Andy Shevchenko

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