[PATCH v1 0/9] reset: replace reset-lantiq with reset-intel-gw

[PATCH v1 0/9] reset: replace reset-lantiq with reset-intel-gw

[Martin Blumenstingl]

Hello,

in the discussion when the reset-intel-gw driver was added it came up
that the IP in the Intel LGM SoCs is backwards compatible with the older
Lantiq SoCs. This series removes the reset-lantiq driver and replaces it
with the reset-intel-gw driver.

The transition is relatively straight forward:
- compatible strings from the old bindings (from
  Documentation/devicetree/bindings/mips/lantiq/rcu.txt) are moved over
  to intel,rcu-gw.yaml
- missing compatible strings (for Amazon-SE, Danube and xRX100) are
  added directly to intel,rcu-gw.yaml
- update the driver to map the registers using syscon on legacy SoCs as
  some RCU registers are shared with various peripherals (there's nested
  USB PHYs and other peripherals have endianness configuration registers
  in the RCU register space)
- update the .dts(i) files (I already prepared patches for downstream
  OpenWrt, which is the only known user of these SoCs)

Patch #3 (dt-bindings for the reset controller) depends on patch #1
(dt-bindings for the USB2 PHYs). I think it would be easiest to also
take patch #1 through the reset tree since it's a simple txt -> yaml
conversion.
If needed I can send patch #9 separately so it can go through the MIPS
tree.

PS: I Cc'ed Rahul Tanwar who has previously stepped up as a maintainer
for the drivers on the Intel LGM SoCs, which is where the reset-intel-gw
driver was introduced. He's now with MaxLinear who took over Intel's
AnyWAN department (where the LGM SoCs were developed) in 2020.


Martin Blumenstingl (9):
  dt-bindings: phy: lantiq: xway-rcu-usb2-phy: Convert to YAML
  dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items
  dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs
  dt-bindings: mips: lantiq: rcu: Remove binding documentation
  reset: intel: Allow enabling the driver on "LANTIQ" (MIPS) platforms
  reset: intel: Add and update compatible strings Lantiq SoCs
  reset: intel: Use syscon_node_to_regmap on legacy SoCs
  reset: lantiq: Remove driver as it has been replaced by reset-intel-gw
  mips: dts: lantiq: Update the RCU node to match the intel,rcu-gw
    binding

 .../devicetree/bindings/mips/lantiq/rcu.txt   |  69 ------
 .../phy/lantiq,xway-rcu-usb2-phy.yaml         |  68 ++++++
 .../bindings/phy/phy-lantiq-rcu-usb2.txt      |  40 ----
 .../bindings/reset/intel,rcu-gw.yaml          |  88 +++++++-
 arch/mips/boot/dts/lantiq/danube.dtsi         |  20 +-
 drivers/reset/Kconfig                         |  11 +-
 drivers/reset/Makefile                        |   1 -
 drivers/reset/reset-intel-gw.c                |  36 ++-
 drivers/reset/reset-lantiq.c                  | 210 ------------------
 9 files changed, 197 insertions(+), 346 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt
 create mode 100644 Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
 delete mode 100644 drivers/reset/reset-lantiq.c

-- 
2.36.1

[PATCH v1 1/9] dt-bindings: phy: lantiq: xway-rcu-usb2-phy: Convert to YAML

[Martin Blumenstingl]

Convert the Lantiq XWAY RCU USB2 PHY bindings to YAML.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../phy/lantiq,xway-rcu-usb2-phy.yaml         | 68 +++++++++++++++++++
 .../bindings/phy/phy-lantiq-rcu-usb2.txt      | 40 -----------
 2 files changed, 68 insertions(+), 40 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
new file mode 100644
index 000000000000..702a8e8c64b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/lantiq,xway-rcu-usb2-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
+
+maintainers:
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+properties:
+  "#phy-cells":
+    const: 0
+
+  compatible:
+    enum:
+      - lantiq,ase-usb2-phy
+      - lantiq,danube-usb2-phy
+      - lantiq,xrx100-usb2-phy
+      - lantiq,xrx200-usb2-phy
+      - lantiq,xrx300-usb2-phy
+
+  reg:
+    minItems: 2
+
+  clocks:
+    minItems: 1
+
+  clock-names:
+    items:
+      - const: phy
+
+  resets:
+    minItems: 1
+    maxItems: 2
+
+  reset-names:
+    items:
+      - const: phy
+      - const: ctrl
+
+required:
+  - "#phy-cells"
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+additionalProperties: false
+
+examples:
+  - |
+    usb_phy0: usb2-phy@18 {
+        compatible = "lantiq,xrx200-usb2-phy";
+        reg = <0x18 4>, <0x38 4>;
+
+        clocks = <&pmu_USB0_PHY>;
+        clock-names = "phy";
+
+        resets = <&reset1 4 4>, <&reset0 4 4>;
+        reset-names = "phy", "ctrl";
+
+        #phy-cells = <0>;
+    };
+...
diff --git a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt b/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
deleted file mode 100644
index 643948b6b576..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
+++ /dev/null
@@ -1,40 +0,0 @@
-Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
-===========================================
-
-This binding describes the USB PHY hardware provided by the RCU module on the
-Lantiq XWAY SoCs.
-
-This node has to be a sub node of the Lantiq RCU block.
-
--------------------------------------------------------------------------------
-Required properties (controller (parent) node):
-- compatible	: Should be one of
-			"lantiq,ase-usb2-phy"
-			"lantiq,danube-usb2-phy"
-			"lantiq,xrx100-usb2-phy"
-			"lantiq,xrx200-usb2-phy"
-			"lantiq,xrx300-usb2-phy"
-- reg		: Defines the following sets of registers in the parent
-		  syscon device
-			- Offset of the USB PHY configuration register
-			- Offset of the USB Analog configuration
-			  register (only for xrx200 and xrx200)
-- clocks	: References to the (PMU) "phy" clk gate.
-- clock-names	: Must be "phy"
-- resets	: References to the RCU USB configuration reset bits.
-- reset-names	: Must be one of the following:
-			"phy" (optional)
-			"ctrl" (shared)
-
--------------------------------------------------------------------------------
-Example for the USB PHYs on an xRX200 SoC:
-	usb_phy0: usb2-phy@18 {
-		compatible = "lantiq,xrx200-usb2-phy";
-		reg = <0x18 4>, <0x38 4>;
-
-		clocks = <&pmu PMU_GATE_USB0_PHY>;
-		clock-names = "phy";
-		resets = <&reset1 4 4>, <&reset0 4 4>;
-		reset-names = "phy", "ctrl";
-		#phy-cells = <0>;
-	};
-- 
2.36.1

[PATCH v1 2/9] dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items

[Martin Blumenstingl]

Legacy SoCs use three elements for the global reset:
- offset
- reset bit
- status bit

Allow this in the dt-bindings as well.

Fixes: b7ab0cb00d086b ("dt-bindings: reset: Add YAML schemas for the Intel Reset controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
index 13bf6bb3f097..be64f8597710 100644
--- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
+++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
@@ -22,11 +22,15 @@ properties:
   intel,global-reset:
     description: Global reset register offset and bit offset.
     $ref: /schemas/types.yaml#/definitions/uint32-array
+    minItems: 2
     items:
       - description: Register offset
       - description: Register bit offset
         minimum: 0
         maximum: 31
+      - description: Status bit offset (only if "#reset-cells" is 3)
+        minimum: 0
+        maximum: 31
 
   "#reset-cells":
     minimum: 2
-- 
2.36.1

[PATCH v1 3/9] dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs

[Martin Blumenstingl]

The Lantiq Amazon-SE, Danube, xRX100 and xRX200 SoCs have up to two USB2
PHYs which are part of the RCU register space. The RCU registers on
these SoCs are using big endian. Update the binding for these SoCs to
properly describe this IP:
- Add compatible strings for Amazon-SE, Danube and xRX100
- Rename the xRX200 compatible string (which is not used anywhere) and
  switch to the one previously documented in mips/lantiq/rcu.txt
- Allow usage of "simple-mfd" and "syscon" in the compatible string so the
  child devices (USB2 PHYs) can be described
- Allow #address-cells and #size-cells to be set to 1 for describing the
  child devices (USB2 PHYs)
- #reset-cells must always be 3 (offset, reset bit and status bit) on the
  legacy SoCs while LGM uses a fixed value of 2 (offset and reset bit -
  status bit is always identical to the reset bit).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../bindings/reset/intel,rcu-gw.yaml          | 84 +++++++++++++++++--
 1 file changed, 79 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
index be64f8597710..b90913c7b7d3 100644
--- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
+++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
@@ -11,9 +11,16 @@ maintainers:
 
 properties:
   compatible:
-    enum:
-      - intel,rcu-lgm
-      - intel,rcu-xrx200
+    oneOf:
+      - items:
+          - enum:
+              - lantiq,ase-rcu
+              - lantiq,danube-rcu
+              - lantiq,xrx100-rcu
+              - lantiq,xrx200-rcu
+          - const: simple-mfd
+          - const: syscon
+      - const: intel,rcu-lgm
 
   reg:
     description: Reset controller registers.
@@ -33,8 +40,6 @@ properties:
         maximum: 31
 
   "#reset-cells":
-    minimum: 2
-    maximum: 3
     description: |
       First cell is reset request register offset.
       Second cell is bit offset in reset request register.
@@ -43,6 +48,43 @@ properties:
       reset request and reset status registers is same. Whereas
       3 for legacy SoCs as bit offset differs.
 
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  big-endian: true
+
+patternProperties:
+  "^usb2-phy@[0-9a-f]+$":
+    type: object
+    $ref: "../phy/lantiq,xway-rcu-usb2-phy.yaml"
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: intel,rcu-lgm
+    then:
+      properties:
+        "#reset-cells":
+          const: 2
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - lantiq,ase-rcu
+              - lantiq,danube-rcu
+              - lantiq,xrx100-rcu
+              - lantiq,xrx200-rcu
+    then:
+      properties:
+        "#reset-cells":
+          const: 3
+
 required:
   - compatible
   - reg
@@ -67,3 +109,35 @@ examples:
         #pwm-cells = <2>;
         resets = <&rcu0 0x30 21>;
     };
+  - |
+    rcu_xrx200: rcu@203000 {
+        compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
+        reg = <0x203000 0x100>;
+        big-endian;
+
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        #reset-cells = <3>;
+        intel,global-reset = <0x10 30 29>;
+
+        usb_phy0: usb2-phy@18 {
+            compatible = "lantiq,xrx200-usb2-phy";
+            reg = <0x18 4>, <0x38 4>;
+            status = "disabled";
+
+            resets = <&rcu_xrx200 0x48 4 4>, <&rcu_xrx200 0x10 4 4>;
+            reset-names = "phy", "ctrl";
+            #phy-cells = <0>;
+        };
+
+        usb_phy1: usb2-phy@34 {
+            compatible = "lantiq,xrx200-usb2-phy";
+            reg = <0x34 4>, <0x3c 4>;
+            status = "disabled";
+
+            resets = <&rcu_xrx200 0x48 5 5>, <&rcu_xrx200 0x10 4 4>;
+            reset-names = "phy", "ctrl";
+            #phy-cells = <0>;
+        };
+    };
-- 
2.36.1

[PATCH v1 4/9] dt-bindings: mips: lantiq: rcu: Remove binding documentation

[Martin Blumenstingl]

This is now part of:
Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml

The PHYs are still using sub-nodes while the reset-controller is moved
to the main RCU node. Also the system reboot is now described directly
in intel,rcu-gw.yaml which makes the syscon-reboot node obsolete.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../devicetree/bindings/mips/lantiq/rcu.txt   | 69 -------------------
 1 file changed, 69 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt

diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
deleted file mode 100644
index 58d51f480c9e..000000000000
--- a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
+++ /dev/null
@@ -1,69 +0,0 @@
-Lantiq XWAY SoC RCU binding
-===========================
-
-This binding describes the RCU (reset controller unit) multifunction device,
-where each sub-device has it's own set of registers.
-
-The RCU register range is used for multiple purposes. Mostly one device
-uses one or multiple register exclusively, but for some registers some
-bits are for one driver and some other bits are for a different driver.
-With this patch all accesses to the RCU registers will go through
-syscon.
-
-
--------------------------------------------------------------------------------
-Required properties:
-- compatible	: The first and second values must be:
-		  "lantiq,xrx200-rcu", "simple-mfd", "syscon"
-- reg		: The address and length of the system control registers
-
-
--------------------------------------------------------------------------------
-Example of the RCU bindings on a xRX200 SoC:
-	rcu0: rcu@203000 {
-		compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
-		reg = <0x203000 0x100>;
-		ranges = <0x0 0x203000 0x100>;
-		big-endian;
-
-		reset0: reset-controller@10 {
-			compatible = "lantiq,xrx200-reset";
-			reg = <0x10 4>, <0x14 4>;
-
-			#reset-cells = <2>;
-		};
-
-		reset1: reset-controller@48 {
-			compatible = "lantiq,xrx200-reset";
-			reg = <0x48 4>, <0x24 4>;
-
-			#reset-cells = <2>;
-		};
-
-		usb_phy0: usb2-phy@18 {
-			compatible = "lantiq,xrx200-usb2-phy";
-			reg = <0x18 4>, <0x38 4>;
-
-			resets = <&reset1 4 4>, <&reset0 4 4>;
-			reset-names = "phy", "ctrl";
-			#phy-cells = <0>;
-		};
-
-		usb_phy1: usb2-phy@34 {
-			compatible = "lantiq,xrx200-usb2-phy";
-			reg = <0x34 4>, <0x3C 4>;
-
-			resets = <&reset1 5 4>, <&reset0 4 4>;
-			reset-names = "phy", "ctrl";
-			#phy-cells = <0>;
-		};
-
-		reboot@10 {
-			compatible = "syscon-reboot";
-			reg = <0x10 4>;
-
-			regmap = <&rcu0>;
-			offset = <0x10>;
-			mask = <0x40000000>;
-		};
-	};
-- 
2.36.1

[PATCH v1 5/9] reset: intel: Allow enabling the driver on "LANTIQ" (MIPS) platforms

[Martin Blumenstingl]

Lantiq MIPS SoC use CONFIG_LANTIQ. Allow enabling the Intel GW reset
driver there as well so we can get rid of the reset-lantiq driver in
future.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/reset/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 93c8d07ee328..68a5ea44612e 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -84,7 +84,7 @@ config RESET_IMX7
 
 config RESET_INTEL_GW
 	bool "Intel Reset Controller Driver"
-	depends on X86 || COMPILE_TEST
+	depends on X86 || LANTIQ || COMPILE_TEST
 	depends on OF && HAS_IOMEM
 	select REGMAP_MMIO
 	help
-- 
2.36.1

[PATCH v1 6/9] reset: intel: Add and update compatible strings Lantiq SoCs

[Martin Blumenstingl]

Amazon-SE, Danube and xRX100 only have one reset request and one status
register whereas xRX200 has two of each. Add compatible strings for the
former three and update the compatible string for xRX200 to the same as
in Documentation/devicetree/bindings/mips/lantiq/rcu.txt (old RCU
binding documentation).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/reset/reset-intel-gw.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/reset/reset-intel-gw.c b/drivers/reset/reset-intel-gw.c
index effc177db80a..46ed7a693666 100644
--- a/drivers/reset/reset-intel-gw.c
+++ b/drivers/reset/reset-intel-gw.c
@@ -223,7 +223,7 @@ static int intel_reset_probe(struct platform_device *pdev)
 	return 0;
 }
 
-static const struct intel_reset_soc xrx200_data = {
+static const struct intel_reset_soc xway_data = {
 	.legacy =		true,
 	.reset_cell_count =	3,
 };
@@ -235,7 +235,10 @@ static const struct intel_reset_soc lgm_data = {
 
 static const struct of_device_id intel_reset_match[] = {
 	{ .compatible = "intel,rcu-lgm", .data = &lgm_data },
-	{ .compatible = "intel,rcu-xrx200", .data = &xrx200_data },
+	{ .compatible = "lantiq,ase-rcu", .data = &xway_data },
+	{ .compatible = "lantiq,danube-rcu", .data = &xway_data },
+	{ .compatible = "lantiq,xrx100-rcu", .data = &xway_data },
+	{ .compatible = "lantiq,xrx200-rcu", .data = &xway_data },
 	{}
 };
 
-- 
2.36.1

[PATCH v1 7/9] reset: intel: Use syscon_node_to_regmap on legacy SoCs

[Martin Blumenstingl]

Older Lantiq (called "legacy") SoCs the RCU registers have more than
just the reset controller registers. It additionally contains boot
media selection information, up to two USB2 PHYs and configuration for
various other peripherals (such as the PCIe PHY). use
syscon_node_to_regmap() to obtain the regmap on these SoCs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/reset/Kconfig          |  3 ++-
 drivers/reset/reset-intel-gw.c | 29 +++++++++++++++++++----------
 2 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 68a5ea44612e..fb49c465078f 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -86,7 +86,8 @@ config RESET_INTEL_GW
 	bool "Intel Reset Controller Driver"
 	depends on X86 || LANTIQ || COMPILE_TEST
 	depends on OF && HAS_IOMEM
-	select REGMAP_MMIO
+	select REGMAP_MMIO if X86
+	select MFD_SYSCON if LANTIQ
 	help
 	  This enables the reset controller driver for Intel Gateway SoCs.
 	  Say Y to control the reset signals provided by reset controller.
diff --git a/drivers/reset/reset-intel-gw.c b/drivers/reset/reset-intel-gw.c
index 46ed7a693666..0bf7fe4e77ae 100644
--- a/drivers/reset/reset-intel-gw.c
+++ b/drivers/reset/reset-intel-gw.c
@@ -5,6 +5,7 @@
  */
 
 #include <linux/bitfield.h>
+#include <linux/mfd/syscon.h>
 #include <linux/init.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
@@ -170,7 +171,6 @@ static int intel_reset_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	struct device *dev = &pdev->dev;
 	struct intel_reset_data *data;
-	void __iomem *base;
 	u32 rb_id[3];
 	int ret;
 
@@ -182,15 +182,24 @@ static int intel_reset_probe(struct platform_device *pdev)
 	if (!data->soc_data)
 		return -ENODEV;
 
-	base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(base))
-		return PTR_ERR(base);
-
-	data->regmap = devm_regmap_init_mmio(dev, base,
-					     &intel_rcu_regmap_config);
-	if (IS_ERR(data->regmap)) {
-		dev_err(dev, "regmap initialization failed\n");
-		return PTR_ERR(data->regmap);
+	if (data->soc_data->legacy) {
+		data->regmap = syscon_node_to_regmap(dev->of_node);
+		if (IS_ERR(data->regmap))
+			return dev_err_probe(dev, PTR_ERR(data->regmap),
+					     "Failed to get regmap from syscon node\n");
+	} else {
+		void __iomem *base;
+
+		base = devm_platform_ioremap_resource(pdev, 0);
+		if (IS_ERR(base))
+			return PTR_ERR(base);
+
+		data->regmap = devm_regmap_init_mmio(dev, base,
+						     &intel_rcu_regmap_config);
+		if (IS_ERR(data->regmap)) {
+			dev_err(dev, "regmap initialization failed\n");
+			return PTR_ERR(data->regmap);
+		}
 	}
 
 	ret = device_property_read_u32_array(dev, "intel,global-reset", rb_id,
-- 
2.36.1

[PATCH v1 8/9] reset: lantiq: Remove driver as it has been replaced by reset-intel-gw

[Martin Blumenstingl]

Now that we have replaced the reset-lantiq driver with the
reset-intel-gw driver we can remove the old code.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/reset/Kconfig        |   6 -
 drivers/reset/Makefile       |   1 -
 drivers/reset/reset-lantiq.c | 210 -----------------------------------
 3 files changed, 217 deletions(-)
 delete mode 100644 drivers/reset/reset-lantiq.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index fb49c465078f..22e28f5cf154 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -103,12 +103,6 @@ config RESET_K210
 	  Say Y if you want to control reset signals provided by this
 	  controller.
 
-config RESET_LANTIQ
-	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
-	default SOC_TYPE_XWAY
-	help
-	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
-
 config RESET_LPC18XX
 	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
 	default ARCH_LPC18XX
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index a80a9c4008a7..9cb37e7890f1 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
 obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
 obj-$(CONFIG_RESET_K210) += reset-k210.o
-obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
diff --git a/drivers/reset/reset-lantiq.c b/drivers/reset/reset-lantiq.c
deleted file mode 100644
index b936cfe85641..000000000000
--- a/drivers/reset/reset-lantiq.c
+++ /dev/null
@@ -1,210 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- *
- *  Copyright (C) 2010 John Crispin <blogic@phrozen.org>
- *  Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
- *  Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
- *  Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
- */
-
-#include <linux/mfd/syscon.h>
-#include <linux/module.h>
-#include <linux/regmap.h>
-#include <linux/reset-controller.h>
-#include <linux/of_address.h>
-#include <linux/of_platform.h>
-#include <linux/platform_device.h>
-#include <linux/property.h>
-
-#define LANTIQ_RCU_RESET_TIMEOUT	10000
-
-struct lantiq_rcu_reset_priv {
-	struct reset_controller_dev rcdev;
-	struct device *dev;
-	struct regmap *regmap;
-	u32 reset_offset;
-	u32 status_offset;
-};
-
-static struct lantiq_rcu_reset_priv *to_lantiq_rcu_reset_priv(
-	struct reset_controller_dev *rcdev)
-{
-	return container_of(rcdev, struct lantiq_rcu_reset_priv, rcdev);
-}
-
-static int lantiq_rcu_reset_status(struct reset_controller_dev *rcdev,
-				   unsigned long id)
-{
-	struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
-	unsigned int status = (id >> 8) & 0x1f;
-	u32 val;
-	int ret;
-
-	ret = regmap_read(priv->regmap, priv->status_offset, &val);
-	if (ret)
-		return ret;
-
-	return !!(val & BIT(status));
-}
-
-static int lantiq_rcu_reset_status_timeout(struct reset_controller_dev *rcdev,
-					   unsigned long id, bool assert)
-{
-	int ret;
-	int retry = LANTIQ_RCU_RESET_TIMEOUT;
-
-	do {
-		ret = lantiq_rcu_reset_status(rcdev, id);
-		if (ret < 0)
-			return ret;
-		if (ret == assert)
-			return 0;
-		usleep_range(20, 40);
-	} while (--retry);
-
-	return -ETIMEDOUT;
-}
-
-static int lantiq_rcu_reset_update(struct reset_controller_dev *rcdev,
-				   unsigned long id, bool assert)
-{
-	struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
-	unsigned int set = id & 0x1f;
-	u32 val = assert ? BIT(set) : 0;
-	int ret;
-
-	ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set),
-				 val);
-	if (ret) {
-		dev_err(priv->dev, "Failed to set reset bit %u\n", set);
-		return ret;
-	}
-
-
-	ret = lantiq_rcu_reset_status_timeout(rcdev, id, assert);
-	if (ret)
-		dev_err(priv->dev, "Failed to %s bit %u\n",
-			assert ? "assert" : "deassert", set);
-
-	return ret;
-}
-
-static int lantiq_rcu_reset_assert(struct reset_controller_dev *rcdev,
-			     unsigned long id)
-{
-	return lantiq_rcu_reset_update(rcdev, id, true);
-}
-
-static int lantiq_rcu_reset_deassert(struct reset_controller_dev *rcdev,
-			       unsigned long id)
-{
-	return lantiq_rcu_reset_update(rcdev, id, false);
-}
-
-static int lantiq_rcu_reset_reset(struct reset_controller_dev *rcdev,
-			    unsigned long id)
-{
-	int ret;
-
-	ret = lantiq_rcu_reset_assert(rcdev, id);
-	if (ret)
-		return ret;
-
-	return lantiq_rcu_reset_deassert(rcdev, id);
-}
-
-static const struct reset_control_ops lantiq_rcu_reset_ops = {
-	.assert = lantiq_rcu_reset_assert,
-	.deassert = lantiq_rcu_reset_deassert,
-	.status = lantiq_rcu_reset_status,
-	.reset	= lantiq_rcu_reset_reset,
-};
-
-static int lantiq_rcu_reset_of_parse(struct platform_device *pdev,
-			       struct lantiq_rcu_reset_priv *priv)
-{
-	struct device *dev = &pdev->dev;
-	const __be32 *offset;
-
-	priv->regmap = syscon_node_to_regmap(dev->of_node->parent);
-	if (IS_ERR(priv->regmap)) {
-		dev_err(&pdev->dev, "Failed to lookup RCU regmap\n");
-		return PTR_ERR(priv->regmap);
-	}
-
-	offset = of_get_address(dev->of_node, 0, NULL, NULL);
-	if (!offset) {
-		dev_err(&pdev->dev, "Failed to get RCU reset offset\n");
-		return -ENOENT;
-	}
-	priv->reset_offset = __be32_to_cpu(*offset);
-
-	offset = of_get_address(dev->of_node, 1, NULL, NULL);
-	if (!offset) {
-		dev_err(&pdev->dev, "Failed to get RCU status offset\n");
-		return -ENOENT;
-	}
-	priv->status_offset = __be32_to_cpu(*offset);
-
-	return 0;
-}
-
-static int lantiq_rcu_reset_xlate(struct reset_controller_dev *rcdev,
-				  const struct of_phandle_args *reset_spec)
-{
-	unsigned int status, set;
-
-	set = reset_spec->args[0];
-	status = reset_spec->args[1];
-
-	if (set >= rcdev->nr_resets || status >= rcdev->nr_resets)
-		return -EINVAL;
-
-	return (status << 8) | set;
-}
-
-static int lantiq_rcu_reset_probe(struct platform_device *pdev)
-{
-	struct lantiq_rcu_reset_priv *priv;
-	int err;
-
-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	priv->dev = &pdev->dev;
-	platform_set_drvdata(pdev, priv);
-
-	err = lantiq_rcu_reset_of_parse(pdev, priv);
-	if (err)
-		return err;
-
-	priv->rcdev.ops = &lantiq_rcu_reset_ops;
-	priv->rcdev.owner = THIS_MODULE;
-	priv->rcdev.of_node = pdev->dev.of_node;
-	priv->rcdev.nr_resets = 32;
-	priv->rcdev.of_xlate = lantiq_rcu_reset_xlate;
-	priv->rcdev.of_reset_n_cells = 2;
-
-	return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
-}
-
-static const struct of_device_id lantiq_rcu_reset_dt_ids[] = {
-	{ .compatible = "lantiq,danube-reset", },
-	{ .compatible = "lantiq,xrx200-reset", },
-	{ },
-};
-MODULE_DEVICE_TABLE(of, lantiq_rcu_reset_dt_ids);
-
-static struct platform_driver lantiq_rcu_reset_driver = {
-	.probe	= lantiq_rcu_reset_probe,
-	.driver = {
-		.name		= "lantiq-reset",
-		.of_match_table	= lantiq_rcu_reset_dt_ids,
-	},
-};
-module_platform_driver(lantiq_rcu_reset_driver);
-
-MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
-MODULE_DESCRIPTION("Lantiq XWAY RCU Reset Controller Driver");
-MODULE_LICENSE("GPL");
-- 
2.36.1

[PATCH v1 9/9] mips: dts: lantiq: Update the RCU node to match the intel,rcu-gw binding

[Martin Blumenstingl]

Use the updated compatible string and also add the USB2 PHY child node.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/mips/boot/dts/lantiq/danube.dtsi | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index 510be63c8bdf..8ac806662083 100644
--- a/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -57,8 +57,26 @@ cgu0: cgu@103000 {
 		};
 
 		rcu0: rcu@203000 {
-			compatible = "lantiq,rcu-xway";
+			compatible = "lantiq,danube-rcu", "simple-mfd", "syscon";
 			reg = <0x203000 0x1000>;
+			ranges = <0x0 0x203000 0x100>;
+			big-endian;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			#reset-cells = <3>;
+			intel,global-reset = <0x10 30 29>;
+
+			usb_phy: usb2-phy@18 {
+				compatible = "lantiq,danube-usb2-phy";
+				reg = <0x18 4>;
+				status = "disabled";
+
+				resets = <&rcu0 0x10 4 4>;
+				reset-names = "ctrl";
+				#phy-cells = <0>;
+			};
 		};
 	};
 
-- 
2.36.1

Re: [PATCH v1 1/9] dt-bindings: phy: lantiq: xway-rcu-usb2-phy: Convert to YAML

[Rob Herring]

On Tue, Jun 28, 2022 at 02:44:33PM +0200, Martin Blumenstingl wrote:
> Convert the Lantiq XWAY RCU USB2 PHY bindings to YAML.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  .../phy/lantiq,xway-rcu-usb2-phy.yaml         | 68 +++++++++++++++++++
>  .../bindings/phy/phy-lantiq-rcu-usb2.txt      | 40 -----------
>  2 files changed, 68 insertions(+), 40 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
>  delete mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
> new file mode 100644
> index 000000000000..702a8e8c64b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/lantiq,xway-rcu-usb2-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
> +
> +maintainers:
> +  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> +
> +properties:
> +  "#phy-cells":
> +    const: 0
> +
> +  compatible:
> +    enum:
> +      - lantiq,ase-usb2-phy
> +      - lantiq,danube-usb2-phy
> +      - lantiq,xrx100-usb2-phy
> +      - lantiq,xrx200-usb2-phy
> +      - lantiq,xrx300-usb2-phy
> +
> +  reg:
> +    minItems: 2

Need to define what each entry is which you lost.

> +
> +  clocks:
> +    minItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: phy
> +
> +  resets:
> +    minItems: 1

But reset-names requires 2 entries.

> +    maxItems: 2
> +
> +  reset-names:
> +    items:
> +      - const: phy

'phy' was optional before. You may want to add another case with oneOf:

items:
  - const: ctrl

I'm not sure on all the possibilities though. Is 'ctrl' optional?

> +      - const: ctrl
> +
> +required:
> +  - "#phy-cells"
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    usb_phy0: usb2-phy@18 {
> +        compatible = "lantiq,xrx200-usb2-phy";
> +        reg = <0x18 4>, <0x38 4>;
> +
> +        clocks = <&pmu_USB0_PHY>;
> +        clock-names = "phy";
> +
> +        resets = <&reset1 4 4>, <&reset0 4 4>;
> +        reset-names = "phy", "ctrl";
> +
> +        #phy-cells = <0>;
> +    };
> +...
> diff --git a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt b/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
> deleted file mode 100644
> index 643948b6b576..000000000000
> --- a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
> -===========================================
> -
> -This binding describes the USB PHY hardware provided by the RCU module on the
> -Lantiq XWAY SoCs.
> -
> -This node has to be a sub node of the Lantiq RCU block.
> -
> --------------------------------------------------------------------------------
> -Required properties (controller (parent) node):
> -- compatible	: Should be one of
> -			"lantiq,ase-usb2-phy"
> -			"lantiq,danube-usb2-phy"
> -			"lantiq,xrx100-usb2-phy"
> -			"lantiq,xrx200-usb2-phy"
> -			"lantiq,xrx300-usb2-phy"
> -- reg		: Defines the following sets of registers in the parent
> -		  syscon device
> -			- Offset of the USB PHY configuration register
> -			- Offset of the USB Analog configuration
> -			  register (only for xrx200 and xrx200)
> -- clocks	: References to the (PMU) "phy" clk gate.
> -- clock-names	: Must be "phy"
> -- resets	: References to the RCU USB configuration reset bits.
> -- reset-names	: Must be one of the following:
> -			"phy" (optional)
> -			"ctrl" (shared)
> -
> --------------------------------------------------------------------------------
> -Example for the USB PHYs on an xRX200 SoC:
> -	usb_phy0: usb2-phy@18 {
> -		compatible = "lantiq,xrx200-usb2-phy";
> -		reg = <0x18 4>, <0x38 4>;
> -
> -		clocks = <&pmu PMU_GATE_USB0_PHY>;
> -		clock-names = "phy";
> -		resets = <&reset1 4 4>, <&reset0 4 4>;
> -		reset-names = "phy", "ctrl";
> -		#phy-cells = <0>;
> -	};
> -- 
> 2.36.1
> 
> 

Re: [PATCH v1 2/9] dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items

[Rob Herring]

On Tue, 28 Jun 2022 14:44:34 +0200, Martin Blumenstingl wrote:
> Legacy SoCs use three elements for the global reset:
> - offset
> - reset bit
> - status bit
> 
> Allow this in the dt-bindings as well.
> 
> Fixes: b7ab0cb00d086b ("dt-bindings: reset: Add YAML schemas for the Intel Reset controller")
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v1 3/9] dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs

[Rob Herring]

On Tue, Jun 28, 2022 at 02:44:35PM +0200, Martin Blumenstingl wrote:
> The Lantiq Amazon-SE, Danube, xRX100 and xRX200 SoCs have up to two USB2
> PHYs which are part of the RCU register space. The RCU registers on
> these SoCs are using big endian. Update the binding for these SoCs to
> properly describe this IP:
> - Add compatible strings for Amazon-SE, Danube and xRX100
> - Rename the xRX200 compatible string (which is not used anywhere) and
>   switch to the one previously documented in mips/lantiq/rcu.txt
> - Allow usage of "simple-mfd" and "syscon" in the compatible string so the
>   child devices (USB2 PHYs) can be described
> - Allow #address-cells and #size-cells to be set to 1 for describing the
>   child devices (USB2 PHYs)
> - #reset-cells must always be 3 (offset, reset bit and status bit) on the
>   legacy SoCs while LGM uses a fixed value of 2 (offset and reset bit -
>   status bit is always identical to the reset bit).
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  .../bindings/reset/intel,rcu-gw.yaml          | 84 +++++++++++++++++--
>  1 file changed, 79 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> index be64f8597710..b90913c7b7d3 100644
> --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> @@ -11,9 +11,16 @@ maintainers:
>  
>  properties:
>    compatible:
> -    enum:
> -      - intel,rcu-lgm
> -      - intel,rcu-xrx200

It is okay to remove/change this because ?

> +    oneOf:
> +      - items:
> +          - enum:
> +              - lantiq,ase-rcu
> +              - lantiq,danube-rcu
> +              - lantiq,xrx100-rcu
> +              - lantiq,xrx200-rcu
> +          - const: simple-mfd

This says child nodes have 0 dependence on anything in the parent node. 
Such as a clock in the parent needing to be enabled.

> +          - const: syscon

Given the child nodes depend on this, I find the combination to be a 
contradiction. But it's widely used, so oh well.

> +      - const: intel,rcu-lgm
>  
>    reg:
>      description: Reset controller registers.
> @@ -33,8 +40,6 @@ properties:
>          maximum: 31
>  
>    "#reset-cells":
> -    minimum: 2
> -    maximum: 3
>      description: |
>        First cell is reset request register offset.
>        Second cell is bit offset in reset request register.
> @@ -43,6 +48,43 @@ properties:
>        reset request and reset status registers is same. Whereas
>        3 for legacy SoCs as bit offset differs.
>  
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  big-endian: true
> +
> +patternProperties:
> +  "^usb2-phy@[0-9a-f]+$":
> +    type: object
> +    $ref: "../phy/lantiq,xway-rcu-usb2-phy.yaml"
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: intel,rcu-lgm
> +    then:
> +      properties:
> +        "#reset-cells":
> +          const: 2

else:
  properties:
    "#reset-cells":
      const: 3

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - lantiq,ase-rcu
> +              - lantiq,danube-rcu
> +              - lantiq,xrx100-rcu
> +              - lantiq,xrx200-rcu
> +    then:
> +      properties:
> +        "#reset-cells":
> +          const: 3
> +
>  required:
>    - compatible
>    - reg
> @@ -67,3 +109,35 @@ examples:
>          #pwm-cells = <2>;
>          resets = <&rcu0 0x30 21>;
>      };
> +  - |
> +    rcu_xrx200: rcu@203000 {
> +        compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
> +        reg = <0x203000 0x100>;
> +        big-endian;
> +
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        #reset-cells = <3>;
> +        intel,global-reset = <0x10 30 29>;
> +
> +        usb_phy0: usb2-phy@18 {
> +            compatible = "lantiq,xrx200-usb2-phy";
> +            reg = <0x18 4>, <0x38 4>;
> +            status = "disabled";

Why is your example disabled? Don't use 'status' in examples.

> +
> +            resets = <&rcu_xrx200 0x48 4 4>, <&rcu_xrx200 0x10 4 4>;

Humm, a dependency on the parent. Not a 'simple-mfd'.

> +            reset-names = "phy", "ctrl";
> +            #phy-cells = <0>;
> +        };
> +
> +        usb_phy1: usb2-phy@34 {
> +            compatible = "lantiq,xrx200-usb2-phy";
> +            reg = <0x34 4>, <0x3c 4>;
> +            status = "disabled";
> +
> +            resets = <&rcu_xrx200 0x48 5 5>, <&rcu_xrx200 0x10 4 4>;
> +            reset-names = "phy", "ctrl";
> +            #phy-cells = <0>;
> +        };
> +    };
> -- 
> 2.36.1
> 
> 

Re: [PATCH v1 4/9] dt-bindings: mips: lantiq: rcu: Remove binding documentation

[Rob Herring]

On Tue, 28 Jun 2022 14:44:36 +0200, Martin Blumenstingl wrote:
> This is now part of:
> Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> 
> The PHYs are still using sub-nodes while the reset-controller is moved
> to the main RCU node. Also the system reboot is now described directly
> in intel,rcu-gw.yaml which makes the syscon-reboot node obsolete.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  .../devicetree/bindings/mips/lantiq/rcu.txt   | 69 -------------------
>  1 file changed, 69 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v1 3/9] dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs

[Martin Blumenstingl]

 Hi Rob,

On Fri, Jul 1, 2022 at 6:33 PM Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Jun 28, 2022 at 02:44:35PM +0200, Martin Blumenstingl wrote:
> > The Lantiq Amazon-SE, Danube, xRX100 and xRX200 SoCs have up to two USB2
> > PHYs which are part of the RCU register space. The RCU registers on
> > these SoCs are using big endian. Update the binding for these SoCs to
> > properly describe this IP:
> > - Add compatible strings for Amazon-SE, Danube and xRX100
> > - Rename the xRX200 compatible string (which is not used anywhere) and
> >   switch to the one previously documented in mips/lantiq/rcu.txt
> > - Allow usage of "simple-mfd" and "syscon" in the compatible string so the
> >   child devices (USB2 PHYs) can be described
> > - Allow #address-cells and #size-cells to be set to 1 for describing the
> >   child devices (USB2 PHYs)
> > - #reset-cells must always be 3 (offset, reset bit and status bit) on the
> >   legacy SoCs while LGM uses a fixed value of 2 (offset and reset bit -
> >   status bit is always identical to the reset bit).
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> > ---
> >  .../bindings/reset/intel,rcu-gw.yaml          | 84 +++++++++++++++++--
> >  1 file changed, 79 insertions(+), 5 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > index be64f8597710..b90913c7b7d3 100644
> > --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > @@ -11,9 +11,16 @@ maintainers:
> >
> >  properties:
> >    compatible:
> > -    enum:
> > -      - intel,rcu-lgm
> > -      - intel,rcu-xrx200
>
> It is okay to remove/change this because ?
I'll update the description in v2. The "intel,rcu-xrx200" compatible
string isn't used anywhere (upstream or downstream in OpenWrt).
u-boot on Lantiq xRX200 SoCs is too old to pass a dtb to the kernel,
so we're appending the DTB to the kernel image.

> > +    oneOf:
> > +      - items:
> > +          - enum:
> > +              - lantiq,ase-rcu
> > +              - lantiq,danube-rcu
> > +              - lantiq,xrx100-rcu
> > +              - lantiq,xrx200-rcu
> > +          - const: simple-mfd
>
> This says child nodes have 0 dependence on anything in the parent node.
> Such as a clock in the parent needing to be enabled.
>
> > +          - const: syscon
>
> Given the child nodes depend on this, I find the combination to be a
> contradiction. But it's widely used, so oh well.
I can think of two ways to solve this:
1) remove the simple-mfd compatible string and make the driver also
discover child nodes
2) remove the simple-mfd compatible string and remove the USB PHY
child nodes - then add add #phy-cells = <1> to the RCU node itself
(and somehow update the RCU and USB PHY drivers accordingly)
3) introduce a separate child node for the reset-controller, then the
child nodes depend on each other (but there's no strict dependency on
the parent anymore other than the fact that the parent needs a
"syscon" compatible string).

My understanding of this IP block is that it was initially designed as
a reset controller, hence its name "reset controller unit" (RCU). Then
additional logic was added after the fact.
So I think 1) (dropping the simple-mfd compatible string) or 2)
(dropping the simple-mfd compatible string and the child nodes
altogether) is the right way to go here. Which route would you go and
why?

[...]
> > +patternProperties:
> > +  "^usb2-phy@[0-9a-f]+$":
> > +    type: object
> > +    $ref: "../phy/lantiq,xway-rcu-usb2-phy.yaml"
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: intel,rcu-lgm
> > +    then:
> > +      properties:
> > +        "#reset-cells":
> > +          const: 2
>
> else:
>   properties:
>     "#reset-cells":
>       const: 3
much shorter, thanks - I'll take care of this in v2.

[...]
> > +        usb_phy0: usb2-phy@18 {
> > +            compatible = "lantiq,xrx200-usb2-phy";
> > +            reg = <0x18 4>, <0x38 4>;
> > +            status = "disabled";
>
> Why is your example disabled? Don't use 'status' in examples.
I should know this better - I'll fix this in v2.


Best regards,
Martin

Re: [PATCH v1 3/9] dt-bindings: reset: intel,rcu-gw: Update bindings for "legacy" SoCs

[Rob Herring]

On Sun, Jul 03, 2022 at 01:04:20AM +0200, Martin Blumenstingl wrote:
>  Hi Rob,
> 
> On Fri, Jul 1, 2022 at 6:33 PM Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Jun 28, 2022 at 02:44:35PM +0200, Martin Blumenstingl wrote:
> > > The Lantiq Amazon-SE, Danube, xRX100 and xRX200 SoCs have up to two USB2
> > > PHYs which are part of the RCU register space. The RCU registers on
> > > these SoCs are using big endian. Update the binding for these SoCs to
> > > properly describe this IP:
> > > - Add compatible strings for Amazon-SE, Danube and xRX100
> > > - Rename the xRX200 compatible string (which is not used anywhere) and
> > >   switch to the one previously documented in mips/lantiq/rcu.txt
> > > - Allow usage of "simple-mfd" and "syscon" in the compatible string so the
> > >   child devices (USB2 PHYs) can be described
> > > - Allow #address-cells and #size-cells to be set to 1 for describing the
> > >   child devices (USB2 PHYs)
> > > - #reset-cells must always be 3 (offset, reset bit and status bit) on the
> > >   legacy SoCs while LGM uses a fixed value of 2 (offset and reset bit -
> > >   status bit is always identical to the reset bit).
> > >
> > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> > > ---
> > >  .../bindings/reset/intel,rcu-gw.yaml          | 84 +++++++++++++++++--
> > >  1 file changed, 79 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > > index be64f8597710..b90913c7b7d3 100644
> > > --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > > +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > > @@ -11,9 +11,16 @@ maintainers:
> > >
> > >  properties:
> > >    compatible:
> > > -    enum:
> > > -      - intel,rcu-lgm
> > > -      - intel,rcu-xrx200
> >
> > It is okay to remove/change this because ?
> I'll update the description in v2. The "intel,rcu-xrx200" compatible
> string isn't used anywhere (upstream or downstream in OpenWrt).
> u-boot on Lantiq xRX200 SoCs is too old to pass a dtb to the kernel,
> so we're appending the DTB to the kernel image.
> 
> > > +    oneOf:
> > > +      - items:
> > > +          - enum:
> > > +              - lantiq,ase-rcu
> > > +              - lantiq,danube-rcu
> > > +              - lantiq,xrx100-rcu
> > > +              - lantiq,xrx200-rcu
> > > +          - const: simple-mfd
> >
> > This says child nodes have 0 dependence on anything in the parent node.
> > Such as a clock in the parent needing to be enabled.
> >
> > > +          - const: syscon
> >
> > Given the child nodes depend on this, I find the combination to be a
> > contradiction. But it's widely used, so oh well.
> I can think of two ways to solve this:
> 1) remove the simple-mfd compatible string and make the driver also
> discover child nodes
> 2) remove the simple-mfd compatible string and remove the USB PHY
> child nodes - then add add #phy-cells = <1> to the RCU node itself
> (and somehow update the RCU and USB PHY drivers accordingly)
> 3) introduce a separate child node for the reset-controller, then the
> child nodes depend on each other (but there's no strict dependency on
> the parent anymore other than the fact that the parent needs a
> "syscon" compatible string).
> 
> My understanding of this IP block is that it was initially designed as
> a reset controller, hence its name "reset controller unit" (RCU). Then
> additional logic was added after the fact.
> So I think 1) (dropping the simple-mfd compatible string) or 2)
> (dropping the simple-mfd compatible string and the child nodes
> altogether) is the right way to go here. Which route would you go and
> why?

2 would be my choice. That's the simplest binding. Unless the phy 
registers show up in different places on multiple devices, then maybe 
it's worth keeping the child node.

Rob