linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Lee Jones <lee.jones@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Tinghan Shen <tinghan.shen@mediatek.com>,
	Chun-Jie Chen <chun-jie.chen@mediatek.com>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	MandyJH Liu <mandyjh.liu@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>
Cc: <iommu@lists.linux.dev>, <linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	YT Lee <yt.lee@mediatek.corp-partner.google.com>
Subject: [PATCH v2 09/19] arm64: dts: mt8195: Add cpufreq node
Date: Thu, 14 Jul 2022 20:28:27 +0800	[thread overview]
Message-ID: <20220714122837.20094-10-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220714122837.20094-1-tinghan.shen@mediatek.com>

From: YT Lee <yt.lee@mediatek.corp-partner.google.com>

Add cpufreq node for mt8195.

Signed-off-by: YT Lee <yt.lee@mediatek.corp-partner.google.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8032b839dfe8..900aaa16f862 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -26,6 +26,7 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x000>;
 			enable-method = "psci";
+			performance-domains = <&performance 0>;
 			clock-frequency = <1701000000>;
 			capacity-dmips-mhz = <578>;
 			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -38,6 +39,7 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x100>;
 			enable-method = "psci";
+			performance-domains = <&performance 0>;
 			clock-frequency = <1701000000>;
 			capacity-dmips-mhz = <578>;
 			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -50,6 +52,7 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x200>;
 			enable-method = "psci";
+			performance-domains = <&performance 0>;
 			clock-frequency = <1701000000>;
 			capacity-dmips-mhz = <578>;
 			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -62,6 +65,7 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x300>;
 			enable-method = "psci";
+			performance-domains = <&performance 0>;
 			clock-frequency = <1701000000>;
 			capacity-dmips-mhz = <578>;
 			cpu-idle-states = <&cpu_off_l &cluster_off_l>;
@@ -74,6 +78,7 @@
 			compatible = "arm,cortex-a78";
 			reg = <0x400>;
 			enable-method = "psci";
+			performance-domains = <&performance 1>;
 			clock-frequency = <2171000000>;
 			capacity-dmips-mhz = <1024>;
 			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -86,6 +91,7 @@
 			compatible = "arm,cortex-a78";
 			reg = <0x500>;
 			enable-method = "psci";
+			performance-domains = <&performance 1>;
 			clock-frequency = <2171000000>;
 			capacity-dmips-mhz = <1024>;
 			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -98,6 +104,7 @@
 			compatible = "arm,cortex-a78";
 			reg = <0x600>;
 			enable-method = "psci";
+			performance-domains = <&performance 1>;
 			clock-frequency = <2171000000>;
 			capacity-dmips-mhz = <1024>;
 			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -110,6 +117,7 @@
 			compatible = "arm,cortex-a78";
 			reg = <0x700>;
 			enable-method = "psci";
+			performance-domains = <&performance 1>;
 			clock-frequency = <2171000000>;
 			capacity-dmips-mhz = <1024>;
 			cpu-idle-states = <&cpu_off_b &cluster_off_b>;
@@ -231,6 +239,12 @@
 		clock-output-names = "clk32k";
 	};
 
+	performance: performance-controller@11bc10 {
+		compatible = "mediatek,cpufreq-hw";
+		reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
+		#performance-domain-cells = <1>;
+	};
+
 	pmu-a55 {
 		compatible = "arm,cortex-a55-pmu";
 		interrupt-parent = <&gic>;
-- 
2.18.0


  parent reply	other threads:[~2022-07-14 12:29 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-14 12:28 [PATCH v2 00/19] Add driver nodes for MT8195 SoC Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 01/19] dt-bindings: iommu: mediatek: Increase max interrupt number Tinghan Shen
2022-07-15  7:34   ` Krzysztof Kozlowski
2022-07-14 12:28 ` [PATCH v2 02/19] dt-bindings: memory: mediatek: Update condition for mt8195 smi node Tinghan Shen
2022-07-14 12:36   ` AngeloGioacchino Del Regno
2022-07-15  7:35   ` Krzysztof Kozlowski
2022-07-14 12:28 ` [PATCH v2 03/19] dt-bindings: power: mediatek: Add bindings for MediaTek SCPSYS Tinghan Shen
2022-07-14 13:38   ` Lee Jones
2022-07-15  7:57   ` Krzysztof Kozlowski
2022-07-19  8:17     ` Tinghan Shen
2022-07-19  8:50       ` Krzysztof Kozlowski
2022-07-18 21:15   ` Rob Herring
2022-07-14 12:28 ` [PATCH v2 04/19] dt-bindings: power: mediatek: Update example in dt-bindings Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 05/19] dt-bindings: power: mediatek: Refine multiple level power domain nodes Tinghan Shen
2022-07-15  8:07   ` Krzysztof Kozlowski
2022-07-15  8:15     ` Krzysztof Kozlowski
2022-07-19  7:55       ` Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 06/19] arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 07/19] arm64: dts: mt8195: Disable watchdog external reset signal Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 08/19] arm64: dts: mt8195: Disable I2C0 node Tinghan Shen
2022-07-14 12:28 ` Tinghan Shen [this message]
2022-07-14 12:28 ` [PATCH v2 10/19] arm64: dts: mt8195: Add vdosys and vppsys clock nodes Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 11/19] arm64: dts: mt8195: Add power domains controller Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 12/19] arm64: dts: mt8195: Add spmi node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 13/19] arm64: dts: mt8195: Add scp node Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 14/19] arm64: dts: mt8195: Add audio related nodes Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 15/19] arm64: dts: mt8195: Add adsp node and adsp mailbox nodes Tinghan Shen
2022-07-14 12:35   ` AngeloGioacchino Del Regno
2022-07-14 12:28 ` [PATCH v2 16/19] arm64: dts: mt8195: Specify audio reset controller Tinghan Shen
2022-07-14 12:28 ` [PATCH v2 17/19] arm64: dts: mt8195: Add iommu and smi nodes Tinghan Shen
     [not found] ` <20220714122837.20094-20-tinghan.shen@mediatek.com>
2022-07-14 12:36   ` [PATCH v2 19/19] arm64: dts: mt8195: Add display node for vdosys0 AngeloGioacchino Del Regno

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220714122837.20094-10-tinghan.shen@mediatek.com \
    --to=tinghan.shen@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=chun-jie.chen@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=iommu@lists.linux.dev \
    --cc=joro@8bytes.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=lee.jones@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=mandyjh.liu@mediatek.com \
    --cc=matthias.bgg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=weiyi.lu@mediatek.com \
    --cc=will@kernel.org \
    --cc=yong.wu@mediatek.com \
    --cc=yt.lee@mediatek.corp-partner.google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).