From: Sudip Mukherjee <sudip.mukherjee@sifive.com>
To: Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: greentime.hu@sifive.com, jude.onyenegecha@sifive.com,
william.salmon@sifive.com, adnan.chowdhury@sifive.com,
ben.dooks@sifive.com, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
jeegar.lakhani@sifive.com,
Sudip Mukherjee <sudip.mukherjee@sifive.com>
Subject: [PATCH 04/11] spi: dw: use TMOD_RO to read in enhanced spi modes
Date: Tue, 2 Aug 2022 18:57:48 +0100 [thread overview]
Message-ID: <20220802175755.6530-5-sudip.mukherjee@sifive.com> (raw)
In-Reply-To: <20220802175755.6530-1-sudip.mukherjee@sifive.com>
When we are using the enhanced spi modes we can not use EEPROM Read.
The Synopsys datasheet mentions EEPROM Read is not applicable in
enhanced SPI modes. We will need to use Receive only mode.
Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
---
drivers/spi/spi-dw-core.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 8c84a2e991b5..8e624620864f 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -727,7 +727,10 @@ static int dw_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op)
cfg.dfs = 8;
cfg.freq = clamp(mem->spi->max_speed_hz, 0U, dws->max_mem_freq);
if (op->data.dir == SPI_MEM_DATA_IN) {
- cfg.tmode = DW_SPI_CTRLR0_TMOD_EPROMREAD;
+ if (enhanced_spi)
+ cfg.tmode = DW_SPI_CTRLR0_TMOD_RO;
+ else
+ cfg.tmode = DW_SPI_CTRLR0_TMOD_EPROMREAD;
cfg.ndf = op->data.nbytes;
} else {
cfg.tmode = DW_SPI_CTRLR0_TMOD_TO;
--
2.30.2
next prev parent reply other threads:[~2022-08-02 17:59 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-02 17:57 [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers Sudip Mukherjee
2022-08-02 17:57 ` [PATCH 01/11] spi: dw: define capability for enhanced spi Sudip Mukherjee
2022-08-02 18:47 ` Mark Brown
2022-08-03 17:34 ` Sudip Mukherjee
2022-08-03 17:40 ` Mark Brown
2022-08-26 18:16 ` Serge Semin
2022-08-02 17:57 ` [PATCH 02/11] spi: dw: add check for support of dual/quad/octal Sudip Mukherjee
2022-08-26 21:36 ` Serge Semin
2022-08-02 17:57 ` [PATCH 03/11] spi: dw: define spi_frf for dual/quad/octal modes Sudip Mukherjee
2022-08-26 22:03 ` Serge Semin
2022-08-26 22:22 ` Serge Semin
2022-08-02 17:57 ` Sudip Mukherjee [this message]
2022-08-02 19:13 ` [PATCH 04/11] spi: dw: use TMOD_RO to read in enhanced spi modes Mark Brown
2022-08-03 17:35 ` Sudip Mukherjee
2022-08-26 22:12 ` Serge Semin
2022-08-02 17:57 ` [PATCH 05/11] spi: dw: define SPI_CTRLR0 register and its fields Sudip Mukherjee
2022-08-26 22:19 ` Serge Semin
2022-08-02 17:57 ` [PATCH 06/11] spi: dw: update SPI_CTRLR0 register Sudip Mukherjee
2022-08-26 22:50 ` Serge Semin
2022-08-02 17:57 ` [PATCH 07/11] spi: dw: update NDF while writing in enhanced spi mode Sudip Mukherjee
2022-08-26 22:54 ` Serge Semin
2022-08-02 17:57 ` [PATCH 08/11] spi: dw: update buffer for " Sudip Mukherjee
2022-08-26 23:05 ` Serge Semin
2022-08-02 17:57 ` [PATCH 09/11] spi: dw: prepare the transfer routine for enhanced mode Sudip Mukherjee
2022-08-26 23:19 ` Serge Semin
2022-08-02 17:57 ` [PATCH 10/11] spi: dw-apb-ssi: add generic 1.03a version Sudip Mukherjee
2022-08-03 6:35 ` Krzysztof Kozlowski
2022-08-26 23:23 ` Serge Semin
2022-08-26 23:33 ` Serge Semin
2022-08-02 17:57 ` [PATCH 11/11] spi: dw: initialize dwc-ssi-1.03a controller Sudip Mukherjee
2022-08-26 23:31 ` Serge Semin
2022-08-03 18:56 ` [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers Serge Semin
2022-08-04 9:43 ` Sudip Mukherjee
2022-08-21 20:37 ` Serge Semin
2022-08-26 18:03 ` Serge Semin
2022-08-30 8:48 ` Sudip Mukherjee
2022-09-02 23:03 ` Serge Semin
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