From: Sudip Mukherjee <sudip.mukherjee@sifive.com>
To: Mark Brown <broonie@kernel.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Greentime Hu <greentime.hu@sifive.com>,
Jude Onyenegecha <jude.onyenegecha@sifive.com>,
William Salmon <william.salmon@sifive.com>,
Adnan Chowdhury <adnan.chowdhury@sifive.com>,
Ben Dooks <ben.dooks@sifive.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jeegar Lakhani <jeegar.lakhani@sifive.com>
Subject: Re: [PATCH 01/11] spi: dw: define capability for enhanced spi
Date: Wed, 3 Aug 2022 18:34:53 +0100 [thread overview]
Message-ID: <CAHyZL-dA+mFW6Jcvpds69f-9iJf6nk7PCpO6S2Au+ugSZMgisw@mail.gmail.com> (raw)
In-Reply-To: <YulxX3Zo168cWhwP@sirena.org.uk>
On Tue, Aug 2, 2022 at 7:48 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Tue, Aug 02, 2022 at 06:57:45PM +0100, Sudip Mukherjee wrote:
>
> > Some Synopsys SSI controllers support enhanced SPI which includes
> > Dual mode, Quad mode and Octal mode. Define the capability and mention
> > it in the controller supported modes.
>
> > +#define DW_SPI_CAP_EXT_SPI BIT(2)
>
> This isn't at all descriptive, it'd be better to have a capability bit
> for the various multi-line data modes (or possibly individual bits for
> them, though board setup will stop us using things that aren't supported
> in a given design anyway so it's a bit redundant) - that'd be a lot
> clearer and avoid confusion further down the line when some other
> feature gets added.
Do you mean to add separate capability bit like:
DW_SPI_CAP_DUAL_SPI
DW_SPI_CAP_QUAD_SPI and
DW_SPI_CAP_OCTAL_SPI ?
--
Regards
Sudip
next prev parent reply other threads:[~2022-08-03 17:35 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-02 17:57 [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers Sudip Mukherjee
2022-08-02 17:57 ` [PATCH 01/11] spi: dw: define capability for enhanced spi Sudip Mukherjee
2022-08-02 18:47 ` Mark Brown
2022-08-03 17:34 ` Sudip Mukherjee [this message]
2022-08-03 17:40 ` Mark Brown
2022-08-26 18:16 ` Serge Semin
2022-08-02 17:57 ` [PATCH 02/11] spi: dw: add check for support of dual/quad/octal Sudip Mukherjee
2022-08-26 21:36 ` Serge Semin
2022-08-02 17:57 ` [PATCH 03/11] spi: dw: define spi_frf for dual/quad/octal modes Sudip Mukherjee
2022-08-26 22:03 ` Serge Semin
2022-08-26 22:22 ` Serge Semin
2022-08-02 17:57 ` [PATCH 04/11] spi: dw: use TMOD_RO to read in enhanced spi modes Sudip Mukherjee
2022-08-02 19:13 ` Mark Brown
2022-08-03 17:35 ` Sudip Mukherjee
2022-08-26 22:12 ` Serge Semin
2022-08-02 17:57 ` [PATCH 05/11] spi: dw: define SPI_CTRLR0 register and its fields Sudip Mukherjee
2022-08-26 22:19 ` Serge Semin
2022-08-02 17:57 ` [PATCH 06/11] spi: dw: update SPI_CTRLR0 register Sudip Mukherjee
2022-08-26 22:50 ` Serge Semin
2022-08-02 17:57 ` [PATCH 07/11] spi: dw: update NDF while writing in enhanced spi mode Sudip Mukherjee
2022-08-26 22:54 ` Serge Semin
2022-08-02 17:57 ` [PATCH 08/11] spi: dw: update buffer for " Sudip Mukherjee
2022-08-26 23:05 ` Serge Semin
2022-08-02 17:57 ` [PATCH 09/11] spi: dw: prepare the transfer routine for enhanced mode Sudip Mukherjee
2022-08-26 23:19 ` Serge Semin
2022-08-02 17:57 ` [PATCH 10/11] spi: dw-apb-ssi: add generic 1.03a version Sudip Mukherjee
2022-08-03 6:35 ` Krzysztof Kozlowski
2022-08-26 23:23 ` Serge Semin
2022-08-26 23:33 ` Serge Semin
2022-08-02 17:57 ` [PATCH 11/11] spi: dw: initialize dwc-ssi-1.03a controller Sudip Mukherjee
2022-08-26 23:31 ` Serge Semin
2022-08-03 18:56 ` [PATCH 00/11] Add support for enhanced SPI for Designware SPI controllers Serge Semin
2022-08-04 9:43 ` Sudip Mukherjee
2022-08-21 20:37 ` Serge Semin
2022-08-26 18:03 ` Serge Semin
2022-08-30 8:48 ` Sudip Mukherjee
2022-09-02 23:03 ` Serge Semin
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