* [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc
@ 2022-09-25 16:23 Jisheng Zhang
2022-09-25 16:23 ` [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Jisheng Zhang @ 2022-09-25 16:23 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel, Atish Patra
Cc: linux-riscv, linux-kernel, kvm, kvm-riscv
This series is a preparation series to add PREEMPT_RT support to riscv:
patch1 adds the missing number of signal exits in vCPU stat
patch2 switches to the generic guest entry infrastructure
patch3 select HAVE_POSIX_CPU_TIMERS_TASK_WORK which is a requirement for
RT
After these three patches merged, the left RT patches are similar as
other arch.
Since v2:
- splict the series into two separate ones, one for next another for
RT.
Since v1:
- send to related maillist, I press ENTER too quickly when sending v1
- remove the signal_pending() handling because that's covered by
generic guest entry infrastructure
Jisheng Zhang (3):
RISC-V: KVM: Record number of signal exits as a vCPU stat
RISC-V: KVM: Use generic guest entry infrastructure
riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/kvm_host.h | 1 +
arch/riscv/kvm/Kconfig | 1 +
arch/riscv/kvm/vcpu.c | 18 +++++++-----------
4 files changed, 10 insertions(+), 11 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat
2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
@ 2022-09-25 16:23 ` Jisheng Zhang
2022-09-28 5:18 ` Guo Ren
2022-09-25 16:23 ` [PATCH v3 2/3] RISC-V: KVM: Use generic guest entry infrastructure Jisheng Zhang
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Jisheng Zhang @ 2022-09-25 16:23 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel, Atish Patra
Cc: linux-riscv, linux-kernel, kvm, kvm-riscv
Record a statistic indicating the number of times a vCPU has exited
due to a pending signal.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/include/asm/kvm_host.h | 1 +
arch/riscv/kvm/vcpu.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
index 60c517e4d576..dbbf43d52623 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -67,6 +67,7 @@ struct kvm_vcpu_stat {
u64 mmio_exit_kernel;
u64 csr_exit_user;
u64 csr_exit_kernel;
+ u64 signal_exits;
u64 exits;
};
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index d0f08d5b4282..3da459fedc28 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -28,6 +28,7 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
STATS_DESC_COUNTER(VCPU, mmio_exit_kernel),
STATS_DESC_COUNTER(VCPU, csr_exit_user),
STATS_DESC_COUNTER(VCPU, csr_exit_kernel),
+ STATS_DESC_COUNTER(VCPU, signal_exits),
STATS_DESC_COUNTER(VCPU, exits)
};
@@ -973,6 +974,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
if (signal_pending(current)) {
ret = -EINTR;
run->exit_reason = KVM_EXIT_INTR;
+ ++vcpu->stat.signal_exits;
}
/*
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 2/3] RISC-V: KVM: Use generic guest entry infrastructure
2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
2022-09-25 16:23 ` [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
@ 2022-09-25 16:23 ` Jisheng Zhang
2022-09-25 16:24 ` [PATCH v3 3/3] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK Jisheng Zhang
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Jisheng Zhang @ 2022-09-25 16:23 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel, Atish Patra
Cc: linux-riscv, linux-kernel, kvm, kvm-riscv
Use generic guest entry infrastructure to properly handle
TIF_NOTIFY_RESUME.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/kvm/Kconfig | 1 +
arch/riscv/kvm/vcpu.c | 18 ++++++------------
2 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig
index f5a342fa1b1d..f36a737d5f96 100644
--- a/arch/riscv/kvm/Kconfig
+++ b/arch/riscv/kvm/Kconfig
@@ -24,6 +24,7 @@ config KVM
select PREEMPT_NOTIFIERS
select KVM_MMIO
select KVM_GENERIC_DIRTYLOG_READ_PROTECT
+ select KVM_XFER_TO_GUEST_WORK
select HAVE_KVM_VCPU_ASYNC_IOCTL
select HAVE_KVM_EVENTFD
select SRCU
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 3da459fedc28..e3e6b8608288 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -7,6 +7,7 @@
*/
#include <linux/bitops.h>
+#include <linux/entry-kvm.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/kdebug.h>
@@ -959,7 +960,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
run->exit_reason = KVM_EXIT_UNKNOWN;
while (ret > 0) {
/* Check conditions before entering the guest */
- cond_resched();
+ ret = xfer_to_guest_mode_handle_work(vcpu);
+ if (!ret)
+ ret = 1;
kvm_riscv_gstage_vmid_update(vcpu);
@@ -967,16 +970,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
local_irq_disable();
- /*
- * Exit if we have a signal pending so that we can deliver
- * the signal to user space.
- */
- if (signal_pending(current)) {
- ret = -EINTR;
- run->exit_reason = KVM_EXIT_INTR;
- ++vcpu->stat.signal_exits;
- }
-
/*
* Ensure we set mode to IN_GUEST_MODE after we disable
* interrupts and before the final VCPU requests check.
@@ -999,7 +992,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
if (ret <= 0 ||
kvm_riscv_gstage_vmid_ver_changed(&vcpu->kvm->arch.vmid) ||
- kvm_request_pending(vcpu)) {
+ kvm_request_pending(vcpu) ||
+ xfer_to_guest_mode_work_pending()) {
vcpu->mode = OUTSIDE_GUEST_MODE;
local_irq_enable();
kvm_vcpu_srcu_read_lock(vcpu);
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 3/3] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK
2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
2022-09-25 16:23 ` [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
2022-09-25 16:23 ` [PATCH v3 2/3] RISC-V: KVM: Use generic guest entry infrastructure Jisheng Zhang
@ 2022-09-25 16:24 ` Jisheng Zhang
2022-09-28 9:00 ` [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Andrew Jones
2022-10-01 12:37 ` Anup Patel
4 siblings, 0 replies; 8+ messages in thread
From: Jisheng Zhang @ 2022-09-25 16:24 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel, Atish Patra
Cc: linux-riscv, linux-kernel, kvm, kvm-riscv
Move POSIX CPU timer expiry and signal delivery into task context to
allow PREEMPT_RT setups to coexist with KVM.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 79e52441e18b..7a8134fd7ec9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -104,6 +104,7 @@ config RISCV
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
+ select HAVE_POSIX_CPU_TIMERS_TASK_WORK
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_FUNCTION_ARG_ACCESS_API
select HAVE_STACKPROTECTOR
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat
2022-09-25 16:23 ` [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
@ 2022-09-28 5:18 ` Guo Ren
2022-09-28 8:59 ` Andrew Jones
0 siblings, 1 reply; 8+ messages in thread
From: Guo Ren @ 2022-09-28 5:18 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel,
Atish Patra, linux-riscv, linux-kernel, kvm, kvm-riscv
Reviewed-by: Guo Ren <guoren@kernel.org>
➜ linux git:(master) grep signal_exits arch/arm64 -r
arch/arm64/kvm/guest.c: STATS_DESC_COUNTER(VCPU, signal_exits),
arch/arm64/include/asm/kvm_host.h: u64 signal_exits;
By the way, do you know why arm64 is defined, but not used?
On Mon, Sep 26, 2022 at 12:33 AM Jisheng Zhang <jszhang@kernel.org> wrote:
>
> Record a statistic indicating the number of times a vCPU has exited
> due to a pending signal.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> arch/riscv/include/asm/kvm_host.h | 1 +
> arch/riscv/kvm/vcpu.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index 60c517e4d576..dbbf43d52623 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -67,6 +67,7 @@ struct kvm_vcpu_stat {
> u64 mmio_exit_kernel;
> u64 csr_exit_user;
> u64 csr_exit_kernel;
> + u64 signal_exits;
> u64 exits;
> };
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index d0f08d5b4282..3da459fedc28 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -28,6 +28,7 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
> STATS_DESC_COUNTER(VCPU, mmio_exit_kernel),
> STATS_DESC_COUNTER(VCPU, csr_exit_user),
> STATS_DESC_COUNTER(VCPU, csr_exit_kernel),
> + STATS_DESC_COUNTER(VCPU, signal_exits),
> STATS_DESC_COUNTER(VCPU, exits)
> };
>
> @@ -973,6 +974,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> if (signal_pending(current)) {
> ret = -EINTR;
> run->exit_reason = KVM_EXIT_INTR;
> + ++vcpu->stat.signal_exits;
> }
>
> /*
> --
> 2.34.1
>
--
Best Regards
Guo Ren
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat
2022-09-28 5:18 ` Guo Ren
@ 2022-09-28 8:59 ` Andrew Jones
0 siblings, 0 replies; 8+ messages in thread
From: Andrew Jones @ 2022-09-28 8:59 UTC (permalink / raw)
To: Guo Ren
Cc: Jisheng Zhang, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Anup Patel, Atish Patra, linux-riscv, linux-kernel, kvm,
kvm-riscv
On Wed, Sep 28, 2022 at 01:18:01PM +0800, Guo Ren wrote:
> Reviewed-by: Guo Ren <guoren@kernel.org>
>
> ➜ linux git:(master) grep signal_exits arch/arm64 -r
> arch/arm64/kvm/guest.c: STATS_DESC_COUNTER(VCPU, signal_exits),
> arch/arm64/include/asm/kvm_host.h: u64 signal_exits;
>
> By the way, do you know why arm64 is defined, but not used?
It is. arm64 uses generic xfer to guest mode work, like this series
introduces for riscv.
Thanks,
drew
>
>
> On Mon, Sep 26, 2022 at 12:33 AM Jisheng Zhang <jszhang@kernel.org> wrote:
> >
> > Record a statistic indicating the number of times a vCPU has exited
> > due to a pending signal.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > ---
> > arch/riscv/include/asm/kvm_host.h | 1 +
> > arch/riscv/kvm/vcpu.c | 2 ++
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> > index 60c517e4d576..dbbf43d52623 100644
> > --- a/arch/riscv/include/asm/kvm_host.h
> > +++ b/arch/riscv/include/asm/kvm_host.h
> > @@ -67,6 +67,7 @@ struct kvm_vcpu_stat {
> > u64 mmio_exit_kernel;
> > u64 csr_exit_user;
> > u64 csr_exit_kernel;
> > + u64 signal_exits;
> > u64 exits;
> > };
> >
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index d0f08d5b4282..3da459fedc28 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -28,6 +28,7 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
> > STATS_DESC_COUNTER(VCPU, mmio_exit_kernel),
> > STATS_DESC_COUNTER(VCPU, csr_exit_user),
> > STATS_DESC_COUNTER(VCPU, csr_exit_kernel),
> > + STATS_DESC_COUNTER(VCPU, signal_exits),
> > STATS_DESC_COUNTER(VCPU, exits)
> > };
> >
> > @@ -973,6 +974,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> > if (signal_pending(current)) {
> > ret = -EINTR;
> > run->exit_reason = KVM_EXIT_INTR;
> > + ++vcpu->stat.signal_exits;
> > }
> >
> > /*
> > --
> > 2.34.1
> >
>
>
> --
> Best Regards
> Guo Ren
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc
2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
` (2 preceding siblings ...)
2022-09-25 16:24 ` [PATCH v3 3/3] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK Jisheng Zhang
@ 2022-09-28 9:00 ` Andrew Jones
2022-10-01 12:37 ` Anup Patel
4 siblings, 0 replies; 8+ messages in thread
From: Andrew Jones @ 2022-09-28 9:00 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel,
Atish Patra, linux-riscv, linux-kernel, kvm, kvm-riscv
On Mon, Sep 26, 2022 at 12:23:57AM +0800, Jisheng Zhang wrote:
> This series is a preparation series to add PREEMPT_RT support to riscv:
> patch1 adds the missing number of signal exits in vCPU stat
> patch2 switches to the generic guest entry infrastructure
> patch3 select HAVE_POSIX_CPU_TIMERS_TASK_WORK which is a requirement for
> RT
>
> After these three patches merged, the left RT patches are similar as
> other arch.
>
> Since v2:
> - splict the series into two separate ones, one for next another for
> RT.
>
> Since v1:
> - send to related maillist, I press ENTER too quickly when sending v1
> - remove the signal_pending() handling because that's covered by
> generic guest entry infrastructure
>
> Jisheng Zhang (3):
> RISC-V: KVM: Record number of signal exits as a vCPU stat
> RISC-V: KVM: Use generic guest entry infrastructure
> riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK
>
> arch/riscv/Kconfig | 1 +
> arch/riscv/include/asm/kvm_host.h | 1 +
> arch/riscv/kvm/Kconfig | 1 +
> arch/riscv/kvm/vcpu.c | 18 +++++++-----------
> 4 files changed, 10 insertions(+), 11 deletions(-)
>
> --
> 2.34.1
>
For the series
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc
2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
` (3 preceding siblings ...)
2022-09-28 9:00 ` [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Andrew Jones
@ 2022-10-01 12:37 ` Anup Patel
4 siblings, 0 replies; 8+ messages in thread
From: Anup Patel @ 2022-10-01 12:37 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Atish Patra,
linux-riscv, linux-kernel, kvm, kvm-riscv
On Sun, Sep 25, 2022 at 10:03 PM Jisheng Zhang <jszhang@kernel.org> wrote:
>
> This series is a preparation series to add PREEMPT_RT support to riscv:
> patch1 adds the missing number of signal exits in vCPU stat
> patch2 switches to the generic guest entry infrastructure
> patch3 select HAVE_POSIX_CPU_TIMERS_TASK_WORK which is a requirement for
> RT
>
> After these three patches merged, the left RT patches are similar as
> other arch.
>
> Since v2:
> - splict the series into two separate ones, one for next another for
> RT.
>
> Since v1:
> - send to related maillist, I press ENTER too quickly when sending v1
> - remove the signal_pending() handling because that's covered by
> generic guest entry infrastructure
>
> Jisheng Zhang (3):
> RISC-V: KVM: Record number of signal exits as a vCPU stat
> RISC-V: KVM: Use generic guest entry infrastructure
> riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK
I have queued this series for Linux-6.1
Thanks,
Anup
>
> arch/riscv/Kconfig | 1 +
> arch/riscv/include/asm/kvm_host.h | 1 +
> arch/riscv/kvm/Kconfig | 1 +
> arch/riscv/kvm/vcpu.c | 18 +++++++-----------
> 4 files changed, 10 insertions(+), 11 deletions(-)
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-10-01 12:37 UTC | newest]
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2022-09-25 16:23 [PATCH v3 0/3] riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc Jisheng Zhang
2022-09-25 16:23 ` [PATCH v3 1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
2022-09-28 5:18 ` Guo Ren
2022-09-28 8:59 ` Andrew Jones
2022-09-25 16:23 ` [PATCH v3 2/3] RISC-V: KVM: Use generic guest entry infrastructure Jisheng Zhang
2022-09-25 16:24 ` [PATCH v3 3/3] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK Jisheng Zhang
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