From: Johan Hovold <johan+linaro@kernel.org>
To: Vinod Koul <vkoul@kernel.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Johan Hovold <johan+linaro@kernel.org>
Subject: [PATCH v2 13/15] phy: qcom-qmp-pcie: add support for pipediv2 clock
Date: Wed, 19 Oct 2022 13:35:50 +0200 [thread overview]
Message-ID: <20221019113552.22353-14-johan+linaro@kernel.org> (raw)
In-Reply-To: <20221019113552.22353-1-johan+linaro@kernel.org>
Some QMP PHYs have a second fixed-divider pipe clock that needs to be
enabled along with the pipe clock.
Add support for an optional "pipediv2" clock.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 42 ++++++++++++++++++++----
1 file changed, 36 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 9c8e009033f1..c1d74c06fad1 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -1379,7 +1379,9 @@ struct qmp_pcie {
void __iomem *rx2;
struct clk *pipe_clk;
+ struct clk *pipediv2_clk;
struct clk_bulk_data *clks;
+
struct reset_control_bulk_data *resets;
struct regulator_bulk_data *vregs;
@@ -1902,6 +1904,36 @@ static int qmp_pcie_exit(struct phy *phy)
return 0;
}
+static int pipe_clk_enable(struct qmp_pcie *qmp)
+{
+ int ret;
+
+ ret = clk_prepare_enable(qmp->pipe_clk);
+ if (ret) {
+ dev_err(qmp->dev, "failed to enable pipe clock: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(qmp->pipediv2_clk);
+ if (ret) {
+ dev_err(qmp->dev, "failed to enable pipediv2 clock: %d\n", ret);
+ goto err_disable_pipe_clk;
+ }
+
+ return 0;
+
+err_disable_pipe_clk:
+ clk_disable_unprepare(qmp->pipe_clk);
+
+ return ret;
+}
+
+static void pipe_clk_disable(struct qmp_pcie *qmp)
+{
+ clk_disable_unprepare(qmp->pipediv2_clk);
+ clk_disable_unprepare(qmp->pipe_clk);
+}
+
static int qmp_pcie_power_on(struct phy *phy)
{
struct qmp_pcie *qmp = phy_get_drvdata(phy);
@@ -1923,11 +1955,9 @@ static int qmp_pcie_power_on(struct phy *phy)
qmp_pcie_init_registers(qmp, &cfg->tables);
qmp_pcie_init_registers(qmp, mode_tables);
- ret = clk_prepare_enable(qmp->pipe_clk);
- if (ret) {
- dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret);
+ ret = pipe_clk_enable(qmp);
+ if (ret)
return ret;
- }
/* Pull PHY out of reset state */
qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
@@ -1950,7 +1980,7 @@ static int qmp_pcie_power_on(struct phy *phy)
return 0;
err_disable_pipe_clk:
- clk_disable_unprepare(qmp->pipe_clk);
+ pipe_clk_disable(qmp);
return ret;
}
@@ -1960,7 +1990,7 @@ static int qmp_pcie_power_off(struct phy *phy)
struct qmp_pcie *qmp = phy_get_drvdata(phy);
const struct qmp_phy_cfg *cfg = qmp->cfg;
- clk_disable_unprepare(qmp->pipe_clk);
+ pipe_clk_disable(qmp);
/* PHY reset */
qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
--
2.37.3
next prev parent reply other threads:[~2022-10-19 12:20 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 11:35 [PATCH v2 00/15] phy: qcom-qmp-pcie: add support for sc8280xp Johan Hovold
2022-10-19 11:35 ` [PATCH v2 01/15] phy: qcom-qmp-pcie: sort device-id table Johan Hovold
2022-10-19 12:28 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 02/15] phy: qcom-qmp-pcie: move " Johan Hovold
2022-10-19 12:29 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 03/15] phy: qcom-qmp-pcie: merge driver data Johan Hovold
2022-10-19 13:03 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 04/15] phy: qcom-qmp-pcie: clean up device-tree parsing Johan Hovold
2022-10-19 11:35 ` [PATCH v2 05/15] phy: qcom-qmp-pcie: clean up probe initialisation Johan Hovold
2022-10-19 13:05 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 06/15] phy: qcom-qmp-pcie: rename PHY ops structure Johan Hovold
2022-10-19 13:05 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 07/15] phy: qcom-qmp-pcie: clean up PHY lane init Johan Hovold
2022-10-19 13:45 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 08/15] phy: qcom-qmp-pcie: add register init helper Johan Hovold
2022-10-19 13:12 ` Dmitry Baryshkov
2022-10-19 13:25 ` Johan Hovold
2022-10-19 13:44 ` Dmitry Baryshkov
2022-10-19 13:51 ` Johan Hovold
2022-10-19 11:35 ` [PATCH v2 09/15] dt-bindings: phy: qcom,qmp-pcie: rename current bindings Johan Hovold
2022-10-19 12:39 ` Krzysztof Kozlowski
2022-10-19 11:35 ` [PATCH v2 10/15] dt-bindings: phy: qcom,qmp-pcie: add sc8280xp bindings Johan Hovold
2022-10-19 12:41 ` Krzysztof Kozlowski
2022-10-19 11:35 ` [PATCH v2 11/15] phy: qcom-qmp-pcie: restructure PHY creation Johan Hovold
2022-10-19 13:51 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 12/15] phy: qcom-qmp-pcie: fix initialisation reset Johan Hovold
2022-10-19 13:51 ` Dmitry Baryshkov
2022-10-19 13:52 ` Dmitry Baryshkov
2022-10-21 9:11 ` Johan Hovold
2022-10-19 11:35 ` Johan Hovold [this message]
2022-10-20 8:31 ` [PATCH v2 13/15] phy: qcom-qmp-pcie: add support for pipediv2 clock Dmitry Baryshkov
2022-10-20 9:05 ` Johan Hovold
2022-10-20 9:28 ` Dmitry Baryshkov
2022-10-20 10:49 ` Johan Hovold
2022-10-20 10:53 ` Dmitry Baryshkov
2022-10-19 11:35 ` [PATCH v2 14/15] phy: qcom-qmp-pcie: add support for sc8280xp Johan Hovold
2022-10-19 11:35 ` [PATCH v2 15/15] phy: qcom-qmp-pcie: add support for sc8280xp 4-lane PHYs Johan Hovold
2022-10-20 3:43 ` Dmitry Baryshkov
2022-10-20 6:43 ` Johan Hovold
2022-10-20 9:32 ` Dmitry Baryshkov
2022-10-20 10:59 ` Johan Hovold
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221019113552.22353-14-johan+linaro@kernel.org \
--to=johan+linaro@kernel.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=konrad.dybcio@somainline.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).