From: Bjorn Andersson <quic_bjorande@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
Sibi Sankar <quic_sibis@quicinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Georgi Djakov <djakov@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mike Tipton <quic_mdtipton@quicinc.com>,
Johan Hovold <johan+linaro@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 08/10] arm64: dts: qcom: sc8280xp: Set up L3 scaling
Date: Thu, 10 Nov 2022 19:25:13 -0800 [thread overview]
Message-ID: <20221111032515.3460-9-quic_bjorande@quicinc.com> (raw)
In-Reply-To: <20221111032515.3460-1-quic_bjorande@quicinc.com>
Add the L3 interconnect path to all CPUs and define the bandwidth
requirements for all opp entries across sc8280xp and sa8540p.
The values are based on the tables reported by the hardware, distributed
such that each value is the largest value, lower than the cluster
frequency.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org>
---
Changes since v1:
- None
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 39 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 51 ++++++++++++++++++++++++++
2 files changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
index 8ea2886fbab2..fd36800a7578 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
@@ -14,59 +14,81 @@
compatible = "operating-points-v2";
opp-shared;
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-peak-kBps = <(300000 * 32)>;
+ };
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
+ opp-peak-kBps = <(384000 * 32)>;
};
opp-499200000 {
opp-hz = /bits/ 64 <499200000>;
+ opp-peak-kBps = <(480000 * 32)>;
};
opp-595200000 {
opp-hz = /bits/ 64 <595200000>;
+ opp-peak-kBps = <(576000 * 32)>;
};
opp-710400000 {
opp-hz = /bits/ 64 <710400000>;
+ opp-peak-kBps = <(672000 * 32)>;
};
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
+ opp-peak-kBps = <(768000 * 32)>;
};
opp-902400000 {
opp-hz = /bits/ 64 <902400000>;
+ opp-peak-kBps = <(864000 * 32)>;
};
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
+ opp-peak-kBps = <(960000 * 32)>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
+ opp-peak-kBps = <(1075200 * 32)>;
};
opp-1209600000 {
opp-hz = /bits/ 64 <1209600000>;
+ opp-peak-kBps = <(1171200 * 32)>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
+ opp-peak-kBps = <(1286400 * 32)>;
};
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
+ opp-peak-kBps = <(1382400 * 32)>;
};
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
+ opp-peak-kBps = <(1497600 * 32)>;
};
opp-1670400000 {
opp-hz = /bits/ 64 <1670400000>;
+ opp-peak-kBps = <(1593600 * 32)>;
};
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-1881600000 {
opp-hz = /bits/ 64 <1881600000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2016000000 {
opp-hz = /bits/ 64 <2016000000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2131200000 {
opp-hz = /bits/ 64 <2131200000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2246400000 {
opp-hz = /bits/ 64 <2246400000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
};
@@ -76,54 +98,71 @@
opp-825600000 {
opp-hz = /bits/ 64 <825600000>;
+ opp-peak-kBps = <(300000 * 32)>;
};
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
+ opp-peak-kBps = <(864000 * 32)>;
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
+ opp-peak-kBps = <(960000 * 32)>;
};
opp-1171200000 {
opp-hz = /bits/ 64 <1171200000>;
+ opp-peak-kBps = <(1171200 * 32)>;
};
opp-1286400000 {
opp-hz = /bits/ 64 <1286400000>;
+ opp-peak-kBps = <(1286400 * 32)>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
+ opp-peak-kBps = <(1382400 * 32)>;
};
opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
+ opp-peak-kBps = <(1497600 * 32)>;
};
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
+ opp-peak-kBps = <(1593600 * 32)>;
};
opp-1747200000 {
opp-hz = /bits/ 64 <1747200000>;
+ opp-peak-kBps = <(1593600 * 32)>;
};
opp-1862400000 {
opp-hz = /bits/ 64 <1862400000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-1977600000 {
opp-hz = /bits/ 64 <1977600000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2169600000 {
opp-hz = /bits/ 64 <2169600000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2284800000 {
opp-hz = /bits/ 64 <2284800000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2380800000 {
opp-hz = /bits/ 64 <2380800000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2496000000 {
opp-hz = /bits/ 64 <2496000000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
opp-2592000000 {
opp-hz = /bits/ 64 <2592000000>;
+ opp-peak-kBps = <(1708800 * 32)>;
};
};
};
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 0e80cdcf6bcf..2ac8f5204905 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc8280xp.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -38,66 +39,87 @@
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
+ opp-peak-kBps = <(300000 * 32)>;
};
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
+ opp-peak-kBps = <(384000 * 32)>;
};
opp-499200000 {
opp-hz = /bits/ 64 <499200000>;
+ opp-peak-kBps = <(480000 * 32)>;
};
opp-595200000 {
opp-hz = /bits/ 64 <595200000>;
+ opp-peak-kBps = <(576000 * 32)>;
};
opp-691200000 {
opp-hz = /bits/ 64 <691200000>;
+ opp-peak-kBps = <(672000 * 32)>;
};
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
+ opp-peak-kBps = <(768000 * 32)>;
};
opp-902400000 {
opp-hz = /bits/ 64 <902400000>;
+ opp-peak-kBps = <(864000 * 32)>;
};
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
+ opp-peak-kBps = <(960000 * 32)>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
+ opp-peak-kBps = <(1075200 * 32)>;
};
opp-1209600000 {
opp-hz = /bits/ 64 <1209600000>;
+ opp-peak-kBps = <(1171200 * 32)>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
+ opp-peak-kBps = <(1267200 * 32)>;
};
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
+ opp-peak-kBps = <(1363200 * 32)>;
};
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
+ opp-peak-kBps = <(1536000 * 32)>;
};
opp-1670400000 {
opp-hz = /bits/ 64 <1670400000>;
+ opp-peak-kBps = <(1612800 * 32)>;
};
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-1881600000 {
opp-hz = /bits/ 64 <1881600000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-1996800000 {
opp-hz = /bits/ 64 <1996800000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2227200000 {
opp-hz = /bits/ 64 <2227200000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2342400000 {
opp-hz = /bits/ 64 <2342400000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2438400000 {
opp-hz = /bits/ 64 <2438400000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
};
@@ -107,66 +129,87 @@
opp-825600000 {
opp-hz = /bits/ 64 <825600000>;
+ opp-peak-kBps = <(768000 * 32)>;
};
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
+ opp-peak-kBps = <(864000 * 32)>;
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
+ opp-peak-kBps = <(960000 * 32)>;
};
opp-1171200000 {
opp-hz = /bits/ 64 <1171200000>;
+ opp-peak-kBps = <(1171200 * 32)>;
};
opp-1286400000 {
opp-hz = /bits/ 64 <1286400000>;
+ opp-peak-kBps = <(1267200 * 32)>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
+ opp-peak-kBps = <(1363200 * 32)>;
};
opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
+ opp-peak-kBps = <(1459200 * 32)>;
};
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
+ opp-peak-kBps = <(1612800 * 32)>;
};
opp-1747200000 {
opp-hz = /bits/ 64 <1747200000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-1862400000 {
opp-hz = /bits/ 64 <1862400000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-1977600000 {
opp-hz = /bits/ 64 <1977600000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2169600000 {
opp-hz = /bits/ 64 <2169600000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2284800000 {
opp-hz = /bits/ 64 <2284800000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2400000000 {
opp-hz = /bits/ 64 <2400000000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2496000000 {
opp-hz = /bits/ 64 <2496000000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2592000000 {
opp-hz = /bits/ 64 <2592000000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2688000000 {
opp-hz = /bits/ 64 <2688000000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2803200000 {
opp-hz = /bits/ 64 <2803200000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2899200000 {
opp-hz = /bits/ 64 <2899200000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
opp-2995200000 {
opp-hz = /bits/ 64 <2995200000>;
+ opp-peak-kBps = <(1689600 * 32)>;
};
};
@@ -185,6 +228,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "cache";
@@ -206,6 +250,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_100: l2-cache {
compatible = "cache";
@@ -224,6 +269,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_200: l2-cache {
compatible = "cache";
@@ -242,6 +288,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_300: l2-cache {
compatible = "cache";
@@ -260,6 +307,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_400: l2-cache {
compatible = "cache";
@@ -278,6 +326,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_500: l2-cache {
compatible = "cache";
@@ -296,6 +345,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_600: l2-cache {
compatible = "cache";
@@ -314,6 +364,7 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
+ interconnects = <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
L2_700: l2-cache {
compatible = "cache";
--
2.17.1
next prev parent reply other threads:[~2022-11-11 3:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 3:25 [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Bjorn Andersson
2022-11-11 3:25 ` [PATCH v2 01/10] interconnect: qcom: osm-l3: Use platform-independent node ids Bjorn Andersson
2022-11-11 10:23 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 02/10] interconnect: qcom: osm-l3: Squash common descriptors Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 03/10] interconnect: qcom: osm-l3: Add per-core EPSS L3 support Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 04/10] interconnect: qcom: osm-l3: Simplify osm_l3_set() Bjorn Andersson
2022-11-11 10:26 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 05/10] dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3 compatibles Bjorn Andersson
2022-11-11 8:36 ` Krzysztof Kozlowski
2022-11-11 10:32 ` Sibi Sankar
2022-11-11 18:08 ` Bjorn Andersson
2022-11-16 6:56 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 06/10] arm64: dts: qcom: Align with generic osm-l3/epss-l3 Bjorn Andersson
2022-11-11 10:44 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 07/10] arm64: dts: qcom: sc8280xp: Add epss_l3 node Bjorn Andersson
2022-11-11 10:33 ` Sibi Sankar
2022-11-11 3:25 ` Bjorn Andersson [this message]
2022-11-16 11:01 ` [PATCH v2 08/10] arm64: dts: qcom: sc8280xp: Set up L3 scaling Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 09/10] dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon instances Bjorn Andersson
2022-11-11 8:35 ` Krzysztof Kozlowski
2022-11-11 10:53 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 10/10] arm64: dts: qcom: sc8280xp: Add " Bjorn Andersson
2022-11-11 11:03 ` Sibi Sankar
2022-11-17 16:25 ` [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Georgi Djakov
2022-12-06 18:19 ` (subset) " Bjorn Andersson
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