[PATCH 0/6] Rongpin RP-H6B support (and support for GL850G)

[PATCH 0/6] Rongpin RP-H6B support (and support for GL850G)

[Icenowy Zheng]

This patchset adds support for Rongpin RP-H6B, and as a dependency,
power sequence support for its onboard USB hub, GL850G.

The first 3 patches are for GL850G, adding a binding for it and adding
its support to onboard_usb_hub driver.

The last 3 patches are for RP-H6B, also 2 for adding a binding and 1 for
the real DT.

Icenowy Zheng (6):
  dt-bindings: vendor-prefixes: add Genesys Logic
  dt-bindings: usb: Add binding for Genesys Logic GL850G hub controller
  usb: misc: onboard_usb_hub: add Genesys Logic GL850G hub support
  vendor-prefixes: Add Shenzhen Rongpin Electronics Co., Ltd
  dt-bindings: arm: sunxi: add Rongpin RP-H6B board
  arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and RP-H6B board

 .../devicetree/bindings/arm/sunxi.yaml        |   6 +
 .../bindings/usb/genesys,gl850g.yaml          |  48 ++++
 .../devicetree/bindings/vendor-prefixes.yaml  |   4 +
 arch/arm64/boot/dts/allwinner/Makefile        |   1 +
 .../boot/dts/allwinner/sun50i-h6-rp-h6b.dts   | 239 ++++++++++++++++++
 .../boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi  | 180 +++++++++++++
 drivers/usb/misc/onboard_usb_hub.c            |   2 +
 drivers/usb/misc/onboard_usb_hub.h            |   5 +
 8 files changed, 485 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi

-- 
2.37.1

[PATCH 1/6] dt-bindings: vendor-prefixes: add Genesys Logic

[Icenowy Zheng]

Genesys Logic, Inc. is a manufacturer for interface chips, especially
USB hubs.

https://www.genesyslogic.com.tw/

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 6e323a380294..43359c0ccaf5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -488,6 +488,8 @@ patternProperties:
     description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
   "^gemei,.*":
     description: Gemei Digital Technology Co., Ltd.
+  "^genesys,.*":
+    description: Genesys Logic, Inc.
   "^geniatech,.*":
     description: Geniatech, Inc.
   "^giantec,.*":
-- 
2.37.1

Re: [PATCH 1/6] dt-bindings: vendor-prefixes: add Genesys Logic

[Krzysztof Kozlowski]

On 27/11/2022 08:31, Icenowy Zheng wrote:
> Genesys Logic, Inc. is a manufacturer for interface chips, especially
> USB hubs.
> 
> https://www.genesyslogic.com.tw/


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 2/6] dt-bindings: usb: Add binding for Genesys Logic GL850G hub controller

[Icenowy Zheng]

The Genesys Logic GL850G is a USB 2.0 Single TT hub controller that
features 4 downstream ports, an internal 5V-to-3.3V LDO regulator (can
be bypassed) and an external reset pin.

Add a device tree binding for its USB protocol part. The internal LDO is
not covered by this and can just be modelled as a fixed regulator.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 .../bindings/usb/genesys,gl850g.yaml          | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/genesys,gl850g.yaml

diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
new file mode 100644
index 000000000000..d1fe539db399
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Genesys Logic GL850G USB 2.0 hub controller
+
+maintainers:
+  - Icenowy Zheng <uwu@icenowy.me>
+
+allOf:
+  - $ref: usb-device.yaml#
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - usb5e3,608
+
+  reg: true
+
+  reset-gpios:
+    description: GPIO specifier for GRST# pin.
+
+  vdd-supply:
+    description:
+      phandle to the regulator that provides power to the hub.
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    usb {
+        dr_mode = "host";
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        hub: hub@1 {
+            compatible = "usb5e3,608";
+            reg = <1>;
+            reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
+        };
+    };
-- 
2.37.1

Re: [PATCH 2/6] dt-bindings: usb: Add binding for Genesys Logic GL850G hub controller

[Rob Herring]

On Sun, 27 Nov 2022 15:31:36 +0800, Icenowy Zheng wrote:
> The Genesys Logic GL850G is a USB 2.0 Single TT hub controller that
> features 4 downstream ports, an internal 5V-to-3.3V LDO regulator (can
> be bypassed) and an external reset pin.
> 
> Add a device tree binding for its USB protocol part. The internal LDO is
> not covered by this and can just be modelled as a fixed regulator.
> 
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  .../bindings/usb/genesys,gl850g.yaml          | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/usb/genesys,gl850g.yaml: $id: relative path/filename doesn't match actual path or filename
	expected: http://devicetree.org/schemas/usb/genesys,gl850g.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml: duplicate '$id' value 'http://devicetree.org/schemas/usb/realtek,rts5411.yaml#'
Error: Documentation/devicetree/bindings/usb/genesys,gl850g.example.dts:26.41-42 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/usb/genesys,gl850g.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1492: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221127073140.2093897-3-uwu@icenowy.me

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command.

Re: [PATCH 2/6] dt-bindings: usb: Add binding for Genesys Logic GL850G hub controller

[Krzysztof Kozlowski]

On 27/11/2022 08:31, Icenowy Zheng wrote:
> The Genesys Logic GL850G is a USB 2.0 Single TT hub controller that
> features 4 downstream ports, an internal 5V-to-3.3V LDO regulator (can
> be bypassed) and an external reset pin.

Subject: drop second, redundant "binding for".

Few nits below.

> 
> Add a device tree binding for its USB protocol part. The internal LDO is
> not covered by this and can just be modelled as a fixed regulator.
> 
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  .../bindings/usb/genesys,gl850g.yaml          | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
> 
> diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
> new file mode 100644
> index 000000000000..d1fe539db399
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Genesys Logic GL850G USB 2.0 hub controller
> +
> +maintainers:
> +  - Icenowy Zheng <uwu@icenowy.me>
> +
> +allOf:
> +  - $ref: usb-device.yaml#
> +
> +properties:
> +  compatible:
> +    items:

Drop items, you have only one item.

> +      - enum:
> +          - usb5e3,608
> +
> +  reg: true
> +
> +  reset-gpios:
> +    description: GPIO specifier for GRST# pin.

Drop "GPIO specifier for", so just "GRST# pin". No need to describe
DeviceTree syntax.

> +
> +  vdd-supply:
> +    description:
> +      phandle to the regulator that provides power to the hub.

Also drop "phandle to"

> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    usb {
> +        dr_mode = "host";
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        hub: hub@1 {
> +            compatible = "usb5e3,608";
> +            reg = <1>;
> +            reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;

Missing header.

Does not look like you tested the bindings. Please run `make
dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).

> +        };
> +    };

Best regards,
Krzysztof

[PATCH 3/6] usb: misc: onboard_usb_hub: add Genesys Logic GL850G hub support

[Icenowy Zheng]

This is a 4-port USB 2.0 STT hub.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 drivers/usb/misc/onboard_usb_hub.c | 2 ++
 drivers/usb/misc/onboard_usb_hub.h | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/usb/misc/onboard_usb_hub.c b/drivers/usb/misc/onboard_usb_hub.c
index d63c63942af1..f5c71d724be6 100644
--- a/drivers/usb/misc/onboard_usb_hub.c
+++ b/drivers/usb/misc/onboard_usb_hub.c
@@ -334,6 +334,7 @@ static struct platform_driver onboard_hub_driver = {
 #define VENDOR_ID_MICROCHIP	0x0424
 #define VENDOR_ID_REALTEK	0x0bda
 #define VENDOR_ID_TI		0x0451
+#define VENDOR_ID_GENESYS	0x05e3
 
 /*
  * Returns the onboard_hub platform device that is associated with the USB
@@ -414,6 +415,7 @@ static const struct usb_device_id onboard_hub_id_table[] = {
 	{ USB_DEVICE(VENDOR_ID_REALTEK, 0x5414) }, /* RTS5414 USB 2.1 */
 	{ USB_DEVICE(VENDOR_ID_TI, 0x8140) }, /* TI USB8041 3.0 */
 	{ USB_DEVICE(VENDOR_ID_TI, 0x8142) }, /* TI USB8041 2.0 */
+	{ USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */
 	{}
 };
 MODULE_DEVICE_TABLE(usb, onboard_hub_id_table);
diff --git a/drivers/usb/misc/onboard_usb_hub.h b/drivers/usb/misc/onboard_usb_hub.h
index 34beab8bce3d..1ca188713b1f 100644
--- a/drivers/usb/misc/onboard_usb_hub.h
+++ b/drivers/usb/misc/onboard_usb_hub.h
@@ -22,6 +22,10 @@ static const struct onboard_hub_pdata ti_tusb8041_data = {
 	.reset_us = 3000,
 };
 
+static const struct onboard_hub_pdata genesys_gl850g_data = {
+	.reset_us = 3,
+};
+
 static const struct of_device_id onboard_hub_match[] = {
 	{ .compatible = "usb424,2514", .data = &microchip_usb424_data, },
 	{ .compatible = "usb451,8140", .data = &ti_tusb8041_data, },
@@ -30,6 +34,7 @@ static const struct of_device_id onboard_hub_match[] = {
 	{ .compatible = "usbbda,5411", .data = &realtek_rts5411_data, },
 	{ .compatible = "usbbda,414", .data = &realtek_rts5411_data, },
 	{ .compatible = "usbbda,5414", .data = &realtek_rts5411_data, },
+	{ .compatible = "usb5e3,608", .data = &genesys_gl850g_data, },
 	{}
 };
 
-- 
2.37.1

Re: [PATCH 3/6] usb: misc: onboard_usb_hub: add Genesys Logic GL850G hub support

[Matthias Kaehlcke]

On Sun, Nov 27, 2022 at 03:31:37PM +0800, Icenowy Zheng wrote:
> This is a 4-port USB 2.0 STT hub.

The commit message is supposed the describe the change, which
is almost certainly not a 4-port USB 2.0 STT hub :)

It could be something like "Add support for the Genesys Logic
GL850G, which is a 4-port USB 2.0 STT hub."

> 
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  drivers/usb/misc/onboard_usb_hub.c | 2 ++
>  drivers/usb/misc/onboard_usb_hub.h | 5 +++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/usb/misc/onboard_usb_hub.c b/drivers/usb/misc/onboard_usb_hub.c
> index d63c63942af1..f5c71d724be6 100644
> --- a/drivers/usb/misc/onboard_usb_hub.c
> +++ b/drivers/usb/misc/onboard_usb_hub.c
> @@ -334,6 +334,7 @@ static struct platform_driver onboard_hub_driver = {
>  #define VENDOR_ID_MICROCHIP	0x0424
>  #define VENDOR_ID_REALTEK	0x0bda
>  #define VENDOR_ID_TI		0x0451
> +#define VENDOR_ID_GENESYS	0x05e3

Please insert the new entry in alphabetical order, i.e. before
VENDOR_ID_MICROCHIP.

>  
>  /*
>   * Returns the onboard_hub platform device that is associated with the USB
> @@ -414,6 +415,7 @@ static const struct usb_device_id onboard_hub_id_table[] = {
>  	{ USB_DEVICE(VENDOR_ID_REALTEK, 0x5414) }, /* RTS5414 USB 2.1 */
>  	{ USB_DEVICE(VENDOR_ID_TI, 0x8140) }, /* TI USB8041 3.0 */
>  	{ USB_DEVICE(VENDOR_ID_TI, 0x8142) }, /* TI USB8041 2.0 */
> +	{ USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */

Same here, the table is ordered alphabetically

>  	{}
>  };
>  MODULE_DEVICE_TABLE(usb, onboard_hub_id_table);
> diff --git a/drivers/usb/misc/onboard_usb_hub.h b/drivers/usb/misc/onboard_usb_hub.h
> index 34beab8bce3d..1ca188713b1f 100644
> --- a/drivers/usb/misc/onboard_usb_hub.h
> +++ b/drivers/usb/misc/onboard_usb_hub.h
> @@ -22,6 +22,10 @@ static const struct onboard_hub_pdata ti_tusb8041_data = {
>  	.reset_us = 3000,
>  };
>  
> +static const struct onboard_hub_pdata genesys_gl850g_data = {
> +	.reset_us = 3,
> +};
> +
>  static const struct of_device_id onboard_hub_match[] = {
>  	{ .compatible = "usb424,2514", .data = &microchip_usb424_data, },
>  	{ .compatible = "usb451,8140", .data = &ti_tusb8041_data, },
> @@ -30,6 +34,7 @@ static const struct of_device_id onboard_hub_match[] = {
>  	{ .compatible = "usbbda,5411", .data = &realtek_rts5411_data, },
>  	{ .compatible = "usbbda,414", .data = &realtek_rts5411_data, },
>  	{ .compatible = "usbbda,5414", .data = &realtek_rts5411_data, },
> +	{ .compatible = "usb5e3,608", .data = &genesys_gl850g_data, },

These table is ordered by compatible string, the new entry should be
inserted after "usb451,8142".

Thanks

m.

[PATCH 4/6] vendor-prefixes: Add Shenzhen Rongpin Electronics Co., Ltd

[Icenowy Zheng]

Add the vendor prefix for Shenzhen Rongpin Electronics Co., Ltd, which
specializes in ARM SoMs and EVBs.

Website: http://www.rpdzkj.com/

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 43359c0ccaf5..952ddeed4b4a 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1091,6 +1091,8 @@ patternProperties:
     description: ROHM Semiconductor Co., Ltd
   "^ronbo,.*":
     description: Ronbo Electronics
+  "^rongpin,.*":
+    description: Shenzhen Rongpin Electronics Co., Ltd
   "^roofull,.*":
     description: Shenzhen Roofull Technology Co, Ltd
   "^roseapplepi,.*":
-- 
2.37.1

Re: [PATCH 4/6] vendor-prefixes: Add Shenzhen Rongpin Electronics Co., Ltd

[Krzysztof Kozlowski]

On 27/11/2022 08:31, Icenowy Zheng wrote:
> Add the vendor prefix for Shenzhen Rongpin Electronics Co., Ltd, which
> specializes in ARM SoMs and EVBs.
> 
> Website: http://www.rpdzkj.com/
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 5/6] dt-bindings: arm: sunxi: add Rongpin RP-H6B board

[Icenowy Zheng]

Rongpin RP-H6B is a development board with RP-H6C SoM, which uses an
Allwinner H6 SoC.

Add compatible strings for it, including the board-specific compatible
and the SoM compatible.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 3ad1cd50e3fe..482631815f2f 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -792,6 +792,12 @@ properties:
           - const: rervision,h3-dvk
           - const: allwinner,sun8i-h3
 
+      - description: Rongpin RP-H6B development board
+        items:
+          - const: rongpin,rp-h6b
+          - const: rongpin,rp-h6c
+          - const: allwinner,sun50i-h6
+
       - description: Sinlinx SinA31s Core Board
         items:
           - const: sinlinx,sina31s
-- 
2.37.1

Re: [PATCH 5/6] dt-bindings: arm: sunxi: add Rongpin RP-H6B board

[Krzysztof Kozlowski]

On 27/11/2022 08:31, Icenowy Zheng wrote:
> Rongpin RP-H6B is a development board with RP-H6C SoM, which uses an
> Allwinner H6 SoC.
> 
> Add compatible strings for it, including the board-specific compatible
> and the SoM compatible.
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 6/6] arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and RP-H6B board

[Icenowy Zheng]

Rongpin RP-H6C is an Allwinner H6 SoM by Rongpin, with Allwinner H6 SoC,
AXP805 PMIC, LPDDR3 memory and eMMC storage on it.

RP-H6B is their official evaluation board of RP-H6C, with an onboard
GL850G USB hub, Ampak AP6212 Wi-Fi module and some circuits about LVDS
display. It also exports the OTG USB port, the USB 3.0 port, PCIe bus
(as mPCIe slot), internal Ethernet PHY, analog audio/video and HDMI
port.

Add a DTSI file for the SoM and a DTS for the full board.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
 arch/arm64/boot/dts/allwinner/Makefile        |   1 +
 .../boot/dts/allwinner/sun50i-h6-rp-h6b.dts   | 239 ++++++++++++++++++
 .../boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi  | 180 +++++++++++++
 3 files changed, 420 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6a96494a2e0a..e289fedcac29 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-rp-h6b.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
new file mode 100644
index 000000000000..9fa40c365e63
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Icenowy Zheng <icenowy@aosc.io>
+ */
+/dts-v1/;
+
+#include "sun50i-h6-rp-h6c.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Rongpin RP-H6B baseboard";
+	compatible = "rongpin,rp-h6b", "rongpin,rp-h6c",
+		     "allwinner,sun50i-h6";
+
+	aliases {
+		ethernet0 = &emac;
+		serial0 = &uart0;
+		/*
+		 * Prioritize the external RTC because it's powered
+		 * by a cell battery.
+		 */
+		rtc0 = &hym8563;
+		rtc1 = &rtc;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	hdmi_connector: connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led {
+			label = "rongpin:red:link";
+			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
+			/*
+			 * On the schematics this LED is marked as "lit when
+			 * powering on and blinking when running".
+			 */
+			linux,default-trigger = "heartbeat";
+		};
+	};
+
+	/*
+	 * The VDD_5V power rail is connected to the internal regulator
+	 * of GL850G, to power up the 3.3V core of it.
+	 */
+	reg_v33_hub: v33-hub {
+		compatible = "regulator-fixed";
+		regulator-name = "v33-hub";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&reg_vdd_5v>;
+	};
+
+	/*
+	 * This board inputs 5V to AP6212 via a SS34 diode. Use this
+	 * regulator as the model of the internal regulator of AP6212.
+	 */
+	reg_vcc3v3_ap6212: vcc3v3-ap6212 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3-ap6212";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&reg_ps>;
+	};
+
+	reg_vdd_5v: vdd-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&reg_ps>;
+	};
+
+	/* For mPCIe slot WWAN modules / PCIe cards */
+	reg_vdd_3g: vdd-3g {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-3g";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&reg_ps>;
+		/*
+		 * As a hack for lacking of control of a hub downstream
+		 * port's Vbus.
+		 */
+		regulator-always-on;
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+		post-power-on-delay-ms = <200>;
+	};
+};
+
+&de {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	hub@1 {
+		/* Genesys Logic GL850G usb hub */
+		compatible = "usb5e3,608";
+		reg = <1>;
+		vdd-supply = <&reg_v33_hub>;
+		reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&i2c0 {
+	status = "okay";
+
+	hym8563: rtc@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+	};
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins>;
+	vmmc-supply = <&reg_cldo1>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_vcc3v3_ap6212>;
+	vqmmc-supply = <&reg_bldo3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	non-removable;
+	bus-width = <4>;
+	status = "okay";
+
+	brcmf: wifi@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&r_pio>;
+		interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
+		interrupt-names = "host-wake";
+	};
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+/* Converted from 12v with a fixed DC-DC on the baseboard */
+&reg_ps {
+	regulator-min-microvolt = <5000000>;
+	regulator-max-microvolt = <5000000>;
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+/* Bluetooth */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		max-speed = <1500000>;
+		clocks = <&rtc CLK_OSC32K_FANOUT>;
+		clock-names = "lpo";
+		vbat-supply = <&reg_ps>;
+		vddio-supply = <&reg_bldo3>;
+		device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
+		shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
+		interrupt-parent = <&r_pio>;
+		interrupts = <1 1 IRQ_TYPE_EDGE_FALLING>; /* PM1 */
+		interrupt-names = "host-wakeup";
+	};
+};
+
+&uart1_pins {
+	bias-pull-up;
+};
+
+&uart1_rts_cts_pins {
+	bias-pull-up;
+};
+
+&usb2otg {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb2phy {
+	usb0_vbus-supply = <&reg_vdd_5v>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
new file mode 100644
index 000000000000..53822718e2d7
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2019-2022 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
+#include "sun50i-h6-gpu-opp.dtsi"
+
+/ {
+	ext_osc32k: ext_osc32k_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "ext_osc32k";
+	};
+
+	/* Marked 3.4v~5.5v on SoM schematics */
+	reg_ps: ps {
+		compatible = "regulator-fixed";
+		regulator-name = "ps";
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdca>;
+};
+
+&gpu {
+	mali-supply = <&reg_dcdcc>;
+	status = "okay";
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_pins>;
+	vmmc-supply = <&reg_cldo1>;
+	vqmmc-supply = <&reg_bldo2>;
+	non-removable;
+	cap-mmc-hw-reset;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&pio {
+	vcc-pc-supply = <&reg_bldo2>;
+	vcc-pd-supply = <&reg_aldo2>;
+	vcc-pg-supply = <&reg_bldo3>;
+};
+
+&r_pio {
+	/*
+	 * FIXME: We can't add that supply for now since it would
+	 * create a circular dependency between pinctrl, the regulator
+	 * and the RSB Bus.
+	 *
+	 * vcc-pl-supply = <&reg_aldo1>;
+	 */
+	vcc-pm-supply = <&reg_bldo3>;
+};
+
+&r_rsb {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	axp805: pmic@745 {
+		compatible = "x-powers,axp805", "x-powers,axp806";
+		reg = <0x745>;
+		interrupt-parent = <&r_intc>;
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		x-powers,self-working-mode;
+		vina-supply = <&reg_ps>;
+		vinb-supply = <&reg_ps>;
+		vinc-supply = <&reg_ps>;
+		vind-supply = <&reg_ps>;
+		vine-supply = <&reg_ps>;
+		aldoin-supply = <&reg_ps>;
+		bldoin-supply = <&reg_ps>;
+		cldoin-supply = <&reg_ps>;
+
+		regulators {
+			reg_aldo1: aldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-pl";
+			};
+
+			reg_aldo2: aldo2 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-ac200";
+				regulator-enable-ramp-delay = <100000>;
+			};
+
+			aldo3 {
+				/* unused */
+			};
+
+			reg_bldo1: bldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-bias-pll";
+			};
+
+			reg_bldo2: bldo2 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-efuse-pcie-hdmi-io";
+			};
+
+			reg_bldo3: bldo3 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-dcxoio";
+			};
+
+			bldo4 {
+				/* unused */
+			};
+
+			reg_cldo1: cldo1 {
+				/* This regulator is connected with ALDO3 */
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-3v3-2";
+			};
+
+			cldo2 {
+				/* unused */
+			};
+
+			cldo3 {
+				/* unused */
+			};
+
+			reg_dcdca: dcdca {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1160000>;
+				regulator-ramp-delay = <2500>;
+				regulator-name = "vdd-cpu";
+			};
+
+			reg_dcdcc: dcdcc {
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1080000>;
+				regulator-name = "vdd-gpu";
+			};
+
+			reg_dcdcd: dcdcd {
+				regulator-always-on;
+				regulator-min-microvolt = <960000>;
+				regulator-max-microvolt = <960000>;
+				regulator-name = "vdd-sys";
+			};
+
+			reg_dcdce: dcdce {
+				regulator-always-on;
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-name = "vcc-dram";
+			};
+
+			sw {
+				/* unused */
+			};
+		};
+	};
+};
+
+&rtc {
+	clocks = <&ext_osc32k>;
+};
-- 
2.37.1

Re: [PATCH 6/6] arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and RP-H6B board

[Krzysztof Kozlowski]

On 27/11/2022 08:31, Icenowy Zheng wrote:
> Rongpin RP-H6C is an Allwinner H6 SoM by Rongpin, with Allwinner H6 SoC,
> AXP805 PMIC, LPDDR3 memory and eMMC storage on it.
> 
> RP-H6B is their official evaluation board of RP-H6C, with an onboard
> GL850G USB hub, Ampak AP6212 Wi-Fi module and some circuits about LVDS
> display. It also exports the OTG USB port, the USB 3.0 port, PCIe bus
> (as mPCIe slot), internal Ethernet PHY, analog audio/video and HDMI
> port.
> 
> Add a DTSI file for the SoM and a DTS for the full board.
> 
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
>  arch/arm64/boot/dts/allwinner/Makefile        |   1 +
>  .../boot/dts/allwinner/sun50i-h6-rp-h6b.dts   | 239 ++++++++++++++++++
>  .../boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi  | 180 +++++++++++++
>  3 files changed, 420 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
>  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> 
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 6a96494a2e0a..e289fedcac29 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-rp-h6b.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
> new file mode 100644
> index 000000000000..9fa40c365e63
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
> @@ -0,0 +1,239 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2022 Icenowy Zheng <icenowy@aosc.io>
> + */
> +/dts-v1/;
> +
> +#include "sun50i-h6-rp-h6c.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	model = "Rongpin RP-H6B baseboard";
> +	compatible = "rongpin,rp-h6b", "rongpin,rp-h6c",
> +		     "allwinner,sun50i-h6";
> +
> +	aliases {
> +		ethernet0 = &emac;
> +		serial0 = &uart0;
> +		/*
> +		 * Prioritize the external RTC because it's powered
> +		 * by a cell battery.
> +		 */
> +		rtc0 = &hym8563;
> +		rtc1 = &rtc;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	hdmi_connector: connector {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con_in: endpoint {
> +				remote-endpoint = <&hdmi_out_con>;
> +			};
> +		};
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led {
> +			label = "rongpin:red:link";
> +			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
> +			/*
> +			 * On the schematics this LED is marked as "lit when
> +			 * powering on and blinking when running".
> +			 */
> +			linux,default-trigger = "heartbeat";
> +		};
> +	};
> +
> +	/*
> +	 * The VDD_5V power rail is connected to the internal regulator
> +	 * of GL850G, to power up the 3.3V core of it.
> +	 */
> +	reg_v33_hub: v33-hub {

Node names should be generic, so at least generic "regulator" prefix or
suffix.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation

The same in further places.

> +		compatible = "regulator-fixed";
> +		regulator-name = "v33-hub";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&reg_vdd_5v>;
> +	};
> +
> +	/*
> +	 * This board inputs 5V to AP6212 via a SS34 diode. Use this
> +	 * regulator as the model of the internal regulator of AP6212.
> +	 */
> +	reg_vcc3v3_ap6212: vcc3v3-ap6212 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc3v3-ap6212";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&reg_ps>;
> +	};
> +
> +	reg_vdd_5v: vdd-5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd-5v";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		startup-delay-us = <100000>;
> +		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		vin-supply = <&reg_ps>;
> +	};
> +
> +	/* For mPCIe slot WWAN modules / PCIe cards */
> +	reg_vdd_3g: vdd-3g {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd-3g";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		startup-delay-us = <100000>;
> +		gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		vin-supply = <&reg_ps>;
> +		/*
> +		 * As a hack for lacking of control of a hub downstream
> +		 * port's Vbus.
> +		 */
> +		regulator-always-on;
> +	};
> +
> +	wifi_pwrseq: wifi_pwrseq {

No underscores in node names.

> +		compatible = "mmc-pwrseq-simple";
> +		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
> +		post-power-on-delay-ms = <200>;
> +	};
> +};
> +
> +&de {
> +	status = "okay";
> +};
> +
> +&ehci0 {
> +	status = "okay";
> +};
> +
> +&ehci3 {
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	hub@1 {
> +		/* Genesys Logic GL850G usb hub */
> +		compatible = "usb5e3,608";
> +		reg = <1>;
> +		vdd-supply = <&reg_v33_hub>;
> +		reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&hdmi {
> +	status = "okay";
> +};
> +
> +&hdmi_out {
> +	hdmi_out_con: endpoint {
> +		remote-endpoint = <&hdmi_con_in>;
> +	};
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +
> +	hym8563: rtc@51 {
> +		compatible = "haoyu,hym8563";
> +		reg = <0x51>;
> +		#clock-cells = <0>;
> +	};
> +};
> +
> +&mmc0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc0_pins>;
> +	vmmc-supply = <&reg_cldo1>;
> +	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
> +	bus-width = <4>;
> +	status = "okay";
> +};
> +
> +&mmc1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc1_pins>;
> +	vmmc-supply = <&reg_vcc3v3_ap6212>;
> +	vqmmc-supply = <&reg_bldo3>;
> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	non-removable;
> +	bus-width = <4>;
> +	status = "okay";
> +
> +	brcmf: wifi@1 {
> +		reg = <1>;
> +		compatible = "brcm,bcm4329-fmac";
> +		interrupt-parent = <&r_pio>;
> +		interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
> +		interrupt-names = "host-wake";
> +	};
> +};
> +
> +&ohci0 {
> +	status = "okay";
> +};
> +
> +/* Converted from 12v with a fixed DC-DC on the baseboard */
> +&reg_ps {
> +	regulator-min-microvolt = <5000000>;
> +	regulator-max-microvolt = <5000000>;
> +};
> +
> +&uart0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart0_ph_pins>;
> +	status = "okay";
> +};
> +
> +/* Bluetooth */
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
> +	uart-has-rtscts;
> +	status = "okay";
> +
> +	bluetooth {
> +		compatible = "brcm,bcm43438-bt";
> +		max-speed = <1500000>;
> +		clocks = <&rtc CLK_OSC32K_FANOUT>;
> +		clock-names = "lpo";
> +		vbat-supply = <&reg_ps>;
> +		vddio-supply = <&reg_bldo3>;
> +		device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
> +		shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
> +		interrupt-parent = <&r_pio>;
> +		interrupts = <1 1 IRQ_TYPE_EDGE_FALLING>; /* PM1 */
> +		interrupt-names = "host-wakeup";
> +	};
> +};
> +
> +&uart1_pins {
> +	bias-pull-up;
> +};
> +
> +&uart1_rts_cts_pins {
> +	bias-pull-up;
> +};
> +
> +&usb2otg {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usb2phy {
> +	usb0_vbus-supply = <&reg_vdd_5v>;
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> new file mode 100644
> index 000000000000..53822718e2d7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> @@ -0,0 +1,180 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2019-2022 Icenowy Zheng <icenowy@aosc.io>
> + */
> +
> +#include "sun50i-h6.dtsi"
> +#include "sun50i-h6-cpu-opp.dtsi"
> +#include "sun50i-h6-gpu-opp.dtsi"
> +
> +/ {
> +	ext_osc32k: ext_osc32k_clk {

No underscores in node names.

> +		#clock-cells = <0>;
> +		compatible = "fixed-clock";
> +		clock-frequency = <32768>;
> +		clock-output-names = "ext_osc32k";
> +	};
> +
> +	/* Marked 3.4v~5.5v on SoM schematics */
> +	reg_ps: ps {

regulator prefix/suffix/etc

> +		compatible = "regulator-fixed";
> +		regulator-name = "ps";
> +	};
> +};
> +

Best regards,
Krzysztof