* [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2022-12-29 15:36 ` kernel test robot
2023-01-02 18:39 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 02/14] drm/panel-asus-z00t-tm5p5-n35596: Drop custom DSI write macros Javier Martinez Canillas
` (13 subsequent siblings)
14 siblings, 2 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, dri-devel
Many panel drivers define dsi_dcs_write_seq() and dsi_generic_write_seq()
macros to send DCS commands and generic write packets respectively, with
the payload specified as a list of parameters instead of using arrays.
There's already a macro for the former, introduced by commit 2a9e9daf75231
("drm/mipi-dsi: Introduce mipi_dsi_dcs_write_seq macro") so drivers can be
changed to use that. But there isn't one yet for the latter, let's add it.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
include/drm/drm_mipi_dsi.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 20b21b577dea..c7c458131ba1 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -297,6 +297,22 @@ int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
u16 *brightness);
+/**
+ * mipi_dsi_generic_write - transmit data using a generic write packet
+ * @dsi: DSI peripheral device
+ * @seq: buffer containing the payload
+ */
+#define mipi_dsi_generic_write_seq(dsi, seq...) do { \
+ static const u8 d[] = { seq }; \
+ struct device *dev = &dsi->dev; \
+ int ret; \
+ ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
+ if (ret < 0) { \
+ dev_err_ratelimited(dev, "transmit data failed: %d\n", ret); \
+ return ret; \
+ } \
+ } while (0)
+
/**
* mipi_dsi_dcs_write_seq - transmit a DCS command with payload
* @dsi: DSI peripheral device
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
2022-12-28 1:47 ` [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro Javier Martinez Canillas
@ 2022-12-29 15:36 ` kernel test robot
2023-01-02 18:39 ` Sam Ravnborg
1 sibling, 0 replies; 36+ messages in thread
From: kernel test robot @ 2022-12-29 15:36 UTC (permalink / raw)
To: Javier Martinez Canillas, linux-kernel
Cc: oe-kbuild-all, Thomas Zimmermann, Javier Martinez Canillas, dri-devel
[-- Attachment #1: Type: text/plain, Size: 3974 bytes --]
Hi Javier,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v6.2-rc1 next-20221226]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Javier-Martinez-Canillas/drm-mipi-dsi-Add-a-mipi_dsi_dcs_write_seq-macro/20221228-100040
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20221228014757.3170486-2-javierm%40redhat.com
patch subject: [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
reproduce:
# https://github.com/intel-lab-lkp/linux/commit/6dbe3eb57c38eaa1be1271fe9563406472377dc7
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Javier-Martinez-Canillas/drm-mipi-dsi-Add-a-mipi_dsi_dcs_write_seq-macro/20221228-100040
git checkout 6dbe3eb57c38eaa1be1271fe9563406472377dc7
make menuconfig
# enable CONFIG_COMPILE_TEST, CONFIG_WARN_MISSING_DOCUMENTS, CONFIG_WARN_ABI_ERRORS
make htmldocs
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> ./include/drm/drm_mipi_dsi.h:314: warning: expecting prototype for mipi_dsi_generic_write(). Prototype was for mipi_dsi_generic_write_seq() instead
vim +314 ./include/drm/drm_mipi_dsi.h
271
272 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
273 const void *data, size_t len);
274 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
275 const void *data, size_t len);
276 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
277 size_t len);
278 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
279 int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
280 int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
281 int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
282 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
283 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
284 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
285 int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
286 int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
287 u16 end);
288 int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
289 u16 end);
290 int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
291 int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
292 enum mipi_dsi_dcs_tear_mode mode);
293 int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
294 int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
295 int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
296 u16 brightness);
297 int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
298 u16 *brightness);
299
300 /**
301 * mipi_dsi_generic_write - transmit data using a generic write packet
302 * @dsi: DSI peripheral device
303 * @seq: buffer containing the payload
304 */
305 #define mipi_dsi_generic_write_seq(dsi, seq...) do { \
306 static const u8 d[] = { seq }; \
307 struct device *dev = &dsi->dev; \
308 int ret; \
309 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
310 if (ret < 0) { \
311 dev_err_ratelimited(dev, "transmit data failed: %d\n", ret); \
312 return ret; \
313 } \
> 314 } while (0)
315
--
0-DAY CI Kernel Test Service
https://01.org/lkp
[-- Attachment #2: config --]
[-- Type: text/plain, Size: 38869 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86_64 6.1.0-rc6 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="gcc-11 (Debian 11.3.0-8) 11.3.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=110300
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=23900
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=23900
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_PAHOLE_VERSION=123
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y
CONFIG_THREAD_INFO_IN_TASK=y
#
# General setup
#
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_COMPILE_TEST=y
# CONFIG_WERROR is not set
CONFIG_LOCALVERSION=""
CONFIG_BUILD_SALT=""
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
CONFIG_HAVE_KERNEL_ZSTD=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_KERNEL_LZ4 is not set
# CONFIG_KERNEL_ZSTD is not set
CONFIG_DEFAULT_INIT=""
CONFIG_DEFAULT_HOSTNAME="(none)"
# CONFIG_SYSVIPC is not set
# CONFIG_WATCH_QUEUE is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
# CONFIG_USELIB is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y
CONFIG_GENERIC_IRQ_RESERVATION_MODE=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
# end of IRQ subsystem
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_ARCH_CLOCKSOURCE_INIT=y
CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
#
# Timers subsystem
#
CONFIG_HZ_PERIODIC=y
# CONFIG_NO_HZ_IDLE is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100
# end of Timers subsystem
CONFIG_HAVE_EBPF_JIT=y
CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
#
# BPF subsystem
#
# CONFIG_BPF_SYSCALL is not set
# end of BPF subsystem
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_PREEMPT_DYNAMIC is not set
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_PSI is not set
# end of CPU/Task time and stats accounting
CONFIG_CPU_ISOLATION=y
#
# RCU Subsystem
#
CONFIG_TINY_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
CONFIG_TINY_SRCU=y
# end of RCU Subsystem
# CONFIG_IKCONFIG is not set
# CONFIG_IKHEADERS is not set
CONFIG_LOG_BUF_SHIFT=17
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
#
# Scheduler features
#
# end of Scheduler features
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y
CONFIG_CC_HAS_INT128=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
CONFIG_ARCH_SUPPORTS_INT128=y
# CONFIG_CGROUPS is not set
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_TIME_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BOOT_CONFIG is not set
# CONFIG_INITRAMFS_PRESERVE_MTIME is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
CONFIG_SYSCTL=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_HAVE_PCSPKR_PLATFORM=y
# CONFIG_EXPERT is not set
CONFIG_MULTIUSER=y
CONFIG_SGETMASK_SYSCALL=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_FHANDLE=y
CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_PCSPKR_PLATFORM=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_IO_URING=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_RSEQ=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# end of Kernel Performance Events And Counters
# CONFIG_PROFILING is not set
# end of General setup
CONFIG_64BIT=y
CONFIG_X86_64=y
CONFIG_X86=y
CONFIG_INSTRUCTION_DECODER=y
CONFIG_OUTPUT_FORMAT="elf64-x86-64"
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_MMU=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=28
CONFIG_ARCH_MMAP_RND_BITS_MAX=32
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ARCH_HAS_CPU_RELAX=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_NR_GPIO=1024
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_AUDIT_ARCH=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_CC_HAS_SANE_STACKPROTECTOR=y
#
# Processor type and features
#
# CONFIG_SMP is not set
CONFIG_X86_FEATURE_NAMES=y
CONFIG_X86_MPPARSE=y
# CONFIG_GOLDFISH is not set
# CONFIG_X86_CPU_RESCTRL is not set
# CONFIG_X86_EXTENDED_PLATFORM is not set
# CONFIG_SCHED_OMIT_FRAME_POINTER is not set
# CONFIG_HYPERVISOR_GUEST is not set
# CONFIG_MK8 is not set
# CONFIG_MPSC is not set
# CONFIG_MCORE2 is not set
# CONFIG_MATOM is not set
CONFIG_GENERIC_CPU=y
CONFIG_X86_INTERNODE_CACHE_SHIFT=6
CONFIG_X86_L1_CACHE_SHIFT=6
CONFIG_X86_TSC=y
CONFIG_X86_CMPXCHG64=y
CONFIG_X86_CMOV=y
CONFIG_X86_MINIMUM_CPU_FAMILY=64
CONFIG_X86_DEBUGCTLMSR=y
CONFIG_IA32_FEAT_CTL=y
CONFIG_X86_VMX_FEATURE_NAMES=y
CONFIG_CPU_SUP_INTEL=y
CONFIG_CPU_SUP_AMD=y
CONFIG_CPU_SUP_HYGON=y
CONFIG_CPU_SUP_CENTAUR=y
CONFIG_CPU_SUP_ZHAOXIN=y
CONFIG_HPET_TIMER=y
CONFIG_DMI=y
CONFIG_NR_CPUS_RANGE_BEGIN=1
CONFIG_NR_CPUS_RANGE_END=1
CONFIG_NR_CPUS_DEFAULT=1
CONFIG_NR_CPUS=1
CONFIG_UP_LATE_INIT=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y
# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set
# CONFIG_X86_MCE is not set
#
# Performance monitoring
#
# CONFIG_PERF_EVENTS_AMD_POWER is not set
# CONFIG_PERF_EVENTS_AMD_UNCORE is not set
# CONFIG_PERF_EVENTS_AMD_BRS is not set
# end of Performance monitoring
CONFIG_X86_16BIT=y
CONFIG_X86_ESPFIX64=y
CONFIG_X86_VSYSCALL_EMULATION=y
# CONFIG_X86_IOPL_IOPERM is not set
# CONFIG_MICROCODE is not set
# CONFIG_X86_MSR is not set
# CONFIG_X86_CPUID is not set
# CONFIG_X86_5LEVEL is not set
CONFIG_X86_DIRECT_GBPAGES=y
# CONFIG_AMD_MEM_ENCRYPT is not set
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set
CONFIG_MTRR=y
# CONFIG_MTRR_SANITIZER is not set
CONFIG_X86_PAT=y
CONFIG_ARCH_USES_PG_UNCACHED=y
CONFIG_X86_UMIP=y
CONFIG_CC_HAS_IBT=y
# CONFIG_X86_KERNEL_IBT is not set
# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set
CONFIG_X86_INTEL_TSX_MODE_OFF=y
# CONFIG_X86_INTEL_TSX_MODE_ON is not set
# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PHYSICAL_START=0x1000000
# CONFIG_RELOCATABLE is not set
CONFIG_PHYSICAL_ALIGN=0x200000
CONFIG_LEGACY_VSYSCALL_XONLY=y
# CONFIG_LEGACY_VSYSCALL_NONE is not set
# CONFIG_CMDLINE_BOOL is not set
CONFIG_MODIFY_LDT_SYSCALL=y
# CONFIG_STRICT_SIGALTSTACK_SIZE is not set
CONFIG_HAVE_LIVEPATCH=y
# end of Processor type and features
CONFIG_CC_HAS_SLS=y
CONFIG_CC_HAS_RETURN_THUNK=y
# CONFIG_SPECULATION_MITIGATIONS is not set
CONFIG_ARCH_HAS_ADD_PAGES=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
#
# Power management and ACPI options
#
# CONFIG_SUSPEND is not set
# CONFIG_PM is not set
CONFIG_ARCH_SUPPORTS_ACPI=y
# CONFIG_ACPI is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
# end of CPU Frequency scaling
#
# CPU Idle
#
# CONFIG_CPU_IDLE is not set
# end of CPU Idle
# end of Power management and ACPI options
#
# Bus options (PCI etc.)
#
CONFIG_ISA_DMA_API=y
# end of Bus options (PCI etc.)
#
# Binary Emulations
#
# CONFIG_IA32_EMULATION is not set
# CONFIG_X86_X32_ABI is not set
# end of Binary Emulations
CONFIG_HAVE_KVM=y
# CONFIG_VIRTUALIZATION is not set
CONFIG_AS_AVX512=y
CONFIG_AS_SHA1_NI=y
CONFIG_AS_SHA256_NI=y
CONFIG_AS_TPAUSE=y
#
# General architecture-dependent options
#
CONFIG_GENERIC_ENTRY=y
# CONFIG_JUMP_LABEL is not set
# CONFIG_STATIC_CALL_SELFTEST is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_HAVE_ASM_MODVERSIONS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_RUST=y
CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
CONFIG_HAVE_USER_RETURN_NOTIFIER=y
CONFIG_HAVE_PERF_EVENTS_NMI=y
CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_HAVE_ARCH_SECCOMP=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
# CONFIG_SECCOMP is not set
CONFIG_HAVE_ARCH_STACKLEAK=y
CONFIG_HAVE_STACKPROTECTOR=y
# CONFIG_STACKPROTECTOR is not set
CONFIG_ARCH_SUPPORTS_LTO_CLANG=y
CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y
CONFIG_LTO_NONE=y
CONFIG_ARCH_SUPPORTS_CFI_CLANG=y
CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y
CONFIG_HAVE_CONTEXT_TRACKING_USER=y
CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MOVE_PUD=y
CONFIG_HAVE_MOVE_PMD=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y
CONFIG_HAVE_ARCH_HUGE_VMAP=y
CONFIG_HAVE_ARCH_HUGE_VMALLOC=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_HAVE_ARCH_SOFT_DIRTY=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS=28
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_HAVE_OBJTOOL=y
CONFIG_HAVE_JUMP_LABEL_HACK=y
CONFIG_HAVE_NOINSTR_HACK=y
CONFIG_HAVE_NOINSTR_VALIDATION=y
CONFIG_HAVE_UACCESS_VALIDATION=y
CONFIG_HAVE_STACK_VALIDATION=y
CONFIG_HAVE_RELIABLE_STACKTRACE=y
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_HAVE_ARCH_VMAP_STACK=y
# CONFIG_VMAP_STACK is not set
CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y
CONFIG_RANDOMIZE_KSTACK_OFFSET=y
# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
CONFIG_ARCH_HAS_MEM_ENCRYPT=y
CONFIG_HAVE_STATIC_CALL=y
CONFIG_HAVE_STATIC_CALL_INLINE=y
CONFIG_HAVE_PREEMPT_DYNAMIC=y
CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
CONFIG_ARCH_HAS_ELFCORE_COMPAT=y
CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y
CONFIG_DYNAMIC_SIGFRAME=y
CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y
#
# GCOV-based kernel profiling
#
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# end of GCOV-based kernel profiling
CONFIG_HAVE_GCC_PLUGINS=y
# CONFIG_GCC_PLUGINS is not set
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
# CONFIG_MODULES is not set
CONFIG_BLOCK=y
# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_DEV_ZONED is not set
# CONFIG_BLK_WBT is not set
# CONFIG_BLK_SED_OPAL is not set
# CONFIG_BLK_INLINE_ENCRYPTION is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
# end of Partition Types
#
# IO Schedulers
#
# CONFIG_MQ_IOSCHED_DEADLINE is not set
# CONFIG_MQ_IOSCHED_KYBER is not set
# CONFIG_IOSCHED_BFQ is not set
# end of IO Schedulers
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_INLINE_READ_UNLOCK=y
CONFIG_INLINE_READ_UNLOCK_IRQ=y
CONFIG_INLINE_WRITE_UNLOCK=y
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y
CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
#
# Executable file formats
#
# CONFIG_BINFMT_ELF is not set
# CONFIG_BINFMT_SCRIPT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
# end of Executable file formats
#
# Memory Management options
#
# CONFIG_SWAP is not set
#
# SLAB allocator options
#
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLAB_MERGE_DEFAULT is not set
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SLAB_FREELIST_HARDENED is not set
# CONFIG_SLUB_STATS is not set
# end of SLAB allocator options
# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
# CONFIG_SPARSEMEM_VMEMMAP is not set
CONFIG_HAVE_FAST_GUP=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
# CONFIG_COMPACTION is not set
# CONFIG_PAGE_REPORTING is not set
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ARCH_WANTS_THP_SWAP=y
# CONFIG_TRANSPARENT_HUGEPAGE is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
# CONFIG_CMA is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y
CONFIG_ARCH_HAS_PTE_DEVMAP=y
CONFIG_ZONE_DMA=y
CONFIG_ZONE_DMA32=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_PERCPU_STATS is not set
#
# GUP_TEST needs to have DEBUG_FS enabled
#
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_SECRETMEM=y
# CONFIG_ANON_VMA_NAME is not set
# CONFIG_USERFAULTFD is not set
# CONFIG_LRU_GEN is not set
#
# Data Access Monitoring
#
# CONFIG_DAMON is not set
# end of Data Access Monitoring
# end of Memory Management options
# CONFIG_NET is not set
#
# Device Drivers
#
CONFIG_HAVE_EISA=y
# CONFIG_EISA is not set
CONFIG_HAVE_PCI=y
# CONFIG_PCI is not set
# CONFIG_PCCARD is not set
#
# Generic Driver Options
#
# CONFIG_UEVENT_HELPER is not set
# CONFIG_DEVTMPFS is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
#
# Firmware loader
#
CONFIG_FW_LOADER=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER is not set
# CONFIG_FW_LOADER_COMPRESS is not set
# CONFIG_FW_UPLOAD is not set
# end of Firmware loader
CONFIG_ALLOW_DEV_COREDUMP=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
# end of Generic Driver Options
#
# Bus devices
#
# CONFIG_ARM_INTEGRATOR_LM is not set
# CONFIG_BT1_APB is not set
# CONFIG_BT1_AXI is not set
# CONFIG_HISILICON_LPC is not set
# CONFIG_INTEL_IXP4XX_EB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_MHI_BUS is not set
# CONFIG_MHI_BUS_EP is not set
# end of Bus devices
#
# Firmware Drivers
#
#
# ARM System Control and Management Interface Protocol
#
# CONFIG_ARM_SCMI_PROTOCOL is not set
# end of ARM System Control and Management Interface Protocol
# CONFIG_EDD is not set
CONFIG_FIRMWARE_MEMMAP=y
# CONFIG_DMIID is not set
# CONFIG_DMI_SYSFS is not set
CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y
# CONFIG_FW_CFG_SYSFS is not set
# CONFIG_SYSFB_SIMPLEFB is not set
# CONFIG_BCM47XX_NVRAM is not set
# CONFIG_GOOGLE_FIRMWARE is not set
#
# Tegra firmware driver
#
# end of Tegra firmware driver
# end of Firmware Drivers
# CONFIG_GNSS is not set
# CONFIG_MTD is not set
# CONFIG_OF is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
# CONFIG_BLK_DEV is not set
#
# NVME Support
#
# CONFIG_NVME_FC is not set
# end of NVME Support
#
# Misc devices
#
# CONFIG_DUMMY_IRQ is not set
# CONFIG_ATMEL_SSC is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_QCOM_COINCELL is not set
# CONFIG_SRAM is not set
# CONFIG_XILINX_SDFEC is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_93CX6 is not set
# end of EEPROM support
#
# Texas Instruments shared transport line discipline
#
# end of Texas Instruments shared transport line discipline
#
# Altera FPGA firmware download module (requires I2C)
#
# CONFIG_ECHO is not set
# CONFIG_PVPANIC is not set
# end of Misc devices
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# end of SCSI device support
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# end of IEEE 1394 (FireWire) support
# CONFIG_MACINTOSH_DRIVERS is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_RMI4_CORE is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
# CONFIG_GAMEPORT is not set
# end of Hardware I/O ports
# end of Input device support
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_LDISC_AUTOLOAD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_MESON is not set
# CONFIG_SERIAL_CLPS711X is not set
# CONFIG_SERIAL_SAMSUNG is not set
# CONFIG_SERIAL_TEGRA is not set
# CONFIG_SERIAL_IMX is not set
# CONFIG_SERIAL_UARTLITE is not set
# CONFIG_SERIAL_SH_SCI is not set
# CONFIG_SERIAL_MSM is not set
# CONFIG_SERIAL_VT8500 is not set
# CONFIG_SERIAL_OMAP is not set
# CONFIG_SERIAL_LANTIQ is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_TIMBERDALE is not set
# CONFIG_SERIAL_BCM63XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_MXS_AUART is not set
# CONFIG_SERIAL_MPS2_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_SERIAL_FSL_LINFLEXUART is not set
# CONFIG_SERIAL_ST_ASC is not set
# CONFIG_SERIAL_STM32 is not set
# CONFIG_SERIAL_OWL is not set
# CONFIG_SERIAL_RDA is not set
# CONFIG_SERIAL_LITEUART is not set
# CONFIG_SERIAL_SUNPLUS is not set
# end of Serial drivers
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NULL_TTY is not set
# CONFIG_SERIAL_DEV_BUS is not set
# CONFIG_VIRTIO_CONSOLE is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_ASPEED_KCS_IPMI_BMC is not set
# CONFIG_NPCM7XX_KCS_IPMI_BMC is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_MWAVE is not set
# CONFIG_DEVMEM is not set
# CONFIG_NVRAM is not set
# CONFIG_HANGCHECK_TIMER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
# CONFIG_RANDOM_TRUST_CPU is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
#
# I2C support
#
# CONFIG_I2C is not set
# end of I2C support
# CONFIG_I3C is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
# CONFIG_PPS is not set
#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
# end of PTP clock support
# CONFIG_PINCTRL is not set
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SUN4I_GPADC is not set
# CONFIG_MFD_AT91_USART is not set
# CONFIG_MFD_MADERA is not set
# CONFIG_MFD_EXYNOS_LPASS is not set
# CONFIG_MFD_MXS_LRADC is not set
# CONFIG_MFD_MX25_TSADC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_PM8XXX is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_SUN6I_PRCM is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_TQMX86 is not set
# CONFIG_MFD_STM32_LPTIMER is not set
# CONFIG_MFD_STM32_TIMERS is not set
# end of Multifunction device drivers
# CONFIG_REGULATOR is not set
# CONFIG_RC_CORE is not set
#
# CEC support
#
# CONFIG_MEDIA_CEC_SUPPORT is not set
# end of CEC support
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
#
# CONFIG_IMX_IPUV3_CORE is not set
# CONFIG_DRM is not set
#
# ARM devices
#
# end of ARM devices
#
# Frame buffer Devices
#
# CONFIG_FB is not set
# CONFIG_MMP_DISP is not set
# end of Frame buffer Devices
#
# Backlight & LCD device support
#
# CONFIG_LCD_CLASS_DEVICE is not set
# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
# end of Backlight & LCD device support
#
# Console display driver support
#
CONFIG_VGA_CONSOLE=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
# end of Console display driver support
# end of Graphics support
# CONFIG_SOUND is not set
#
# HID support
#
# CONFIG_HID is not set
# end of HID support
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_RTC_LIB=y
CONFIG_RTC_MC146818_LIB=y
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
#
# DMABUF options
#
# CONFIG_SYNC_FILE is not set
# CONFIG_DMABUF_HEAPS is not set
# end of DMABUF options
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VFIO is not set
# CONFIG_VIRT_DRIVERS is not set
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VHOST_MENU is not set
#
# Microsoft Hyper-V guest support
#
# end of Microsoft Hyper-V guest support
# CONFIG_GREYBUS is not set
# CONFIG_COMEDI is not set
# CONFIG_STAGING is not set
# CONFIG_CHROME_PLATFORMS is not set
# CONFIG_MELLANOX_PLATFORM is not set
# CONFIG_OLPC_XO175 is not set
# CONFIG_SURFACE_PLATFORMS is not set
# CONFIG_X86_PLATFORM_DEVICES is not set
# CONFIG_COMMON_CLK is not set
# CONFIG_HWSPINLOCK is not set
#
# Clock Source drivers
#
CONFIG_CLKEVT_I8253=y
CONFIG_I8253_LOCK=y
CONFIG_CLKBLD_I8253=y
# CONFIG_BCM2835_TIMER is not set
# CONFIG_BCM_KONA_TIMER is not set
# CONFIG_DAVINCI_TIMER is not set
# CONFIG_DIGICOLOR_TIMER is not set
# CONFIG_OMAP_DM_TIMER is not set
# CONFIG_DW_APB_TIMER is not set
# CONFIG_FTTMR010_TIMER is not set
# CONFIG_IXP4XX_TIMER is not set
# CONFIG_MESON6_TIMER is not set
# CONFIG_OWL_TIMER is not set
# CONFIG_RDA_TIMER is not set
# CONFIG_SUN4I_TIMER is not set
# CONFIG_TEGRA_TIMER is not set
# CONFIG_VT8500_TIMER is not set
# CONFIG_NPCM7XX_TIMER is not set
# CONFIG_ASM9260_TIMER is not set
# CONFIG_CLKSRC_DBX500_PRCMU is not set
# CONFIG_CLPS711X_TIMER is not set
# CONFIG_MXS_TIMER is not set
# CONFIG_NSPIRE_TIMER is not set
# CONFIG_INTEGRATOR_AP_TIMER is not set
# CONFIG_CLKSRC_PISTACHIO is not set
# CONFIG_CLKSRC_STM32_LP is not set
# CONFIG_ARMV7M_SYSTICK is not set
# CONFIG_ATMEL_PIT is not set
# CONFIG_ATMEL_ST is not set
# CONFIG_CLKSRC_SAMSUNG_PWM is not set
# CONFIG_FSL_FTM_TIMER is not set
# CONFIG_OXNAS_RPS_TIMER is not set
# CONFIG_MTK_TIMER is not set
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
# CONFIG_RENESAS_OSTM is not set
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_EM_TIMER_STI is not set
# CONFIG_CLKSRC_PXA is not set
# CONFIG_TIMER_IMX_SYS_CTR is not set
# CONFIG_CLKSRC_ST_LPC is not set
# CONFIG_GXP_TIMER is not set
# CONFIG_MSC313E_TIMER is not set
# CONFIG_MICROCHIP_PIT64B is not set
# end of Clock Source drivers
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
# CONFIG_REMOTEPROC is not set
# end of Remoteproc drivers
#
# Rpmsg drivers
#
# CONFIG_RPMSG_VIRTIO is not set
# end of Rpmsg drivers
#
# SOC (System On Chip) specific Drivers
#
#
# Amlogic SoC drivers
#
# CONFIG_MESON_CANVAS is not set
# CONFIG_MESON_CLK_MEASURE is not set
# CONFIG_MESON_GX_SOCINFO is not set
# CONFIG_MESON_MX_SOCINFO is not set
# end of Amlogic SoC drivers
#
# Apple SoC drivers
#
# CONFIG_APPLE_SART is not set
# end of Apple SoC drivers
#
# ASPEED SoC drivers
#
# CONFIG_ASPEED_LPC_CTRL is not set
# CONFIG_ASPEED_LPC_SNOOP is not set
# CONFIG_ASPEED_UART_ROUTING is not set
# CONFIG_ASPEED_P2A_CTRL is not set
# CONFIG_ASPEED_SOCINFO is not set
# end of ASPEED SoC drivers
# CONFIG_AT91_SOC_ID is not set
# CONFIG_AT91_SOC_SFR is not set
#
# Broadcom SoC drivers
#
# CONFIG_SOC_BCM63XX is not set
# CONFIG_SOC_BRCMSTB is not set
# end of Broadcom SoC drivers
#
# NXP/Freescale QorIQ SoC drivers
#
# end of NXP/Freescale QorIQ SoC drivers
#
# fujitsu SoC drivers
#
# end of fujitsu SoC drivers
#
# i.MX SoC drivers
#
# CONFIG_SOC_IMX8M is not set
# CONFIG_SOC_IMX9 is not set
# end of i.MX SoC drivers
#
# IXP4xx SoC drivers
#
# CONFIG_IXP4XX_QMGR is not set
# CONFIG_IXP4XX_NPE is not set
# end of IXP4xx SoC drivers
#
# Enable LiteX SoC Builder specific drivers
#
# CONFIG_LITEX_SOC_CONTROLLER is not set
# end of Enable LiteX SoC Builder specific drivers
#
# MediaTek SoC drivers
#
# CONFIG_MTK_CMDQ is not set
# CONFIG_MTK_DEVAPC is not set
# CONFIG_MTK_INFRACFG is not set
# CONFIG_MTK_MMSYS is not set
# end of MediaTek SoC drivers
#
# Qualcomm SoC drivers
#
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GSBI is not set
# CONFIG_QCOM_LLCC is not set
# CONFIG_QCOM_RPMH is not set
# CONFIG_QCOM_SPM is not set
# CONFIG_QCOM_ICC_BWMON is not set
# end of Qualcomm SoC drivers
# CONFIG_SOC_RENESAS is not set
# CONFIG_ROCKCHIP_GRF is not set
# CONFIG_SOC_SAMSUNG is not set
# CONFIG_SOC_TI is not set
# CONFIG_UX500_SOC_ID is not set
#
# Xilinx SoC drivers
#
# end of Xilinx SoC drivers
# end of SOC (System On Chip) specific Drivers
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_PWM is not set
#
# IRQ chip support
#
# CONFIG_AL_FIC is not set
# CONFIG_RENESAS_INTC_IRQPIN is not set
# CONFIG_RENESAS_IRQC is not set
# CONFIG_RENESAS_RZA1_IRQC is not set
# CONFIG_RENESAS_RZG2L_IRQC is not set
# CONFIG_SL28CPLD_INTC is not set
# CONFIG_TS4800_IRQ is not set
# CONFIG_INGENIC_TCU_IRQ is not set
# CONFIG_IRQ_UNIPHIER_AIDET is not set
# CONFIG_MESON_IRQ_GPIO is not set
# CONFIG_IMX_IRQSTEER is not set
# CONFIG_IMX_INTMUX is not set
# CONFIG_EXYNOS_IRQ_COMBINER is not set
# CONFIG_MST_IRQ is not set
# CONFIG_MCHP_EIC is not set
# CONFIG_SUNPLUS_SP7021_INTC is not set
# end of IRQ chip support
# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set
#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_PHY_PISTACHIO_USB is not set
# CONFIG_PHY_CAN_TRANSCEIVER is not set
#
# PHY drivers for Broadcom platforms
#
# CONFIG_PHY_BCM63XX_USBH is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# end of PHY drivers for Broadcom platforms
# CONFIG_PHY_HI6220_USB is not set
# CONFIG_PHY_HI3660_USB is not set
# CONFIG_PHY_HI3670_USB is not set
# CONFIG_PHY_HI3670_PCIE is not set
# CONFIG_PHY_HISTB_COMBPHY is not set
# CONFIG_PHY_HISI_INNO_USB2 is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_PHY_PXA_USB is not set
# CONFIG_PHY_MMP3_USB is not set
# CONFIG_PHY_MMP3_HSIC is not set
# CONFIG_PHY_MT7621_PCI is not set
# CONFIG_PHY_RALINK_USB is not set
# CONFIG_PHY_RCAR_GEN3_USB3 is not set
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set
# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
# CONFIG_PHY_SAMSUNG_USB2 is not set
# CONFIG_PHY_ST_SPEAR1310_MIPHY is not set
# CONFIG_PHY_ST_SPEAR1340_MIPHY is not set
# CONFIG_PHY_TEGRA194_P2U is not set
# CONFIG_PHY_DA8XX_USB is not set
# CONFIG_OMAP_CONTROL_PHY is not set
# CONFIG_TI_PIPE3 is not set
# CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set
# CONFIG_PHY_INTEL_KEEMBAY_USB is not set
# CONFIG_PHY_INTEL_LGM_EMMC is not set
# CONFIG_PHY_XILINX_ZYNQMP is not set
# end of PHY Subsystem
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# Performance monitor support
#
# CONFIG_ARM_CCN is not set
# CONFIG_ARM_CMN is not set
# CONFIG_FSL_IMX8_DDR_PMU is not set
# CONFIG_XGENE_PMU is not set
# CONFIG_ARM_DMC620_PMU is not set
# CONFIG_MARVELL_CN10K_TAD_PMU is not set
# CONFIG_ALIBABA_UNCORE_DRW_PMU is not set
# CONFIG_MARVELL_CN10K_DDR_PMU is not set
# end of Performance monitor support
# CONFIG_RAS is not set
#
# Android
#
# CONFIG_ANDROID_BINDER_IPC is not set
# end of Android
# CONFIG_DAX is not set
# CONFIG_NVMEM is not set
#
# HW tracing support
#
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
# end of HW tracing support
# CONFIG_FPGA is not set
# CONFIG_TEE is not set
# CONFIG_SIOX is not set
# CONFIG_SLIMBUS is not set
# CONFIG_INTERCONNECT is not set
# CONFIG_COUNTER is not set
# CONFIG_PECI is not set
# CONFIG_HTE is not set
# end of Device Drivers
#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
# CONFIG_VALIDATE_FS_PARSER is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
# CONFIG_FS_VERITY is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
# end of Caches
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
# end of CD-ROM/DVD Filesystems
#
# DOS/FAT/EXFAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EXFAT_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS3_FS is not set
# end of DOS/FAT/EXFAT/NT Filesystems
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_PROC_PID_ARCH_STATUS=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
# CONFIG_CONFIGFS_FS is not set
# end of Pseudo filesystems
# CONFIG_MISC_FILESYSTEMS is not set
# CONFIG_NLS is not set
# CONFIG_UNICODE is not set
CONFIG_IO_WQ=y
# end of File systems
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_HARDENED_USERCOPY is not set
# CONFIG_FORTIFY_SOURCE is not set
# CONFIG_STATIC_USERMODEHELPER is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf"
#
# Kernel hardening options
#
#
# Memory initialization
#
CONFIG_INIT_STACK_NONE=y
# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y
# CONFIG_ZERO_CALL_USED_REGS is not set
# end of Memory initialization
CONFIG_RANDSTRUCT_NONE=y
# end of Kernel hardening options
# end of Security options
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_PACKING is not set
CONFIG_BITREVERSE=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_CORDIC is not set
# CONFIG_PRIME_NUMBERS is not set
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
CONFIG_ARCH_USE_SYM_ANNOTATIONS=y
#
# Crypto library routines
#
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
# CONFIG_CRYPTO_LIB_CHACHA is not set
# CONFIG_CRYPTO_LIB_CURVE25519 is not set
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
# CONFIG_CRYPTO_LIB_POLY1305 is not set
# end of Crypto library routines
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC64_ROCKSOFT is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC64 is not set
# CONFIG_CRC4 is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
# CONFIG_RANDOM32_SELFTEST is not set
# CONFIG_XZ_DEC is not set
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_SWIOTLB=y
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_IRQ_POLL is not set
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_VDSO_TIME_NS=y
CONFIG_ARCH_HAS_PMEM_API=y
CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y
CONFIG_ARCH_HAS_COPY_MC=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_SBITMAP=y
# CONFIG_PARMAN is not set
# CONFIG_OBJAGG is not set
# end of Library routines
#
# Kernel hacking
#
#
# printk and dmesg options
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_PRINTK_CALLER is not set
# CONFIG_STACKTRACE_BUILD_ID is not set
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
CONFIG_CONSOLE_LOGLEVEL_QUIET=4
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_DYNAMIC_DEBUG_CORE is not set
# CONFIG_SYMBOLIC_ERRNAME is not set
CONFIG_DEBUG_BUGVERBOSE=y
# end of printk and dmesg options
# CONFIG_DEBUG_KERNEL is not set
#
# Compile-time checks and compiler options
#
CONFIG_AS_HAS_NON_CONST_LEB128=y
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_HEADERS_INSTALL is not set
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_OBJTOOL=y
# end of Compile-time checks and compiler options
#
# Generic Kernel Debugging Instruments
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_FS is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
# CONFIG_UBSAN is not set
CONFIG_HAVE_ARCH_KCSAN=y
CONFIG_HAVE_KCSAN_COMPILER=y
# end of Generic Kernel Debugging Instruments
#
# Networking Debugging
#
# end of Networking Debugging
#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_PAGE_TABLE_CHECK is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_RODATA_TEST is not set
CONFIG_ARCH_HAS_DEBUG_WX=y
# CONFIG_DEBUG_WX is not set
CONFIG_GENERIC_PTDUMP=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y
# CONFIG_DEBUG_VM_PGTABLE is not set
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y
CONFIG_HAVE_ARCH_KASAN=y
CONFIG_HAVE_ARCH_KASAN_VMALLOC=y
CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y
# CONFIG_KASAN is not set
CONFIG_HAVE_ARCH_KFENCE=y
# CONFIG_KFENCE is not set
CONFIG_HAVE_ARCH_KMSAN=y
# end of Memory Debugging
#
# Debug Oops, Lockups and Hangs
#
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y
# end of Debug Oops, Lockups and Hangs
#
# Scheduler Debugging
#
# end of Scheduler Debugging
# CONFIG_DEBUG_TIMEKEEPING is not set
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_WW_MUTEX_SELFTEST is not set
# end of Lock Debugging (spinlocks, mutexes, etc...)
# CONFIG_DEBUG_IRQFLAGS is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
#
# Debug kernel data structures
#
# CONFIG_BUG_ON_DATA_CORRUPTION is not set
# end of Debug kernel data structures
#
# RCU Debugging
#
# end of RCU Debugging
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_HAVE_RETHOOK=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_FENTRY=y
CONFIG_HAVE_OBJTOOL_MCOUNT=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y
CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y
CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
#
# x86 Debugging
#
# CONFIG_X86_VERBOSE_BOOTUP is not set
CONFIG_EARLY_PRINTK=y
CONFIG_HAVE_MMIOTRACE_SUPPORT=y
CONFIG_IO_DELAY_0X80=y
# CONFIG_IO_DELAY_0XED is not set
# CONFIG_IO_DELAY_UDELAY is not set
# CONFIG_IO_DELAY_NONE is not set
CONFIG_UNWINDER_ORC=y
# CONFIG_UNWINDER_FRAME_POINTER is not set
# end of x86 Debugging
#
# Kernel Testing and Coverage
#
# CONFIG_KUNIT is not set
CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_ARCH_USE_MEMTEST=y
# CONFIG_MEMTEST is not set
# end of Kernel Testing and Coverage
#
# Rust hacking
#
# end of Rust hacking
CONFIG_WARN_MISSING_DOCUMENTS=y
CONFIG_WARN_ABI_ERRORS=y
# end of Kernel hacking
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
2022-12-28 1:47 ` [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro Javier Martinez Canillas
2022-12-29 15:36 ` kernel test robot
@ 2023-01-02 18:39 ` Sam Ravnborg
2023-01-02 18:59 ` Javier Martinez Canillas
1 sibling, 1 reply; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:39 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, Thomas Zimmermann, dri-devel
Hi Javier.
On Wed, Dec 28, 2022 at 02:47:44AM +0100, Javier Martinez Canillas wrote:
> Many panel drivers define dsi_dcs_write_seq() and dsi_generic_write_seq()
> macros to send DCS commands and generic write packets respectively, with
> the payload specified as a list of parameters instead of using arrays.
>
> There's already a macro for the former, introduced by commit 2a9e9daf75231
> ("drm/mipi-dsi: Introduce mipi_dsi_dcs_write_seq macro") so drivers can be
> changed to use that. But there isn't one yet for the latter, let's add it.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> include/drm/drm_mipi_dsi.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
> index 20b21b577dea..c7c458131ba1 100644
> --- a/include/drm/drm_mipi_dsi.h
> +++ b/include/drm/drm_mipi_dsi.h
> @@ -297,6 +297,22 @@ int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
> int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
> u16 *brightness);
>
> +/**
> + * mipi_dsi_generic_write - transmit data using a generic write packet
s/mipi_dsi_generic_write/mipi_dsi_generic_write_seq
(As the bot also reported)
with this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> + * @dsi: DSI peripheral device
> + * @seq: buffer containing the payload
> + */
> +#define mipi_dsi_generic_write_seq(dsi, seq...) do { \
> + static const u8 d[] = { seq }; \
> + struct device *dev = &dsi->dev; \
> + int ret; \
> + ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> + if (ret < 0) { \
> + dev_err_ratelimited(dev, "transmit data failed: %d\n", ret); \
> + return ret; \
> + } \
> + } while (0)
> +
(If you align '\' under each other it would be nicer, but I could see
that mipi_dsi_dcs_write_seq() do not do so).
> /**
> * mipi_dsi_dcs_write_seq - transmit a DCS command with payload
> * @dsi: DSI peripheral device
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
2023-01-02 18:39 ` Sam Ravnborg
@ 2023-01-02 18:59 ` Javier Martinez Canillas
2023-01-02 19:02 ` Sam Ravnborg
0 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2023-01-02 18:59 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: linux-kernel, Thomas Zimmermann, dri-devel
Hello Sam,
Thanks a lot for your feedback.
On 1/2/23 19:39, Sam Ravnborg wrote:
> Hi Javier.
>
> On Wed, Dec 28, 2022 at 02:47:44AM +0100, Javier Martinez Canillas wrote:
>> Many panel drivers define dsi_dcs_write_seq() and dsi_generic_write_seq()
>> macros to send DCS commands and generic write packets respectively, with
>> the payload specified as a list of parameters instead of using arrays.
>>
>> There's already a macro for the former, introduced by commit 2a9e9daf75231
>> ("drm/mipi-dsi: Introduce mipi_dsi_dcs_write_seq macro") so drivers can be
>> changed to use that. But there isn't one yet for the latter, let's add it.
>>
>> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
>> ---
>>
>> include/drm/drm_mipi_dsi.h | 16 ++++++++++++++++
>> 1 file changed, 16 insertions(+)
>>
>> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
>> index 20b21b577dea..c7c458131ba1 100644
>> --- a/include/drm/drm_mipi_dsi.h
>> +++ b/include/drm/drm_mipi_dsi.h
>> @@ -297,6 +297,22 @@ int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
>> int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
>> u16 *brightness);
>>
>> +/**
>> + * mipi_dsi_generic_write - transmit data using a generic write packet
> s/mipi_dsi_generic_write/mipi_dsi_generic_write_seq
> (As the bot also reported)
>
Ups, sorry for missing that.
> with this fixed:
> Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
>
Thanks!
>> + * @dsi: DSI peripheral device
>> + * @seq: buffer containing the payload
>> + */
>> +#define mipi_dsi_generic_write_seq(dsi, seq...) do { \
>> + static const u8 d[] = { seq }; \
>> + struct device *dev = &dsi->dev; \
>> + int ret; \
>> + ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
>> + if (ret < 0) { \
>> + dev_err_ratelimited(dev, "transmit data failed: %d\n", ret); \
>> + return ret; \
>> + } \
>> + } while (0)
>> +
> (If you align '\' under each other it would be nicer, but I could see
> that mipi_dsi_dcs_write_seq() do not do so).
Yeah, I was actually thinking about doing like you suggested for this macro
but preferred to keep it consistent with the existing mipi_dsi_dcs_write_seq()
macro definition...
Maybe I can add a preparatory patch that just fixes the backslash characters
indent for mipi_dsi_dcs_write_seq() to be all aligned?
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
2023-01-02 18:59 ` Javier Martinez Canillas
@ 2023-01-02 19:02 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 19:02 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, Thomas Zimmermann, dri-devel
Hi Javier,
> > (If you align '\' under each other it would be nicer, but I could see
> > that mipi_dsi_dcs_write_seq() do not do so).
>
> Yeah, I was actually thinking about doing like you suggested for this macro
> but preferred to keep it consistent with the existing mipi_dsi_dcs_write_seq()
> macro definition...
>
> Maybe I can add a preparatory patch that just fixes the backslash characters
> indent for mipi_dsi_dcs_write_seq() to be all aligned?
Yep, that would be nice.
Sam
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 02/14] drm/panel-asus-z00t-tm5p5-n35596: Drop custom DSI write macros
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
2022-12-28 1:47 ` [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2022-12-28 1:47 ` [PATCH 03/14] drm/panel-sitronix-st7703: " Javier Martinez Canillas
` (12 subsequent siblings)
14 siblings, 0 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macros defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../drm/panel/panel-asus-z00t-tm5p5-n35596.c | 96 ++++++++-----------
1 file changed, 40 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
index b3235781e6ba..075a7af81eff 100644
--- a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
+++ b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
@@ -24,22 +24,6 @@ static inline struct tm5p5_nt35596 *to_tm5p5_nt35596(struct drm_panel *panel)
return container_of(panel, struct tm5p5_nt35596, panel);
}
-#define dsi_generic_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void tm5p5_nt35596_reset(struct tm5p5_nt35596 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
@@ -54,46 +38,46 @@ static int tm5p5_nt35596_on(struct tm5p5_nt35596 *ctx)
{
struct mipi_dsi_device *dsi = ctx->dsi;
- dsi_generic_write_seq(dsi, 0xff, 0x05);
- dsi_generic_write_seq(dsi, 0xfb, 0x01);
- dsi_generic_write_seq(dsi, 0xc5, 0x31);
- dsi_generic_write_seq(dsi, 0xff, 0x04);
- dsi_generic_write_seq(dsi, 0x01, 0x84);
- dsi_generic_write_seq(dsi, 0x05, 0x25);
- dsi_generic_write_seq(dsi, 0x06, 0x01);
- dsi_generic_write_seq(dsi, 0x07, 0x20);
- dsi_generic_write_seq(dsi, 0x08, 0x06);
- dsi_generic_write_seq(dsi, 0x09, 0x08);
- dsi_generic_write_seq(dsi, 0x0a, 0x10);
- dsi_generic_write_seq(dsi, 0x0b, 0x10);
- dsi_generic_write_seq(dsi, 0x0c, 0x10);
- dsi_generic_write_seq(dsi, 0x0d, 0x14);
- dsi_generic_write_seq(dsi, 0x0e, 0x14);
- dsi_generic_write_seq(dsi, 0x0f, 0x14);
- dsi_generic_write_seq(dsi, 0x10, 0x14);
- dsi_generic_write_seq(dsi, 0x11, 0x14);
- dsi_generic_write_seq(dsi, 0x12, 0x14);
- dsi_generic_write_seq(dsi, 0x17, 0xf3);
- dsi_generic_write_seq(dsi, 0x18, 0xc0);
- dsi_generic_write_seq(dsi, 0x19, 0xc0);
- dsi_generic_write_seq(dsi, 0x1a, 0xc0);
- dsi_generic_write_seq(dsi, 0x1b, 0xb3);
- dsi_generic_write_seq(dsi, 0x1c, 0xb3);
- dsi_generic_write_seq(dsi, 0x1d, 0xb3);
- dsi_generic_write_seq(dsi, 0x1e, 0xb3);
- dsi_generic_write_seq(dsi, 0x1f, 0xb3);
- dsi_generic_write_seq(dsi, 0x20, 0xb3);
- dsi_generic_write_seq(dsi, 0xfb, 0x01);
- dsi_generic_write_seq(dsi, 0xff, 0x00);
- dsi_generic_write_seq(dsi, 0xfb, 0x01);
- dsi_generic_write_seq(dsi, 0x35, 0x01);
- dsi_generic_write_seq(dsi, 0xd3, 0x06);
- dsi_generic_write_seq(dsi, 0xd4, 0x04);
- dsi_generic_write_seq(dsi, 0x5e, 0x0d);
- dsi_generic_write_seq(dsi, 0x11, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xff, 0x05);
+ mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xff, 0x04);
+ mipi_dsi_generic_write_seq(dsi, 0x01, 0x84);
+ mipi_dsi_generic_write_seq(dsi, 0x05, 0x25);
+ mipi_dsi_generic_write_seq(dsi, 0x06, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0x07, 0x20);
+ mipi_dsi_generic_write_seq(dsi, 0x08, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0x09, 0x08);
+ mipi_dsi_generic_write_seq(dsi, 0x0a, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0x0b, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0x0c, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0x0d, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x0e, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x0f, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x10, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x11, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x12, 0x14);
+ mipi_dsi_generic_write_seq(dsi, 0x17, 0xf3);
+ mipi_dsi_generic_write_seq(dsi, 0x18, 0xc0);
+ mipi_dsi_generic_write_seq(dsi, 0x19, 0xc0);
+ mipi_dsi_generic_write_seq(dsi, 0x1a, 0xc0);
+ mipi_dsi_generic_write_seq(dsi, 0x1b, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0x1c, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0x1d, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0x1e, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0x1f, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0x20, 0xb3);
+ mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xff, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xfb, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0x35, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xd3, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xd4, 0x04);
+ mipi_dsi_generic_write_seq(dsi, 0x5e, 0x0d);
+ mipi_dsi_generic_write_seq(dsi, 0x11, 0x00);
msleep(100);
- dsi_generic_write_seq(dsi, 0x29, 0x00);
- dsi_generic_write_seq(dsi, 0x53, 0x24);
+ mipi_dsi_generic_write_seq(dsi, 0x29, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0x53, 0x24);
return 0;
}
@@ -117,7 +101,7 @@ static int tm5p5_nt35596_off(struct tm5p5_nt35596 *ctx)
return ret;
}
- dsi_dcs_write_seq(dsi, 0x4f, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, 0x4f, 0x01);
return 0;
}
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH 03/14] drm/panel-sitronix-st7703: Drop custom DSI write macros
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
2022-12-28 1:47 ` [PATCH 01/14] drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro Javier Martinez Canillas
2022-12-28 1:47 ` [PATCH 02/14] drm/panel-asus-z00t-tm5p5-n35596: Drop custom DSI write macros Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2022-12-28 12:01 ` Guido Günther
2023-01-02 18:42 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 04/14] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro Javier Martinez Canillas
` (11 subsequent siblings)
14 siblings, 2 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Guido Günther, Ondrej Jirman, Purism Kernel Team,
Sam Ravnborg, Thierry Reding, dri-devel
There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macros defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 83 ++++++++-----------
1 file changed, 33 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 86a472b01360..3e6655c2727e 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -73,14 +73,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
return container_of(panel, struct st7703, panel);
}
-#define dsi_generic_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static int jh057n_init_sequence(struct st7703 *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -90,27 +82,27 @@ static int jh057n_init_sequence(struct st7703 *ctx)
* resemble the ST7703 but the number of parameters often don't match
* so it's likely a clone.
*/
- dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
0xF1, 0x12, 0x83);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00,
0x00, 0x00);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
0x00);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
msleep(20);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
- dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
@@ -119,7 +111,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
@@ -128,7 +120,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A,
0xA5, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37,
0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11,
0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
@@ -162,15 +154,6 @@ static const struct st7703_panel_desc jh057n00900_panel_desc = {
.init_sequence = jh057n_init_sequence,
};
-#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
-
static int xbd599_init_sequence(struct st7703 *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -180,9 +163,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
*/
/* Magic sequence to unlock user commands below. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */
0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */
0x05, /* IHSRX = x6 (Low High Speed driving ability) */
@@ -194,14 +177,14 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
0x4F, 0x11, 0x00, 0x00, 0x37);
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */
0x22, /* DT = 15ms XDK_ECP = x2 */
0x20, /* PFM_DC_DIV = /1 */
0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */);
/* RGB I/F porch timing */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
0x10, /* VBP_RGB_GEN */
0x10, /* VFP_RGB_GEN */
0x05, /* DE_BP_RGB_GEN */
@@ -212,7 +195,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0x00, 0x00);
/* Source driving settings. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
0x73, /* N_POPON */
0x73, /* N_NOPON */
0x50, /* I_POPON */
@@ -224,19 +207,19 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0x00 /* Undocumented */);
/* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
/*
* SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan)
* REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR)
*/
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
/* Zig-Zag Type C column inversion. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
/* Set display resolution. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
0xF0, /* NL = 240 */
0x12, /* RES_V_LSB = 0, BLK_CON = VSSD,
* RESO_SEL = 720RGB
@@ -246,7 +229,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
* ISC = 0 frames
*/);
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
0x00, /* PNOEQ */
0x00, /* NNOEQ */
0x0B, /* PEQGND */
@@ -267,9 +250,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
*/);
/* Undocumented command. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */
0x32, /* VRP */
@@ -287,20 +270,20 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */);
/* Reference voltage. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
0x07, /* VREF_SEL = 4.2V */
0x07 /* NVREF_SEL = 4.2V */);
msleep(20);
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
0x2C, /* VCOMDC_F = -0.67V */
0x2C /* VCOMDC_B = -0.67V */);
/* Undocumented command. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
/* This command is to set forward GIP timing. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12,
0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
@@ -311,7 +294,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
/* This command is to set backward GIP timing. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
@@ -322,7 +305,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
0xA5, 0x00, 0x00, 0x00, 0x00);
/* Adjust the gamma characteristics of the panel. */
- dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
+ mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35,
0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12,
0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41,
@@ -499,7 +482,7 @@ static int allpixelson_set(void *data, u64 val)
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
dev_dbg(ctx->dev, "Setting all pixels on\n");
- dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
+ mipi_dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
msleep(val * 1000);
/* Reset the panel to get video back */
drm_panel_disable(&ctx->panel);
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 03/14] drm/panel-sitronix-st7703: Drop custom DSI write macros
2022-12-28 1:47 ` [PATCH 03/14] drm/panel-sitronix-st7703: " Javier Martinez Canillas
@ 2022-12-28 12:01 ` Guido Günther
2022-12-29 14:30 ` Javier Martinez Canillas
2023-01-02 18:42 ` Sam Ravnborg
1 sibling, 1 reply; 36+ messages in thread
From: Guido Günther @ 2022-12-28 12:01 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: linux-kernel, Daniel Vetter, David Airlie, Ondrej Jirman,
Purism Kernel Team, Sam Ravnborg, Thierry Reding, dri-devel
Hi Javier,
Could you please also cc maintainers on the actual macro addition since
it's hard to review without seeing what the code gets changed to
(especially when there's multiple revisions). I assume
https://lore.kernel.org/dri-devel/20221228014757.3170486-2-javierm@redhat.com/
is the right one?
Cheers,
-- Guido
On Wed, Dec 28, 2022 at 02:47:46AM +0100, Javier Martinez Canillas wrote:
> There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macros defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 83 ++++++++-----------
> 1 file changed, 33 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 86a472b01360..3e6655c2727e 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -73,14 +73,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
> return container_of(panel, struct st7703, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int jh057n_init_sequence(struct st7703 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -90,27 +82,27 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> * resemble the ST7703 but the number of parameters often don't match
> * so it's likely a clone.
> */
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
> 0xF1, 0x12, 0x83);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
> 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00,
> 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
> 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
> 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
> 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
> 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
> msleep(20);
>
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
> - dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
> 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
> 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
> 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
> @@ -119,7 +111,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
> 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
> 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
> 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
> @@ -128,7 +120,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A,
> 0xA5, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
> 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37,
> 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11,
> 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
> @@ -162,15 +154,6 @@ static const struct st7703_panel_desc jh057n00900_panel_desc = {
> .init_sequence = jh057n_init_sequence,
> };
>
> -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> -
> static int xbd599_init_sequence(struct st7703 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -180,9 +163,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> */
>
> /* Magic sequence to unlock user commands below. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
> 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */
> 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */
> 0x05, /* IHSRX = x6 (Low High Speed driving ability) */
> @@ -194,14 +177,14 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
> 0x4F, 0x11, 0x00, 0x00, 0x37);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
> 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */
> 0x22, /* DT = 15ms XDK_ECP = x2 */
> 0x20, /* PFM_DC_DIV = /1 */
> 0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */);
>
> /* RGB I/F porch timing */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
> 0x10, /* VBP_RGB_GEN */
> 0x10, /* VFP_RGB_GEN */
> 0x05, /* DE_BP_RGB_GEN */
> @@ -212,7 +195,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00, 0x00);
>
> /* Source driving settings. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
> 0x73, /* N_POPON */
> 0x73, /* N_NOPON */
> 0x50, /* I_POPON */
> @@ -224,19 +207,19 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00 /* Undocumented */);
>
> /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
>
> /*
> * SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan)
> * REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR)
> */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
>
> /* Zig-Zag Type C column inversion. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
>
> /* Set display resolution. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
> 0xF0, /* NL = 240 */
> 0x12, /* RES_V_LSB = 0, BLK_CON = VSSD,
> * RESO_SEL = 720RGB
> @@ -246,7 +229,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> * ISC = 0 frames
> */);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
> 0x00, /* PNOEQ */
> 0x00, /* NNOEQ */
> 0x0B, /* PEQGND */
> @@ -267,9 +250,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> */);
>
> /* Undocumented command. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
> 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
> 0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */
> 0x32, /* VRP */
> @@ -287,20 +270,20 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */);
>
> /* Reference voltage. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
> 0x07, /* VREF_SEL = 4.2V */
> 0x07 /* NVREF_SEL = 4.2V */);
> msleep(20);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
> 0x2C, /* VCOMDC_F = -0.67V */
> 0x2C /* VCOMDC_B = -0.67V */);
>
> /* Undocumented command. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
>
> /* This command is to set forward GIP timing. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12,
> 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
> 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
> @@ -311,7 +294,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
>
> /* This command is to set backward GIP timing. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
> 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
> 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
> @@ -322,7 +305,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0xA5, 0x00, 0x00, 0x00, 0x00);
>
> /* Adjust the gamma characteristics of the panel. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
> 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35,
> 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12,
> 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41,
> @@ -499,7 +482,7 @@ static int allpixelson_set(void *data, u64 val)
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
>
> dev_dbg(ctx->dev, "Setting all pixels on\n");
> - dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
> msleep(val * 1000);
> /* Reset the panel to get video back */
> drm_panel_disable(&ctx->panel);
> --
> 2.38.1
>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 03/14] drm/panel-sitronix-st7703: Drop custom DSI write macros
2022-12-28 12:01 ` Guido Günther
@ 2022-12-29 14:30 ` Javier Martinez Canillas
0 siblings, 0 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-29 14:30 UTC (permalink / raw)
To: Guido Günther
Cc: linux-kernel, Daniel Vetter, David Airlie, Ondrej Jirman,
Purism Kernel Team, Sam Ravnborg, Thierry Reding, dri-devel
Hello Guido,
On 12/28/22 13:01, Guido Günther wrote:
> Hi Javier,
> Could you please also cc maintainers on the actual macro addition since
> it's hard to review without seeing what the code gets changed to
> (especially when there's multiple revisions). I assume
>
Sure, I will do it if post another revision. Although the changes are quite
trivial and all the drivers define basically the same macro so no functional
changes are expected.
> https://lore.kernel.org/dri-devel/20221228014757.3170486-2-javierm@redhat.com/
>
> is the right one?
Correct.
> Cheers,
> -- Guido
>
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 03/14] drm/panel-sitronix-st7703: Drop custom DSI write macros
2022-12-28 1:47 ` [PATCH 03/14] drm/panel-sitronix-st7703: " Javier Martinez Canillas
2022-12-28 12:01 ` Guido Günther
@ 2023-01-02 18:42 ` Sam Ravnborg
1 sibling, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:42 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: linux-kernel, Ondrej Jirman, Purism Kernel Team,
Guido Günther, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:46AM +0100, Javier Martinez Canillas wrote:
> There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macros defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 83 ++++++++-----------
> 1 file changed, 33 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 86a472b01360..3e6655c2727e 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -73,14 +73,6 @@ static inline struct st7703 *panel_to_st7703(struct drm_panel *panel)
> return container_of(panel, struct st7703, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int jh057n_init_sequence(struct st7703 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -90,27 +82,27 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> * resemble the ST7703 but the number of parameters often don't match
> * so it's likely a clone.
> */
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC,
> 0xF1, 0x12, 0x83);
Fix indent here, and in similar places below.
With that fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF,
> 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00,
> 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR,
> 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
> 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ,
> 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
> 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08);
> msleep(20);
>
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
> - dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1,
> 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
> 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
> 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
> @@ -119,7 +111,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
> 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2,
> 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
> 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
> @@ -128,7 +120,7 @@ static int jh057n_init_sequence(struct st7703 *ctx)
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A,
> 0xA5, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA,
> 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37,
> 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11,
> 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
> @@ -162,15 +154,6 @@ static const struct st7703_panel_desc jh057n00900_panel_desc = {
> .init_sequence = jh057n_init_sequence,
> };
>
> -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> -
> static int xbd599_init_sequence(struct st7703 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -180,9 +163,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> */
>
> /* Magic sequence to unlock user commands below. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xF1, 0x12, 0x83);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI,
> 0x33, /* VC_main = 0, Lane_Number = 3 (4 lanes) */
> 0x81, /* DSI_LDO_SEL = 1.7V, RTERM = 90 Ohm */
> 0x05, /* IHSRX = x6 (Low High Speed driving ability) */
> @@ -194,14 +177,14 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02,
> 0x4F, 0x11, 0x00, 0x00, 0x37);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT,
> 0x25, /* PCCS = 2, ECP_DC_DIV = 1/4 HSYNC */
> 0x22, /* DT = 15ms XDK_ECP = x2 */
> 0x20, /* PFM_DC_DIV = /1 */
> 0x03 /* ECP_SYNC_EN = 1, VGX_SYNC_EN = 1 */);
>
> /* RGB I/F porch timing */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF,
> 0x10, /* VBP_RGB_GEN */
> 0x10, /* VFP_RGB_GEN */
> 0x05, /* DE_BP_RGB_GEN */
> @@ -212,7 +195,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00, 0x00);
>
> /* Source driving settings. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR,
> 0x73, /* N_POPON */
> 0x73, /* N_NOPON */
> 0x50, /* I_POPON */
> @@ -224,19 +207,19 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00 /* Undocumented */);
>
> /* NVDDD_SEL = -1.8V, VDDD_SEL = out of range (possibly 1.9V?) */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E);
>
> /*
> * SS_PANEL = 1 (reverse scan), GS_PANEL = 0 (normal scan)
> * REV_PANEL = 1 (normally black panel), BGR_PANEL = 1 (BGR)
> */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B);
>
> /* Zig-Zag Type C column inversion. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80);
>
> /* Set display resolution. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP,
> 0xF0, /* NL = 240 */
> 0x12, /* RES_V_LSB = 0, BLK_CON = VSSD,
> * RESO_SEL = 720RGB
> @@ -246,7 +229,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> * ISC = 0 frames
> */);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ,
> 0x00, /* PNOEQ */
> 0x00, /* NNOEQ */
> 0x0B, /* PEQGND */
> @@ -267,9 +250,9 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> */);
>
> /* Undocumented command. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER,
> 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */
> 0x00, /* FBOFF_VGH = 0, FBOFF_VGL = 0 */
> 0x32, /* VRP */
> @@ -287,20 +270,20 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x77 /* VGH3_R_DIV, VGL3_R_DIV (4.5MHz) */);
>
> /* Reference voltage. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP,
> 0x07, /* VREF_SEL = 4.2V */
> 0x07 /* NVREF_SEL = 4.2V */);
> msleep(20);
>
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM,
> 0x2C, /* VCOMDC_F = -0.67V */
> 0x2C /* VCOMDC_B = -0.67V */);
>
> /* Undocumented command. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00);
>
> /* This command is to set forward GIP timing. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12,
> 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
> 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
> @@ -311,7 +294,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
>
> /* This command is to set backward GIP timing. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2,
> 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
> 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
> @@ -322,7 +305,7 @@ static int xbd599_init_sequence(struct st7703 *ctx)
> 0xA5, 0x00, 0x00, 0x00, 0x00);
>
> /* Adjust the gamma characteristics of the panel. */
> - dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
> + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA,
> 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35,
> 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12,
> 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41,
> @@ -499,7 +482,7 @@ static int allpixelson_set(void *data, u64 val)
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
>
> dev_dbg(ctx->dev, "Setting all pixels on\n");
> - dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
> + mipi_dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON);
> msleep(val * 1000);
> /* Reset the panel to get video back */
> drm_panel_disable(&ctx->panel);
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 04/14] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (2 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 03/14] drm/panel-sitronix-st7703: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:43 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 05/14] drm/panel-elida-kd35t133: " Javier Martinez Canillas
` (10 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../drm/panel/panel-leadtek-ltk050h3146w.c | 64 ++++++++-----------
1 file changed, 28 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
index 5619f186d28c..525dddef4d9c 100644
--- a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
+++ b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
@@ -244,14 +244,6 @@ struct ltk050h3146w *panel_to_ltk050h3146w(struct drm_panel *panel)
return container_of(panel, struct ltk050h3146w, panel);
}
-#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
- static const u8 b[] = { cmd, seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -261,55 +253,55 @@ static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
* Init sequence was supplied by the panel vendor without much
* documentation.
*/
- dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8);
- dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06,
+ mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8);
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06,
0x01);
- dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5);
- dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5);
- dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5);
+ mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5);
+ mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00);
- dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07);
- dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f,
+ mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f,
0x28, 0x04, 0xcc, 0xcc, 0xcc);
- dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04);
- dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2);
- dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03);
- dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12);
- dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80,
+ mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2);
+ mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80,
0x80);
- dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f,
+ mipi_dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f,
0x16, 0x00, 0x00);
- dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50,
+ mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50,
0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f,
0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67,
0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55,
0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08);
- dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a,
+ mipi_dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a,
0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
- dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b,
+ mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b,
0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
- dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05,
+ mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05,
0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
- dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04,
+ mipi_dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04,
0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
- dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20,
+ mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20,
0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03,
0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08);
- dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00,
+ mipi_dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00,
0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05,
0x21, 0x00, 0x60);
- dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00);
- dsi_dcs_write_seq(dsi, 0xde, 0x02);
- dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c);
- dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04);
- dsi_dcs_write_seq(dsi, 0xc1, 0x11);
- dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37);
- dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84);
- dsi_dcs_write_seq(dsi, 0xde, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xde, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c);
+ mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x11);
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37);
+ mipi_dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84);
+ mipi_dsi_dcs_write_seq(dsi, 0xde, 0x00);
ret = mipi_dsi_dcs_set_tear_on(dsi, 1);
if (ret < 0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 04/14] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 04/14] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro Javier Martinez Canillas
@ 2023-01-02 18:43 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:43 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:47AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> .../drm/panel/panel-leadtek-ltk050h3146w.c | 64 ++++++++-----------
> 1 file changed, 28 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
> index 5619f186d28c..525dddef4d9c 100644
> --- a/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
> +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
> @@ -244,14 +244,6 @@ struct ltk050h3146w *panel_to_ltk050h3146w(struct drm_panel *panel)
> return container_of(panel, struct ltk050h3146w, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
> - static const u8 b[] = { cmd, seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -261,55 +253,55 @@ static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
> * Init sequence was supplied by the panel vendor without much
> * documentation.
> */
> - dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8);
> - dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06,
> + mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8);
> + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06,
> 0x01);
Fix indent here and later.
With this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> - dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5);
> - dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5);
> - dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5);
> + mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5);
> + mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00);
>
> - dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07);
> - dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f,
> + mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f,
> 0x28, 0x04, 0xcc, 0xcc, 0xcc);
> - dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04);
> - dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2);
> - dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03);
> - dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12);
> - dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80,
> + mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2);
> + mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03);
> + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80,
> 0x80);
> - dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f,
> + mipi_dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f,
> 0x16, 0x00, 0x00);
> - dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50,
> + mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50,
> 0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f,
> 0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67,
> 0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55,
> 0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08);
> - dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a,
> + mipi_dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a,
> 0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> - dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b,
> + mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b,
> 0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> - dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05,
> + mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05,
> 0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> - dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04,
> + mipi_dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04,
> 0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> - dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20,
> + mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20,
> 0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03,
> 0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08);
> - dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00,
> + mipi_dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05,
> 0x21, 0x00, 0x60);
> - dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00);
> - dsi_dcs_write_seq(dsi, 0xde, 0x02);
> - dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c);
> - dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04);
> - dsi_dcs_write_seq(dsi, 0xc1, 0x11);
> - dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37);
> - dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84);
> - dsi_dcs_write_seq(dsi, 0xde, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c);
> + mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x11);
> + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37);
> + mipi_dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84);
> + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x00);
>
> ret = mipi_dsi_dcs_set_tear_on(dsi, 1);
> if (ret < 0) {
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 05/14] drm/panel-elida-kd35t133: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (3 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 04/14] drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:44 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 06/14] drm/panel-boe-bf060y8m-aj0: " Javier Martinez Canillas
` (9 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
drivers/gpu/drm/panel/panel-elida-kd35t133.c | 34 ++++++++------------
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c b/drivers/gpu/drm/panel/panel-elida-kd35t133.c
index eee714cf3f49..48535ea3f1d3 100644
--- a/drivers/gpu/drm/panel/panel-elida-kd35t133.c
+++ b/drivers/gpu/drm/panel/panel-elida-kd35t133.c
@@ -51,14 +51,6 @@ static inline struct kd35t133 *panel_to_kd35t133(struct drm_panel *panel)
return container_of(panel, struct kd35t133, panel);
}
-#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
- static const u8 b[] = { cmd, seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static int kd35t133_init_sequence(struct kd35t133 *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -68,24 +60,24 @@ static int kd35t133_init_sequence(struct kd35t133 *ctx)
* Init sequence was supplied by the panel vendor with minimal
* documentation.
*/
- dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56,
0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34,
0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
- dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
- dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
0x20, 0x02);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
- dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
0xa9, 0x51, 0x2c, 0x82);
mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_INVERT_MODE, NULL, 0);
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 05/14] drm/panel-elida-kd35t133: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 05/14] drm/panel-elida-kd35t133: " Javier Martinez Canillas
@ 2023-01-02 18:44 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:44 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:48AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> drivers/gpu/drm/panel/panel-elida-kd35t133.c | 34 ++++++++------------
> 1 file changed, 13 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-elida-kd35t133.c b/drivers/gpu/drm/panel/panel-elida-kd35t133.c
> index eee714cf3f49..48535ea3f1d3 100644
> --- a/drivers/gpu/drm/panel/panel-elida-kd35t133.c
> +++ b/drivers/gpu/drm/panel/panel-elida-kd35t133.c
> @@ -51,14 +51,6 @@ static inline struct kd35t133 *panel_to_kd35t133(struct drm_panel *panel)
> return container_of(panel, struct kd35t133, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \
> - static const u8 b[] = { cmd, seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int kd35t133_init_sequence(struct kd35t133 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -68,24 +60,24 @@ static int kd35t133_init_sequence(struct kd35t133 *ctx)
> * Init sequence was supplied by the panel vendor with minimal
> * documentation.
> */
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA,
> 0x00, 0x13, 0x18, 0x04, 0x0f, 0x06, 0x3a, 0x56,
> 0x4d, 0x03, 0x0a, 0x06, 0x30, 0x3e, 0x0f);
Fix indent, here and later.
With this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA,
> 0x00, 0x13, 0x18, 0x01, 0x11, 0x06, 0x38, 0x34,
> 0x4d, 0x06, 0x0d, 0x0b, 0x31, 0x37, 0x0f);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_INTERFACEMODECTRL, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_FRAMERATECTRL, 0xa0);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYINVERSIONCTRL, 0x02);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_DISPLAYFUNCTIONCTRL,
> 0x20, 0x02);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
> - dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_SETIMAGEFUNCTION, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, KD35T133_CMD_ADJUSTCONTROL3,
> 0xa9, 0x51, 0x2c, 0x82);
> mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_INVERT_MODE, NULL, 0);
>
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 06/14] drm/panel-boe-bf060y8m-aj0: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (4 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 05/14] drm/panel-elida-kd35t133: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:45 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 07/14] drm/panel-novatek-nt35950: " Javier Martinez Canillas
` (8 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 28 +++++++------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
index ad58840eda41..7fff89cb1cd3 100644
--- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
+++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
@@ -43,14 +43,6 @@ struct boe_bf060y8m_aj0 *to_boe_bf060y8m_aj0(struct drm_panel *panel)
return container_of(panel, struct boe_bf060y8m_aj0, panel);
}
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe)
{
gpiod_set_value_cansleep(boe->reset_gpio, 0);
@@ -67,11 +59,11 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
struct device *dev = &dsi->dev;
int ret;
- dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
- dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
- dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
- dsi_dcs_write_seq(dsi, 0xf8,
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
+ mipi_dsi_dcs_write_seq(dsi, 0xf8,
0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d);
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
@@ -81,17 +73,17 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
}
msleep(30);
- dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
- dsi_dcs_write_seq(dsi, 0xc0,
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xc0,
0x08, 0x48, 0x65, 0x33, 0x33, 0x33,
0x2a, 0x31, 0x39, 0x20, 0x09);
- dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
+ mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
- dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
+ mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83,
0x5c, 0x5c, 0x5c);
- dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
+ mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
msleep(30);
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 06/14] drm/panel-boe-bf060y8m-aj0: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 06/14] drm/panel-boe-bf060y8m-aj0: " Javier Martinez Canillas
@ 2023-01-02 18:45 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:45 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:49AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> .../gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 28 +++++++------------
> 1 file changed, 10 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> index ad58840eda41..7fff89cb1cd3 100644
> --- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> +++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> @@ -43,14 +43,6 @@ struct boe_bf060y8m_aj0 *to_boe_bf060y8m_aj0(struct drm_panel *panel)
> return container_of(panel, struct boe_bf060y8m_aj0, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe)
> {
> gpiod_set_value_cansleep(boe->reset_gpio, 0);
> @@ -67,11 +59,11 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
> struct device *dev = &dsi->dev;
> int ret;
>
> - dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> - dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
> - dsi_dcs_write_seq(dsi, 0xf8,
> + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
> + mipi_dsi_dcs_write_seq(dsi, 0xf8,
> 0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d);
Fix indent.
With this fixed in all places:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
>
> ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> @@ -81,17 +73,17 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
> }
> msleep(30);
>
> - dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> - dsi_dcs_write_seq(dsi, 0xc0,
> + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xc0,
> 0x08, 0x48, 0x65, 0x33, 0x33, 0x33,
> 0x2a, 0x31, 0x39, 0x20, 0x09);
> - dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
> + mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
> 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> - dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
> + mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
> 0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83,
> 0x5c, 0x5c, 0x5c);
> - dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
> + mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
>
> msleep(30);
>
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 07/14] drm/panel-novatek-nt35950: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (5 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 06/14] drm/panel-boe-bf060y8m-aj0: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:55 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 08/14] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros Javier Martinez Canillas
` (7 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
drivers/gpu/drm/panel/panel-novatek-nt35950.c | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
index 3a844917da07..abf752b36a52 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
@@ -89,14 +89,6 @@ static inline struct nt35950 *to_nt35950(struct drm_panel *panel)
return container_of(panel, struct nt35950, panel);
}
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void nt35950_reset(struct nt35950 *nt)
{
gpiod_set_value_cansleep(nt->reset_gpio, 1);
@@ -338,7 +330,7 @@ static int nt35950_on(struct nt35950 *nt)
return ret;
/* Unknown command */
- dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88);
+ mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88);
/* CMD2 Page 7 */
ret = nt35950_set_cmd2_page(nt, 7);
@@ -346,10 +338,10 @@ static int nt35950_on(struct nt35950 *nt)
return ret;
/* Enable SubPixel Rendering */
- dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01);
+ mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01);
/* SPR Mode: YYG Rainbow-RGB */
- dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB);
+ mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB);
/* CMD3 */
ret = nt35950_inject_black_image(nt);
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 07/14] drm/panel-novatek-nt35950: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 07/14] drm/panel-novatek-nt35950: " Javier Martinez Canillas
@ 2023-01-02 18:55 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:55 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
On Wed, Dec 28, 2022 at 02:47:50AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>
> drivers/gpu/drm/panel/panel-novatek-nt35950.c | 14 +++-----------
> 1 file changed, 3 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35950.c b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
> index 3a844917da07..abf752b36a52 100644
> --- a/drivers/gpu/drm/panel/panel-novatek-nt35950.c
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt35950.c
> @@ -89,14 +89,6 @@ static inline struct nt35950 *to_nt35950(struct drm_panel *panel)
> return container_of(panel, struct nt35950, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void nt35950_reset(struct nt35950 *nt)
> {
> gpiod_set_value_cansleep(nt->reset_gpio, 1);
> @@ -338,7 +330,7 @@ static int nt35950_on(struct nt35950 *nt)
> return ret;
>
> /* Unknown command */
> - dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88);
> + mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x88, 0x88);
>
> /* CMD2 Page 7 */
> ret = nt35950_set_cmd2_page(nt, 7);
> @@ -346,10 +338,10 @@ static int nt35950_on(struct nt35950 *nt)
> return ret;
>
> /* Enable SubPixel Rendering */
> - dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01);
> + mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_EN, 0x01);
>
> /* SPR Mode: YYG Rainbow-RGB */
> - dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB);
> + mipi_dsi_dcs_write_seq(dsi, MCS_PARAM_SPR_MODE, MCS_SPR_MODE_YYG_RAINBOW_RGB);
>
> /* CMD3 */
> ret = nt35950_inject_black_image(nt);
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 08/14] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (6 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 07/14] drm/panel-novatek-nt35950: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:46 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro Javier Martinez Canillas
` (6 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macros defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 50 +++++++-------------
1 file changed, 17 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
index d8765b2294fb..e3f0e59b5e36 100644
--- a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
+++ b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
@@ -29,22 +29,6 @@ static inline struct jdi_fhd_r63452 *to_jdi_fhd_r63452(struct drm_panel *panel)
return container_of(panel, struct jdi_fhd_r63452, panel);
}
-#define dsi_generic_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void jdi_fhd_r63452_reset(struct jdi_fhd_r63452 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
@@ -63,12 +47,12 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
- dsi_generic_write_seq(dsi, 0xb0, 0x00);
- dsi_generic_write_seq(dsi, 0xd6, 0x01);
- dsi_generic_write_seq(dsi, 0xec,
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xec,
0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b,
0x13, 0x15, 0x68, 0x0b, 0xb5);
- dsi_generic_write_seq(dsi, 0xb0, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
if (ret < 0) {
@@ -76,7 +60,7 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
return ret;
}
- dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x77);
if (ret < 0) {
@@ -108,10 +92,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
return ret;
}
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24);
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
- dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00);
- dsi_dcs_write_seq(dsi, 0x84, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
ret = mipi_dsi_dcs_set_display_on(dsi);
if (ret < 0) {
@@ -127,10 +111,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
}
msleep(80);
- dsi_generic_write_seq(dsi, 0xb0, 0x04);
- dsi_dcs_write_seq(dsi, 0x84, 0x00);
- dsi_generic_write_seq(dsi, 0xc8, 0x11);
- dsi_generic_write_seq(dsi, 0xb0, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x04);
+ mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc8, 0x11);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
return 0;
}
@@ -143,12 +127,12 @@ static int jdi_fhd_r63452_off(struct jdi_fhd_r63452 *ctx)
dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
- dsi_generic_write_seq(dsi, 0xb0, 0x00);
- dsi_generic_write_seq(dsi, 0xd6, 0x01);
- dsi_generic_write_seq(dsi, 0xec,
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xec,
0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b,
0x13, 0x15, 0x68, 0x0b, 0x95);
- dsi_generic_write_seq(dsi, 0xb0, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
ret = mipi_dsi_dcs_set_display_off(dsi);
if (ret < 0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 08/14] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros
2022-12-28 1:47 ` [PATCH 08/14] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros Javier Martinez Canillas
@ 2023-01-02 18:46 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:46 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:51AM +0100, Javier Martinez Canillas wrote:
> There are macros for these already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macros defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 50 +++++++-------------
> 1 file changed, 17 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
> index d8765b2294fb..e3f0e59b5e36 100644
> --- a/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
> +++ b/drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c
> @@ -29,22 +29,6 @@ static inline struct jdi_fhd_r63452 *to_jdi_fhd_r63452(struct drm_panel *panel)
> return container_of(panel, struct jdi_fhd_r63452, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> -#define dsi_dcs_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void jdi_fhd_r63452_reset(struct jdi_fhd_r63452 *ctx)
> {
> gpiod_set_value_cansleep(ctx->reset_gpio, 0);
> @@ -63,12 +47,12 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
>
> dsi->mode_flags |= MIPI_DSI_MODE_LPM;
>
> - dsi_generic_write_seq(dsi, 0xb0, 0x00);
> - dsi_generic_write_seq(dsi, 0xd6, 0x01);
> - dsi_generic_write_seq(dsi, 0xec,
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xec,
> 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b,
> 0x13, 0x15, 0x68, 0x0b, 0xb5);
Fix indent - with this fixed everywhere:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> - dsi_generic_write_seq(dsi, 0xb0, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
>
> ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
> if (ret < 0) {
> @@ -76,7 +60,7 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
> return ret;
> }
>
> - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
>
> ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x77);
> if (ret < 0) {
> @@ -108,10 +92,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
> return ret;
> }
>
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00);
> - dsi_dcs_write_seq(dsi, 0x84, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
>
> ret = mipi_dsi_dcs_set_display_on(dsi);
> if (ret < 0) {
> @@ -127,10 +111,10 @@ static int jdi_fhd_r63452_on(struct jdi_fhd_r63452 *ctx)
> }
> msleep(80);
>
> - dsi_generic_write_seq(dsi, 0xb0, 0x04);
> - dsi_dcs_write_seq(dsi, 0x84, 0x00);
> - dsi_generic_write_seq(dsi, 0xc8, 0x11);
> - dsi_generic_write_seq(dsi, 0xb0, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x04);
> + mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x11);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
>
> return 0;
> }
> @@ -143,12 +127,12 @@ static int jdi_fhd_r63452_off(struct jdi_fhd_r63452 *ctx)
>
> dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
>
> - dsi_generic_write_seq(dsi, 0xb0, 0x00);
> - dsi_generic_write_seq(dsi, 0xd6, 0x01);
> - dsi_generic_write_seq(dsi, 0xec,
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xec,
> 0x64, 0xdc, 0xec, 0x3b, 0x52, 0x00, 0x0b, 0x0b,
> 0x13, 0x15, 0x68, 0x0b, 0x95);
> - dsi_generic_write_seq(dsi, 0xb0, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x03);
>
> ret = mipi_dsi_dcs_set_display_off(dsi);
> if (ret < 0) {
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (7 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 08/14] drm/panel-jdi-fhd-r63452: Drop custom DSI write macros Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:48 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 10/14] drm/panel-samsung-sofef00: " Javier Martinez Canillas
` (5 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../panel/panel-samsung-s6e88a0-ams452ef01.c | 24 +++++++------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
index 97ff7a18545c..e94d88fed4f3 100644
--- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
+++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
@@ -28,14 +28,6 @@ s6e88a0_ams452ef01 *to_s6e88a0_ams452ef01(struct drm_panel *panel)
return container_of(panel, struct s6e88a0_ams452ef01, panel);
}
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
@@ -54,8 +46,8 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
- dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
- dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
+ mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret < 0) {
@@ -65,7 +57,7 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
msleep(120);
// set default brightness/gama
- dsi_dcs_write_seq(dsi, 0xca,
+ mipi_dsi_dcs_write_seq(dsi, 0xca,
0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB
0x80, 0x80, 0x80, // V203 R,G,B
0x80, 0x80, 0x80, // V151 R,G,B
@@ -77,11 +69,11 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
0x6b, 0x68, 0x71, // V3 R,G,B
0x00, 0x00, 0x00); // V1 R,G,B
// set default Amoled Off Ratio
- dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
- dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
- dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
- dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
+ mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
+ mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
ret = mipi_dsi_dcs_set_display_on(dsi);
if (ret < 0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro Javier Martinez Canillas
@ 2023-01-02 18:48 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:48 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
On Wed, Dec 28, 2022 at 02:47:52AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> .../panel/panel-samsung-s6e88a0-ams452ef01.c | 24 +++++++------------
> 1 file changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> index 97ff7a18545c..e94d88fed4f3 100644
> --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> @@ -28,14 +28,6 @@ s6e88a0_ams452ef01 *to_s6e88a0_ams452ef01(struct drm_panel *panel)
> return container_of(panel, struct s6e88a0_ams452ef01, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx)
> {
> gpiod_set_value_cansleep(ctx->reset_gpio, 1);
> @@ -54,8 +46,8 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
>
> dsi->mode_flags |= MIPI_DSI_MODE_LPM;
>
> - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
> - dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
> + mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
>
> ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> if (ret < 0) {
> @@ -65,7 +57,7 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
> msleep(120);
>
> // set default brightness/gama
> - dsi_dcs_write_seq(dsi, 0xca,
> + mipi_dsi_dcs_write_seq(dsi, 0xca,
> 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB
> 0x80, 0x80, 0x80, // V203 R,G,B
> 0x80, 0x80, 0x80, // V151 R,G,B
> @@ -77,11 +69,11 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
> 0x6b, 0x68, 0x71, // V3 R,G,B
> 0x00, 0x00, 0x00); // V1 R,G,B
Fix indent - with this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> // set default Amoled Off Ratio
> - dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
> - dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> - dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
> - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
> + mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
> + mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
>
> ret = mipi_dsi_dcs_set_display_on(dsi);
> if (ret < 0) {
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 10/14] drm/panel-samsung-sofef00: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (8 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:56 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 11/14] drm/panel-sharp-ls060t1sx01: " Javier Martinez Canillas
` (4 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
drivers/gpu/drm/panel/panel-samsung-sofef00.c | 24 +++++++------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-sofef00.c b/drivers/gpu/drm/panel/panel-samsung-sofef00.c
index 1a0d24595faa..9db49a028930 100644
--- a/drivers/gpu/drm/panel/panel-samsung-sofef00.c
+++ b/drivers/gpu/drm/panel/panel-samsung-sofef00.c
@@ -34,14 +34,6 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel *panel)
return container_of(panel, struct sofef00_panel, panel);
}
-#define dsi_dcs_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void sofef00_panel_reset(struct sofef00_panel *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
@@ -67,7 +59,7 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
}
usleep_range(10000, 11000);
- dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
if (ret < 0) {
@@ -75,13 +67,13 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
return ret;
}
- dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
- dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
- dsi_dcs_write_seq(dsi, 0xb0, 0x07);
- dsi_dcs_write_seq(dsi, 0xb6, 0x12);
- dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
- dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
+ mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07);
+ mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12);
+ mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
ret = mipi_dsi_dcs_set_display_on(dsi);
if (ret < 0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 10/14] drm/panel-samsung-sofef00: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 10/14] drm/panel-samsung-sofef00: " Javier Martinez Canillas
@ 2023-01-02 18:56 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:56 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
On Wed, Dec 28, 2022 at 02:47:53AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>
> drivers/gpu/drm/panel/panel-samsung-sofef00.c | 24 +++++++------------
> 1 file changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-samsung-sofef00.c b/drivers/gpu/drm/panel/panel-samsung-sofef00.c
> index 1a0d24595faa..9db49a028930 100644
> --- a/drivers/gpu/drm/panel/panel-samsung-sofef00.c
> +++ b/drivers/gpu/drm/panel/panel-samsung-sofef00.c
> @@ -34,14 +34,6 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel *panel)
> return container_of(panel, struct sofef00_panel, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void sofef00_panel_reset(struct sofef00_panel *ctx)
> {
> gpiod_set_value_cansleep(ctx->reset_gpio, 0);
> @@ -67,7 +59,7 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
> }
> usleep_range(10000, 11000);
>
> - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
>
> ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
> if (ret < 0) {
> @@ -75,13 +67,13 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
> return ret;
> }
>
> - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> - dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> - dsi_dcs_write_seq(dsi, 0xb0, 0x07);
> - dsi_dcs_write_seq(dsi, 0xb6, 0x12);
> - dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
> - dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
> + mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07);
> + mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12);
> + mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
>
> ret = mipi_dsi_dcs_set_display_on(dsi);
> if (ret < 0) {
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 11/14] drm/panel-sharp-ls060t1sx01: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (9 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 10/14] drm/panel-samsung-sofef00: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:50 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 12/14] drm/panel-mantix-mlaf057we51: " Javier Martinez Canillas
` (3 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../gpu/drm/panel/panel-sharp-ls060t1sx01.c | 19 ++-----------------
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
index 8a4e0c1fe73f..68f52eaaf4fa 100644
--- a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
+++ b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
@@ -32,12 +32,6 @@ static inline struct sharp_ls060 *to_sharp_ls060(struct drm_panel *panel)
return container_of(panel, struct sharp_ls060, panel);
}
-#define dsi_dcs_write_seq(dsi, seq...) ({ \
- static const u8 d[] = { seq }; \
- \
- mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
- })
-
static void sharp_ls060_reset(struct sharp_ls060 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
@@ -56,17 +50,8 @@ static int sharp_ls060_on(struct sharp_ls060 *ctx)
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
- ret = dsi_dcs_write_seq(dsi, 0xbb, 0x13);
- if (ret < 0) {
- dev_err(dev, "Failed to send command: %d\n", ret);
- return ret;
- }
-
- ret = dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START);
- if (ret < 0) {
- dev_err(dev, "Failed to send command: %d\n", ret);
- return ret;
- }
+ mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13);
+ mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START);
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret < 0) {
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 11/14] drm/panel-sharp-ls060t1sx01: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 11/14] drm/panel-sharp-ls060t1sx01: " Javier Martinez Canillas
@ 2023-01-02 18:50 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:50 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
On Wed, Dec 28, 2022 at 02:47:54AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
This is a nice patch - where you benefit from the more advanced macro,
and drop even more code.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>
> .../gpu/drm/panel/panel-sharp-ls060t1sx01.c | 19 ++-----------------
> 1 file changed, 2 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
> index 8a4e0c1fe73f..68f52eaaf4fa 100644
> --- a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
> +++ b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c
> @@ -32,12 +32,6 @@ static inline struct sharp_ls060 *to_sharp_ls060(struct drm_panel *panel)
> return container_of(panel, struct sharp_ls060, panel);
> }
>
> -#define dsi_dcs_write_seq(dsi, seq...) ({ \
> - static const u8 d[] = { seq }; \
> - \
> - mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
> - })
> -
> static void sharp_ls060_reset(struct sharp_ls060 *ctx)
> {
> gpiod_set_value_cansleep(ctx->reset_gpio, 0);
> @@ -56,17 +50,8 @@ static int sharp_ls060_on(struct sharp_ls060 *ctx)
>
> dsi->mode_flags |= MIPI_DSI_MODE_LPM;
>
> - ret = dsi_dcs_write_seq(dsi, 0xbb, 0x13);
> - if (ret < 0) {
> - dev_err(dev, "Failed to send command: %d\n", ret);
> - return ret;
> - }
> -
> - ret = dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START);
> - if (ret < 0) {
> - dev_err(dev, "Failed to send command: %d\n", ret);
> - return ret;
> - }
> + mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13);
> + mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START);
>
> ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> if (ret < 0) {
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 12/14] drm/panel-mantix-mlaf057we51: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (10 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 11/14] drm/panel-sharp-ls060t1sx01: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:56 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 13/14] drm/panel-sony-tulip-truly-nt35521: " Javier Martinez Canillas
` (2 subsequent siblings)
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Guido Günther, Purism Kernel Team, Sam Ravnborg,
Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../gpu/drm/panel/panel-mantix-mlaf057we51.c | 24 +++++++------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
index 772e3b6acece..9243b2ad828d 100644
--- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
+++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
@@ -45,14 +45,6 @@ static inline struct mantix *panel_to_mantix(struct drm_panel *panel)
return container_of(panel, struct mantix, panel);
}
-#define dsi_generic_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static int mantix_init_sequence(struct mantix *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -61,18 +53,18 @@ static int mantix_init_sequence(struct mantix *ctx)
/*
* Init sequence was supplied by the panel vendor.
*/
- dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A);
- dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03);
- dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03);
- dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00);
- dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09);
- dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09);
+ mipi_dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00);
msleep(20);
- dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5);
- dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5);
+ mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F);
msleep(20);
dev_dbg(dev, "Panel init sequence done\n");
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 12/14] drm/panel-mantix-mlaf057we51: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 12/14] drm/panel-mantix-mlaf057we51: " Javier Martinez Canillas
@ 2023-01-02 18:56 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:56 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: linux-kernel, Purism Kernel Team, Guido Günther, dri-devel,
Thierry Reding
On Wed, Dec 28, 2022 at 02:47:55AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>
> .../gpu/drm/panel/panel-mantix-mlaf057we51.c | 24 +++++++------------
> 1 file changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
> index 772e3b6acece..9243b2ad828d 100644
> --- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
> +++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
> @@ -45,14 +45,6 @@ static inline struct mantix *panel_to_mantix(struct drm_panel *panel)
> return container_of(panel, struct mantix, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int mantix_init_sequence(struct mantix *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -61,18 +53,18 @@ static int mantix_init_sequence(struct mantix *ctx)
> /*
> * Init sequence was supplied by the panel vendor.
> */
> - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A);
>
> - dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03);
> - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03);
> - dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_INT_CANCEL, 0x03);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0x80, 0xA9, 0x00);
>
> - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09);
> - dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5A, 0x09);
> + mipi_dsi_generic_write_seq(dsi, 0x80, 0x64, 0x00, 0x64, 0x00, 0x00);
> msleep(20);
>
> - dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5);
> - dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_SPI_FINISH, 0xA5);
> + mipi_dsi_generic_write_seq(dsi, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2F);
> msleep(20);
>
> dev_dbg(dev, "Panel init sequence done\n");
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 13/14] drm/panel-sony-tulip-truly-nt35521: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (11 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 12/14] drm/panel-mantix-mlaf057we51: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:51 ` Sam Ravnborg
2022-12-28 1:47 ` [PATCH 14/14] drm/panel-xinpeng-xpp055c272: " Javier Martinez Canillas
2023-01-02 19:00 ` [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Sam Ravnborg
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../panel/panel-sony-tulip-truly-nt35521.c | 348 +++++++++---------
1 file changed, 170 insertions(+), 178 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
index fa9be3c299c0..a0661576acff 100644
--- a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
+++ b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
@@ -33,14 +33,6 @@ struct truly_nt35521 *to_truly_nt35521(struct drm_panel *panel)
return container_of(panel, struct truly_nt35521, panel);
}
-#define dsi_generic_write_seq(dsi, seq...) do { \
- static const u8 d[] = { seq }; \
- int ret; \
- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static void truly_nt35521_reset(struct truly_nt35521 *ctx)
{
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
@@ -59,200 +51,200 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx)
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
- dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
- dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00);
- dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00);
- dsi_generic_write_seq(dsi, 0x6f, 0x01);
- dsi_generic_write_seq(dsi, 0xb1, 0x21);
- dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01);
- dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02);
- dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11);
- dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xb6, 0x02);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
- dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09);
- dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09);
- dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00);
- dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00);
- dsi_generic_write_seq(dsi, 0xca, 0x00);
- dsi_generic_write_seq(dsi, 0xc0, 0x04);
- dsi_generic_write_seq(dsi, 0xbe, 0xb5);
- dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35);
- dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25);
- dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43);
- dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02);
- dsi_generic_write_seq(dsi, 0xee, 0x03);
- dsi_generic_write_seq(dsi, 0xb0,
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x21);
+ mipi_dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11);
+ mipi_dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb6, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09);
+ mipi_dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xca, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc0, 0x04);
+ mipi_dsi_generic_write_seq(dsi, 0xbe, 0xb5);
+ mipi_dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35);
+ mipi_dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25);
+ mipi_dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43);
+ mipi_dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xee, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xb0,
0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb6, 0x00, 0xc3,
0x00, 0xce, 0x00, 0xe1, 0x00, 0xf3, 0x01, 0x11);
- dsi_generic_write_seq(dsi, 0xb1,
+ mipi_dsi_generic_write_seq(dsi, 0xb1,
0x01, 0x2e, 0x01, 0x5c, 0x01, 0x82, 0x01, 0xc3,
0x01, 0xfe, 0x02, 0x00, 0x02, 0x37, 0x02, 0x77);
- dsi_generic_write_seq(dsi, 0xb2,
+ mipi_dsi_generic_write_seq(dsi, 0xb2,
0x02, 0xa1, 0x02, 0xd7, 0x02, 0xfe, 0x03, 0x2c,
0x03, 0x4b, 0x03, 0x63, 0x03, 0x8f, 0x03, 0x90);
- dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98);
- dsi_generic_write_seq(dsi, 0xb4,
+ mipi_dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98);
+ mipi_dsi_generic_write_seq(dsi, 0xb4,
0x00, 0x81, 0x00, 0x8b, 0x00, 0x9c, 0x00, 0xa9,
0x00, 0xb5, 0x00, 0xcb, 0x00, 0xdf, 0x01, 0x02);
- dsi_generic_write_seq(dsi, 0xb5,
+ mipi_dsi_generic_write_seq(dsi, 0xb5,
0x01, 0x1f, 0x01, 0x51, 0x01, 0x7a, 0x01, 0xbf,
0x01, 0xfa, 0x01, 0xfc, 0x02, 0x34, 0x02, 0x76);
- dsi_generic_write_seq(dsi, 0xb6,
+ mipi_dsi_generic_write_seq(dsi, 0xb6,
0x02, 0x9f, 0x02, 0xd7, 0x02, 0xfc, 0x03, 0x2c,
0x03, 0x4a, 0x03, 0x63, 0x03, 0x8f, 0x03, 0xa2);
- dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba);
- dsi_generic_write_seq(dsi, 0xb8,
+ mipi_dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba);
+ mipi_dsi_generic_write_seq(dsi, 0xb8,
0x00, 0x01, 0x00, 0x02, 0x00, 0x0e, 0x00, 0x2a,
0x00, 0x41, 0x00, 0x67, 0x00, 0x87, 0x00, 0xb9);
- dsi_generic_write_seq(dsi, 0xb9,
+ mipi_dsi_generic_write_seq(dsi, 0xb9,
0x00, 0xe2, 0x01, 0x22, 0x01, 0x54, 0x01, 0xa3,
0x01, 0xe6, 0x01, 0xe7, 0x02, 0x24, 0x02, 0x67);
- dsi_generic_write_seq(dsi, 0xba,
+ mipi_dsi_generic_write_seq(dsi, 0xba,
0x02, 0x93, 0x02, 0xcd, 0x02, 0xf6, 0x03, 0x31,
0x03, 0x6c, 0x03, 0xe9, 0x03, 0xef, 0x03, 0xf4);
- dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
- dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00);
- dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00);
- dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00);
- dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00);
- dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00);
- dsi_generic_write_seq(dsi, 0xc4, 0x60);
- dsi_generic_write_seq(dsi, 0xc5, 0xc0);
- dsi_generic_write_seq(dsi, 0xc6, 0x00);
- dsi_generic_write_seq(dsi, 0xc7, 0x00);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
- dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06);
- dsi_generic_write_seq(dsi, 0xb8, 0x00);
- dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03);
- dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03);
- dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03);
- dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03);
- dsi_generic_write_seq(dsi, 0xc0, 0x0b);
- dsi_generic_write_seq(dsi, 0xc1, 0x09);
- dsi_generic_write_seq(dsi, 0xc2, 0xa6);
- dsi_generic_write_seq(dsi, 0xc3, 0x05);
- dsi_generic_write_seq(dsi, 0xc4, 0x00);
- dsi_generic_write_seq(dsi, 0xc5, 0x02);
- dsi_generic_write_seq(dsi, 0xc6, 0x22);
- dsi_generic_write_seq(dsi, 0xc7, 0x03);
- dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20);
- dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20);
- dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60);
- dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60);
- dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10);
- dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10);
- dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10);
- dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10);
- dsi_generic_write_seq(dsi, 0xd0,
+ mipi_dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc4, 0x60);
+ mipi_dsi_generic_write_seq(dsi, 0xc5, 0xc0);
+ mipi_dsi_generic_write_seq(dsi, 0xc6, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc7, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb8, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xc0, 0x0b);
+ mipi_dsi_generic_write_seq(dsi, 0xc1, 0x09);
+ mipi_dsi_generic_write_seq(dsi, 0xc2, 0xa6);
+ mipi_dsi_generic_write_seq(dsi, 0xc3, 0x05);
+ mipi_dsi_generic_write_seq(dsi, 0xc4, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xc5, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xc6, 0x22);
+ mipi_dsi_generic_write_seq(dsi, 0xc7, 0x03);
+ mipi_dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20);
+ mipi_dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20);
+ mipi_dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60);
+ mipi_dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60);
+ mipi_dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xd0,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xd5,
+ mipi_dsi_generic_write_seq(dsi, 0xd5,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xd6,
+ mipi_dsi_generic_write_seq(dsi, 0xd6,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xd7,
+ mipi_dsi_generic_write_seq(dsi, 0xd7,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xe5, 0x06);
- dsi_generic_write_seq(dsi, 0xe6, 0x06);
- dsi_generic_write_seq(dsi, 0xe7, 0x00);
- dsi_generic_write_seq(dsi, 0xe8, 0x06);
- dsi_generic_write_seq(dsi, 0xe9, 0x06);
- dsi_generic_write_seq(dsi, 0xea, 0x06);
- dsi_generic_write_seq(dsi, 0xeb, 0x00);
- dsi_generic_write_seq(dsi, 0xec, 0x00);
- dsi_generic_write_seq(dsi, 0xed, 0x30);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06);
- dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e);
- dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34);
- dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a);
- dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10);
- dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16);
- dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31);
- dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08);
- dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01);
- dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19);
- dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13);
- dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29);
- dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31);
- dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d);
- dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d);
- dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34);
- dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a);
- dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19);
- dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13);
- dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01);
- dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31);
- dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08);
- dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02);
- dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10);
- dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16);
- dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29);
- dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31);
- dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e);
- dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31);
- dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xe7, 0x00);
- dsi_generic_write_seq(dsi, 0x6f, 0x02);
- dsi_generic_write_seq(dsi, 0xf7, 0x47);
- dsi_generic_write_seq(dsi, 0x6f, 0x0a);
- dsi_generic_write_seq(dsi, 0xf7, 0x02);
- dsi_generic_write_seq(dsi, 0x6f, 0x17);
- dsi_generic_write_seq(dsi, 0xf4, 0x60);
- dsi_generic_write_seq(dsi, 0x6f, 0x01);
- dsi_generic_write_seq(dsi, 0xf9, 0x46);
- dsi_generic_write_seq(dsi, 0x6f, 0x11);
- dsi_generic_write_seq(dsi, 0xf3, 0x01);
- dsi_generic_write_seq(dsi, 0x35, 0x00);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
- dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
- dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21);
- dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
- dsi_generic_write_seq(dsi, 0x35, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xe5, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xe6, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xe8, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xe9, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xea, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xeb, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xec, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xed, 0x30);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06);
+ mipi_dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e);
+ mipi_dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34);
+ mipi_dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a);
+ mipi_dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16);
+ mipi_dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08);
+ mipi_dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19);
+ mipi_dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13);
+ mipi_dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29);
+ mipi_dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d);
+ mipi_dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d);
+ mipi_dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34);
+ mipi_dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a);
+ mipi_dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19);
+ mipi_dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13);
+ mipi_dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08);
+ mipi_dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10);
+ mipi_dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16);
+ mipi_dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29);
+ mipi_dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e);
+ mipi_dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31);
+ mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0xf7, 0x47);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x0a);
+ mipi_dsi_generic_write_seq(dsi, 0xf7, 0x02);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x17);
+ mipi_dsi_generic_write_seq(dsi, 0xf4, 0x60);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0xf9, 0x46);
+ mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11);
+ mipi_dsi_generic_write_seq(dsi, 0xf3, 0x01);
+ mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21);
+ mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
+ mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret < 0) {
@@ -268,7 +260,7 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx)
}
usleep_range(1000, 2000);
- dsi_generic_write_seq(dsi, 0x53, 0x24);
+ mipi_dsi_generic_write_seq(dsi, 0x53, 0x24);
return 0;
}
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 13/14] drm/panel-sony-tulip-truly-nt35521: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 13/14] drm/panel-sony-tulip-truly-nt35521: " Javier Martinez Canillas
@ 2023-01-02 18:51 ` Sam Ravnborg
0 siblings, 0 replies; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:51 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier,
On Wed, Dec 28, 2022 at 02:47:56AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> .../panel/panel-sony-tulip-truly-nt35521.c | 348 +++++++++---------
> 1 file changed, 170 insertions(+), 178 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
> index fa9be3c299c0..a0661576acff 100644
> --- a/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
> +++ b/drivers/gpu/drm/panel/panel-sony-tulip-truly-nt35521.c
> @@ -33,14 +33,6 @@ struct truly_nt35521 *to_truly_nt35521(struct drm_panel *panel)
> return container_of(panel, struct truly_nt35521, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, seq...) do { \
> - static const u8 d[] = { seq }; \
> - int ret; \
> - ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static void truly_nt35521_reset(struct truly_nt35521 *ctx)
> {
> gpiod_set_value_cansleep(ctx->reset_gpio, 1);
> @@ -59,200 +51,200 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx)
>
> dsi->mode_flags |= MIPI_DSI_MODE_LPM;
>
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> - dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
> - dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00);
> - dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00);
> - dsi_generic_write_seq(dsi, 0x6f, 0x01);
> - dsi_generic_write_seq(dsi, 0xb1, 0x21);
> - dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01);
> - dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02);
> - dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11);
> - dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xb6, 0x02);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
> - dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09);
> - dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09);
> - dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00);
> - dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00);
> - dsi_generic_write_seq(dsi, 0xca, 0x00);
> - dsi_generic_write_seq(dsi, 0xc0, 0x04);
> - dsi_generic_write_seq(dsi, 0xbe, 0xb5);
> - dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35);
> - dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25);
> - dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43);
> - dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02);
> - dsi_generic_write_seq(dsi, 0xee, 0x03);
> - dsi_generic_write_seq(dsi, 0xb0,
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x21);
> + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11);
> + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09);
> + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xca, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x04);
> + mipi_dsi_generic_write_seq(dsi, 0xbe, 0xb5);
> + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35);
> + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25);
> + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43);
> + mipi_dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xee, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xb0,
> 0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb6, 0x00, 0xc3,
> 0x00, 0xce, 0x00, 0xe1, 0x00, 0xf3, 0x01, 0x11);
Fix indent - here and elsewhere.
With this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> - dsi_generic_write_seq(dsi, 0xb1,
> + mipi_dsi_generic_write_seq(dsi, 0xb1,
> 0x01, 0x2e, 0x01, 0x5c, 0x01, 0x82, 0x01, 0xc3,
> 0x01, 0xfe, 0x02, 0x00, 0x02, 0x37, 0x02, 0x77);
> - dsi_generic_write_seq(dsi, 0xb2,
> + mipi_dsi_generic_write_seq(dsi, 0xb2,
> 0x02, 0xa1, 0x02, 0xd7, 0x02, 0xfe, 0x03, 0x2c,
> 0x03, 0x4b, 0x03, 0x63, 0x03, 0x8f, 0x03, 0x90);
> - dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98);
> - dsi_generic_write_seq(dsi, 0xb4,
> + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98);
> + mipi_dsi_generic_write_seq(dsi, 0xb4,
> 0x00, 0x81, 0x00, 0x8b, 0x00, 0x9c, 0x00, 0xa9,
> 0x00, 0xb5, 0x00, 0xcb, 0x00, 0xdf, 0x01, 0x02);
> - dsi_generic_write_seq(dsi, 0xb5,
> + mipi_dsi_generic_write_seq(dsi, 0xb5,
> 0x01, 0x1f, 0x01, 0x51, 0x01, 0x7a, 0x01, 0xbf,
> 0x01, 0xfa, 0x01, 0xfc, 0x02, 0x34, 0x02, 0x76);
> - dsi_generic_write_seq(dsi, 0xb6,
> + mipi_dsi_generic_write_seq(dsi, 0xb6,
> 0x02, 0x9f, 0x02, 0xd7, 0x02, 0xfc, 0x03, 0x2c,
> 0x03, 0x4a, 0x03, 0x63, 0x03, 0x8f, 0x03, 0xa2);
> - dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba);
> - dsi_generic_write_seq(dsi, 0xb8,
> + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba);
> + mipi_dsi_generic_write_seq(dsi, 0xb8,
> 0x00, 0x01, 0x00, 0x02, 0x00, 0x0e, 0x00, 0x2a,
> 0x00, 0x41, 0x00, 0x67, 0x00, 0x87, 0x00, 0xb9);
> - dsi_generic_write_seq(dsi, 0xb9,
> + mipi_dsi_generic_write_seq(dsi, 0xb9,
> 0x00, 0xe2, 0x01, 0x22, 0x01, 0x54, 0x01, 0xa3,
> 0x01, 0xe6, 0x01, 0xe7, 0x02, 0x24, 0x02, 0x67);
> - dsi_generic_write_seq(dsi, 0xba,
> + mipi_dsi_generic_write_seq(dsi, 0xba,
> 0x02, 0x93, 0x02, 0xcd, 0x02, 0xf6, 0x03, 0x31,
> 0x03, 0x6c, 0x03, 0xe9, 0x03, 0xef, 0x03, 0xf4);
> - dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
> - dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00);
> - dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00);
> - dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00);
> - dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00);
> - dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00);
> - dsi_generic_write_seq(dsi, 0xc4, 0x60);
> - dsi_generic_write_seq(dsi, 0xc5, 0xc0);
> - dsi_generic_write_seq(dsi, 0xc6, 0x00);
> - dsi_generic_write_seq(dsi, 0xc7, 0x00);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
> - dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06);
> - dsi_generic_write_seq(dsi, 0xb8, 0x00);
> - dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03);
> - dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03);
> - dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03);
> - dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03);
> - dsi_generic_write_seq(dsi, 0xc0, 0x0b);
> - dsi_generic_write_seq(dsi, 0xc1, 0x09);
> - dsi_generic_write_seq(dsi, 0xc2, 0xa6);
> - dsi_generic_write_seq(dsi, 0xc3, 0x05);
> - dsi_generic_write_seq(dsi, 0xc4, 0x00);
> - dsi_generic_write_seq(dsi, 0xc5, 0x02);
> - dsi_generic_write_seq(dsi, 0xc6, 0x22);
> - dsi_generic_write_seq(dsi, 0xc7, 0x03);
> - dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20);
> - dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20);
> - dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60);
> - dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60);
> - dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10);
> - dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10);
> - dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10);
> - dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10);
> - dsi_generic_write_seq(dsi, 0xd0,
> + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x60);
> + mipi_dsi_generic_write_seq(dsi, 0xc5, 0xc0);
> + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x0b);
> + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x09);
> + mipi_dsi_generic_write_seq(dsi, 0xc2, 0xa6);
> + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x05);
> + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xc5, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x22);
> + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x03);
> + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20);
> + mipi_dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20);
> + mipi_dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60);
> + mipi_dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60);
> + mipi_dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xd0,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xd5,
> + mipi_dsi_generic_write_seq(dsi, 0xd5,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xd6,
> + mipi_dsi_generic_write_seq(dsi, 0xd6,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xd7,
> + mipi_dsi_generic_write_seq(dsi, 0xd7,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xe5, 0x06);
> - dsi_generic_write_seq(dsi, 0xe6, 0x06);
> - dsi_generic_write_seq(dsi, 0xe7, 0x00);
> - dsi_generic_write_seq(dsi, 0xe8, 0x06);
> - dsi_generic_write_seq(dsi, 0xe9, 0x06);
> - dsi_generic_write_seq(dsi, 0xea, 0x06);
> - dsi_generic_write_seq(dsi, 0xeb, 0x00);
> - dsi_generic_write_seq(dsi, 0xec, 0x00);
> - dsi_generic_write_seq(dsi, 0xed, 0x30);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06);
> - dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e);
> - dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34);
> - dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a);
> - dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10);
> - dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16);
> - dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31);
> - dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08);
> - dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01);
> - dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19);
> - dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13);
> - dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29);
> - dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31);
> - dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d);
> - dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d);
> - dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34);
> - dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a);
> - dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19);
> - dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13);
> - dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01);
> - dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31);
> - dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08);
> - dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02);
> - dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10);
> - dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16);
> - dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29);
> - dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31);
> - dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e);
> - dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31);
> - dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xe7, 0x00);
> - dsi_generic_write_seq(dsi, 0x6f, 0x02);
> - dsi_generic_write_seq(dsi, 0xf7, 0x47);
> - dsi_generic_write_seq(dsi, 0x6f, 0x0a);
> - dsi_generic_write_seq(dsi, 0xf7, 0x02);
> - dsi_generic_write_seq(dsi, 0x6f, 0x17);
> - dsi_generic_write_seq(dsi, 0xf4, 0x60);
> - dsi_generic_write_seq(dsi, 0x6f, 0x01);
> - dsi_generic_write_seq(dsi, 0xf9, 0x46);
> - dsi_generic_write_seq(dsi, 0x6f, 0x11);
> - dsi_generic_write_seq(dsi, 0xf3, 0x01);
> - dsi_generic_write_seq(dsi, 0x35, 0x00);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> - dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> - dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21);
> - dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, 0x35, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xe5, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xe6, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xe8, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xe9, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xea, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xeb, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xec, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xed, 0x30);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06);
> + mipi_dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e);
> + mipi_dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34);
> + mipi_dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a);
> + mipi_dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16);
> + mipi_dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08);
> + mipi_dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19);
> + mipi_dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13);
> + mipi_dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29);
> + mipi_dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d);
> + mipi_dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d);
> + mipi_dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34);
> + mipi_dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a);
> + mipi_dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19);
> + mipi_dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13);
> + mipi_dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08);
> + mipi_dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10);
> + mipi_dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16);
> + mipi_dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29);
> + mipi_dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e);
> + mipi_dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31);
> + mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x47);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x0a);
> + mipi_dsi_generic_write_seq(dsi, 0xf7, 0x02);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x17);
> + mipi_dsi_generic_write_seq(dsi, 0xf4, 0x60);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0xf9, 0x46);
> + mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11);
> + mipi_dsi_generic_write_seq(dsi, 0xf3, 0x01);
> + mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21);
> + mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
> + mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
>
> ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> if (ret < 0) {
> @@ -268,7 +260,7 @@ static int truly_nt35521_on(struct truly_nt35521 *ctx)
> }
> usleep_range(1000, 2000);
>
> - dsi_generic_write_seq(dsi, 0x53, 0x24);
> + mipi_dsi_generic_write_seq(dsi, 0x53, 0x24);
>
> return 0;
> }
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 14/14] drm/panel-xinpeng-xpp055c272: Drop custom DSI write macro
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (12 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 13/14] drm/panel-sony-tulip-truly-nt35521: " Javier Martinez Canillas
@ 2022-12-28 1:47 ` Javier Martinez Canillas
2023-01-02 18:53 ` Sam Ravnborg
2023-01-02 19:00 ` [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Sam Ravnborg
14 siblings, 1 reply; 36+ messages in thread
From: Javier Martinez Canillas @ 2022-12-28 1:47 UTC (permalink / raw)
To: linux-kernel
Cc: Javier Martinez Canillas, Daniel Vetter, David Airlie,
Sam Ravnborg, Thierry Reding, dri-devel
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---
.../gpu/drm/panel/panel-xinpeng-xpp055c272.c | 44 ++++++++-----------
1 file changed, 18 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
index 2c54733ee241..230d87ba139a 100644
--- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
+++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
@@ -60,14 +60,6 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel)
return container_of(panel, struct xpp055c272, panel);
}
-#define dsi_generic_write_seq(dsi, cmd, seq...) do { \
- static const u8 b[] = { cmd, seq }; \
- int ret; \
- ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
- if (ret < 0) \
- return ret; \
- } while (0)
-
static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
@@ -77,37 +69,37 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
* Init sequence was supplied by the panel vendor without much
* documentation.
*/
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,
0x00, 0x00, 0x37);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
0x00, 0x00);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR,
0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
0x00);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ,
0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER,
0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
0x67, 0x77, 0x33, 0x33);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
0xff, 0x01, 0xff);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
msleep(20);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1,
0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,
0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
@@ -116,7 +108,7 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,
0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2,
0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,
0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
@@ -125,7 +117,7 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,
0xa0, 0x00, 0x00, 0x00, 0x00);
- dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
+ mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,
0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,
--
2.38.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [PATCH 14/14] drm/panel-xinpeng-xpp055c272: Drop custom DSI write macro
2022-12-28 1:47 ` [PATCH 14/14] drm/panel-xinpeng-xpp055c272: " Javier Martinez Canillas
@ 2023-01-02 18:53 ` Sam Ravnborg
2023-01-02 19:08 ` Javier Martinez Canillas
0 siblings, 1 reply; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 18:53 UTC (permalink / raw)
To: Javier Martinez Canillas; +Cc: linux-kernel, dri-devel, Thierry Reding
Hi Javier.
On Wed, Dec 28, 2022 at 02:47:57AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
>
> .../gpu/drm/panel/panel-xinpeng-xpp055c272.c | 44 ++++++++-----------
> 1 file changed, 18 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
> index 2c54733ee241..230d87ba139a 100644
> --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
> +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
> @@ -60,14 +60,6 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel)
> return container_of(panel, struct xpp055c272, panel);
> }
>
> -#define dsi_generic_write_seq(dsi, cmd, seq...) do { \
> - static const u8 b[] = { cmd, seq }; \
> - int ret; \
> - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
Notice that this is *dcs*
> - if (ret < 0) \
> - return ret; \
> - } while (0)
> -
> static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
> {
> struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
> @@ -77,37 +69,37 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
> * Init sequence was supplied by the panel vendor without much
> * documentation.
> */
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
This is wrong - here you should use mipi_dsi_dcs_write_seq()
Likewise for the rest of the file.
Sam
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
> 0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
> 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,
> 0x00, 0x00, 0x37);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF,
> 0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,
> 0x00, 0x00);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR,
> 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
> 0x00);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEQ,
> 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
> 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER,
> 0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,
> 0x67, 0x77, 0x33, 0x33);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,
> 0xff, 0x01, 0xff);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);
> msleep(20);
>
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP1,
> 0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,
> 0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,
> 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
> @@ -116,7 +108,7 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
> 0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,
> 0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGIP2,
> 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,
> 0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
> @@ -125,7 +117,7 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx)
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,
> 0xa0, 0x00, 0x00, 0x00, 0x00);
> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETGAMMA,
> 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,
> 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,
> 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 14/14] drm/panel-xinpeng-xpp055c272: Drop custom DSI write macro
2023-01-02 18:53 ` Sam Ravnborg
@ 2023-01-02 19:08 ` Javier Martinez Canillas
0 siblings, 0 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2023-01-02 19:08 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: linux-kernel, dri-devel, Thierry Reding
On 1/2/23 19:53, Sam Ravnborg wrote:
[...]
>> }
>>
>> -#define dsi_generic_write_seq(dsi, cmd, seq...) do { \
>> - static const u8 b[] = { cmd, seq }; \
>> - int ret; \
>> - ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
> Notice that this is *dcs*
>
I missed that! Thanks a lot for catching this inconsistency in the naming.
[...]
>> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
>> - dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI,
>> + mipi_dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);
> This is wrong - here you should use mipi_dsi_dcs_write_seq()
> Likewise for the rest of the file.
>
Agreed.
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros
2022-12-28 1:47 [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Javier Martinez Canillas
` (13 preceding siblings ...)
2022-12-28 1:47 ` [PATCH 14/14] drm/panel-xinpeng-xpp055c272: " Javier Martinez Canillas
@ 2023-01-02 19:00 ` Sam Ravnborg
2023-01-02 19:13 ` Javier Martinez Canillas
14 siblings, 1 reply; 36+ messages in thread
From: Sam Ravnborg @ 2023-01-02 19:00 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: linux-kernel, Ondrej Jirman, Purism Kernel Team,
Thomas Zimmermann, Guido Günther, Thierry Reding, dri-devel
Hi Javier.
On Wed, Dec 28, 2022 at 02:47:43AM +0100, Javier Martinez Canillas wrote:
> Hello,
>
> This series contains cleanups for DRM panel drivers that define their own
> DSI write macros instead of using what's already in <drm/drm_mipi_dsi.h>.
>
> The changes are quite trivial but I've only tested this with allmodconfig
> and `make M=drivers/gpu/drm/panel/` so please review and testing would be
> highly appreciated.
Nice cleanup - I like it.
In most of the patches there is some trivial indent that should be
fixed, I think I noted it everywhere.
Sorry - but no testing.
The last patch is buggy - see the comment.
I suggest to land patch 1 now (with the fix), this makes it easier for
others to test on top of drm-misc-next.
Sam
>
> Best regards,
> Javier
>
>
> Javier Martinez Canillas (14):
> drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro
> drm/panel-asus-z00t-tm5p5-n35596: Drop custom DSI write macros
> drm/panel-sitronix-st7703: Drop custom DSI write macros
> drm/panel-leadtek-ltk050h3146w: Drop custom DSI write macro
> drm/panel-elida-kd35t133: Drop custom DSI write macro
> drm/panel-boe-bf060y8m-aj0: Drop custom DSI write macro
> drm/panel-novatek-nt35950: Drop custom DSI write macro
> drm/panel-jdi-fhd-r63452: Drop custom DSI write macros
> drm/panel-samsung-s6e88a0-ams452ef01: Drop custom DSI write macro
> drm/panel-samsung-sofef00: Drop custom DSI write macro
> drm/panel-sharp-ls060t1sx01: Drop custom DSI write macro
> drm/panel-mantix-mlaf057we51: Drop custom DSI write macro
> drm/panel-sony-tulip-truly-nt35521: Drop custom DSI write macro
> drm/panel-xinpeng-xpp055c272: Drop custom DSI write macro
>
> .../drm/panel/panel-asus-z00t-tm5p5-n35596.c | 96 ++---
> .../gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 28 +-
> drivers/gpu/drm/panel/panel-elida-kd35t133.c | 34 +-
> drivers/gpu/drm/panel/panel-jdi-fhd-r63452.c | 50 +--
> .../drm/panel/panel-leadtek-ltk050h3146w.c | 64 ++--
> .../gpu/drm/panel/panel-mantix-mlaf057we51.c | 24 +-
> drivers/gpu/drm/panel/panel-novatek-nt35950.c | 14 +-
> .../panel/panel-samsung-s6e88a0-ams452ef01.c | 24 +-
> drivers/gpu/drm/panel/panel-samsung-sofef00.c | 24 +-
> .../gpu/drm/panel/panel-sharp-ls060t1sx01.c | 19 +-
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 83 ++---
> .../panel/panel-sony-tulip-truly-nt35521.c | 348 +++++++++---------
> .../gpu/drm/panel/panel-xinpeng-xpp055c272.c | 44 +--
> include/drm/drm_mipi_dsi.h | 16 +
> 14 files changed, 374 insertions(+), 494 deletions(-)
>
> --
> 2.38.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros
2023-01-02 19:00 ` [PATCH 00/14] drm/panel: Make panel drivers use existing DSI write macros Sam Ravnborg
@ 2023-01-02 19:13 ` Javier Martinez Canillas
0 siblings, 0 replies; 36+ messages in thread
From: Javier Martinez Canillas @ 2023-01-02 19:13 UTC (permalink / raw)
To: Sam Ravnborg
Cc: linux-kernel, Ondrej Jirman, Purism Kernel Team,
Thomas Zimmermann, Guido Günther, Thierry Reding, dri-devel
On 1/2/23 20:00, Sam Ravnborg wrote:
> Hi Javier.
>
> On Wed, Dec 28, 2022 at 02:47:43AM +0100, Javier Martinez Canillas wrote:
>> Hello,
>>
>> This series contains cleanups for DRM panel drivers that define their own
>> DSI write macros instead of using what's already in <drm/drm_mipi_dsi.h>.
>>
>> The changes are quite trivial but I've only tested this with allmodconfig
>> and `make M=drivers/gpu/drm/panel/` so please review and testing would be
>> highly appreciated.
>
> Nice cleanup - I like it.
Thanks.
> In most of the patches there is some trivial indent that should be
> fixed, I think I noted it everywhere.
>
Yup, I just used sed -i to modify in-place but the new macro _seq suffix
caused the wrong indent everywhere. I'll fix them in v2.
> Sorry - but no testing.
>
No worries, I also just build tested the drivers since I lack the HW but
the changes are pretty trivial so I expect no functional changes.
> The last patch is buggy - see the comment.
Indeed. Thanks for pointing that out! I completely missed that the macro
was different than the others.
> I suggest to land patch 1 now (with the fix), this makes it easier for
> others to test on top of drm-misc-next.
>
Agreed. I'll just post that one as a v2 and then the rest as a separate
series after pushing that to drm-misc-next.
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
^ permalink raw reply [flat|nested] 36+ messages in thread