* [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 19:03 ` Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces Konrad Dybcio
` (16 subsequent siblings)
17 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 67 ++++++++++++++++++++++-----
1 file changed, 55 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 2ceae73a6069..17e15a06254f 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -146,7 +146,7 @@ reserved-memory {
ranges;
rpm_msg_ram: memory@60000 {
- reg = <0x0 0x60000 0x0 0x6000>;
+ reg = <0x0 0x00060000 0x0 0x6000>;
no-map;
};
@@ -181,7 +181,7 @@ soc: soc {
prng: qrng@e1000 {
compatible = "qcom,prng-ee";
- reg = <0x0 0xe3000 0x0 0x1000>;
+ reg = <0x0 0x000e3000 0x0 0x1000>;
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
@@ -366,6 +366,49 @@ qpic_nand: nand-controller@79b0000 {
status = "disabled";
};
+ usb3: usb@8af8800 {
+ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
+ reg = <0x0 0x08af8800 0x0 0x400>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ clock-names = "cfg_noc",
+ "core",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <133330000>,
+ <133330000>,
+ <20000000>;
+
+ resets = <&gcc GCC_USB0_BCR>;
+ status = "disabled";
+
+ dwc_0: usb@8a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x08a00000 0x0 0xcd00>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_0>, <&usb0_ssphy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ clocks = <&xo>;
+ clock-names = "ref";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+ };
+ };
+
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
#address-cells = <2>;
@@ -388,7 +431,7 @@ v2m@0 {
pcie_phy: phy@84000 {
compatible = "qcom,ipq6018-qmp-pcie-phy";
- reg = <0x0 0x84000 0x0 0x1bc>; /* Serdes PLL */
+ reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
@@ -404,10 +447,10 @@ pcie_phy: phy@84000 {
"common";
pcie_phy0: phy@84200 {
- reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */
- <0x0 0x84400 0x0 0x200>, /* Serdes Rx */
- <0x0 0x84800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
- <0x0 0x84c00 0x0 0xf4>; /* pcs_misc */
+ reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
+ <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
+ <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
+ <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
@@ -623,7 +666,7 @@ mdio: mdio@90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
- reg = <0x0 0x90000 0x0 0x64>;
+ reg = <0x0 0x00090000 0x0 0x64>;
clocks = <&gcc GCC_MDIO_AHB_CLK>;
clock-names = "gcc_mdio_ahb_clk";
status = "disabled";
@@ -631,7 +674,7 @@ mdio: mdio@90000 {
qusb_phy_1: qusb@59000 {
compatible = "qcom,ipq6018-qusb2-phy";
- reg = <0x0 0x059000 0x0 0x180>;
+ reg = <0x0 0x00059000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
@@ -664,7 +707,7 @@ usb2: usb@70f8800 {
dwc_1: usb@7000000 {
compatible = "snps,dwc3";
- reg = <0x0 0x7000000 0x0 0xcd00>;
+ reg = <0x0 0x07000000 0x0 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
phys = <&qusb_phy_1>;
phy-names = "usb2-phy";
@@ -679,7 +722,7 @@ dwc_1: usb@7000000 {
ssphy_0: ssphy@78000 {
compatible = "qcom,ipq6018-qmp-usb3-phy";
- reg = <0x0 0x78000 0x0 0x1c4>;
+ reg = <0x0 0x00078000 0x0 0x1c4>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -708,7 +751,7 @@ usb0_ssphy: phy@78200 {
qusb_phy_0: qusb@79000 {
compatible = "qcom,ipq6018-qusb2-phy";
- reg = <0x0 0x079000 0x0 0x180>;
+ reg = <0x0 0x00079000 0x0 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
2022-12-31 12:58 ` [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Konrad Dybcio
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 12:58 ` [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly Konrad Dybcio
` (15 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
The dwc3 subnode was indented using spaces for some reason. Fix it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 17e15a06254f..4b74eee35971 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -706,17 +706,17 @@ usb2: usb@70f8800 {
status = "disabled";
dwc_1: usb@7000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0x07000000 0x0 0xcd00>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>;
- phy-names = "usb2-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- dr_mode = "host";
+ compatible = "snps,dwc3";
+ reg = <0x0 0x07000000 0x0 0xcd00>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_1>;
+ phy-names = "usb2-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
};
};
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
2022-12-31 12:58 ` [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Konrad Dybcio
2022-12-31 12:58 ` [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces Konrad Dybcio
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 12:58 ` [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Konrad Dybcio
` (14 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Order nodes by unit address if one exists and alphabetically otherwise.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 489 ++++++++++++--------------
1 file changed, 223 insertions(+), 266 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 4b74eee35971..2026000f3dc7 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -87,6 +87,12 @@ L2_0: l2-cache {
};
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq6018", "qcom,scm";
+ };
+ };
+
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@@ -123,12 +129,6 @@ opp-1800000000 {
};
};
- firmware {
- scm {
- compatible = "qcom,scm-ipq6018", "qcom,scm";
- };
- };
-
pmuv8: pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
@@ -166,6 +166,28 @@ q6_region: memory@4ab00000 {
};
};
+ rpm-glink {
+ compatible = "qcom,glink-rpm";
+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+ mboxes = <&apcs_glb 0>;
+
+ rpm_requests: glink-channel {
+ compatible = "qcom,rpm-ipq6018";
+ qcom,glink-channels = "rpm_requests";
+
+ regulators {
+ compatible = "qcom,rpm-mp5496-regulators";
+
+ ipq6018_s2: s2 {
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1062500>;
+ regulator-always-on;
+ };
+ };
+ };
+ };
+
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
@@ -179,6 +201,102 @@ soc: soc {
dma-ranges;
compatible = "simple-bus";
+ qusb_phy_1: qusb@59000 {
+ compatible = "qcom,ipq6018-qusb2-phy";
+ reg = <0x0 0x00059000 0x0 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
+ status = "disabled";
+ };
+
+ ssphy_0: ssphy@78000 {
+ compatible = "qcom,ipq6018-qmp-usb3-phy";
+ reg = <0x0 0x00078000 0x0 0x1c4>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&gcc GCC_USB0_AUX_CLK>,
+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
+ clock-names = "aux", "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_USB0_PHY_BCR>,
+ <&gcc GCC_USB3PHY_0_PHY_BCR>;
+ reset-names = "phy","common";
+ status = "disabled";
+
+ usb0_ssphy: phy@78200 {
+ reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
+ <0x0 0x00078400 0x0 0x200>, /* Rx */
+ <0x0 0x00078800 0x0 0x1f8>, /* PCS */
+ <0x0 0x00078600 0x0 0x044>; /* PCS misc */
+ #phy-cells = <0>;
+ #clock-cells = <0>;
+ clocks = <&gcc GCC_USB0_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_usb0_pipe_clk_src";
+ };
+ };
+
+ qusb_phy_0: qusb@79000 {
+ compatible = "qcom,ipq6018-qusb2-phy";
+ reg = <0x0 0x00079000 0x0 0x180>;
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
+ <&xo>;
+ clock-names = "cfg_ahb", "ref";
+
+ resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+ status = "disabled";
+ };
+
+ pcie_phy: phy@84000 {
+ compatible = "qcom,ipq6018-qmp-pcie-phy";
+ reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&gcc GCC_PCIE0_AUX_CLK>,
+ <&gcc GCC_PCIE0_AHB_CLK>;
+ clock-names = "aux", "cfg_ahb";
+
+ resets = <&gcc GCC_PCIE0_PHY_BCR>,
+ <&gcc GCC_PCIE0PHY_PHY_BCR>;
+ reset-names = "phy",
+ "common";
+
+ pcie_phy0: phy@84200 {
+ reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
+ <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
+ <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
+ <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_pcie0_pipe_clk_src";
+ #clock-cells = <0>;
+ };
+ };
+
+ mdio: mdio@90000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
+ reg = <0x0 0x00090000 0x0 0x64>;
+ clocks = <&gcc GCC_MDIO_AHB_CLK>;
+ clock-names = "gcc_mdio_ahb_clk";
+ status = "disabled";
+ };
+
prng: qrng@e1000 {
compatible = "qcom,prng-ee";
reg = <0x0 0x000e3000 0x0 0x1000>;
@@ -257,6 +375,41 @@ tcsr: syscon@1937000 {
reg = <0x0 0x01937000 0x0 0x21000>;
};
+ usb2: usb@70f8800 {
+ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
+ reg = <0x0 0x070F8800 0x0 0x400>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ clocks = <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_SLEEP_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ clock-names = "core",
+ "sleep",
+ "mock_utmi";
+
+ assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <133330000>,
+ <24000000>;
+ resets = <&gcc GCC_USB1_BCR>;
+ status = "disabled";
+
+ dwc_1: usb@7000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x07000000 0x0 0xcd00>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&qusb_phy_1>;
+ phy-names = "usb2-phy";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ dr_mode = "host";
+ };
+ };
+
blsp_dma: dma-controller@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x0 0x07884000 0x0 0x2b000>;
@@ -374,13 +527,13 @@ usb3: usb@8af8800 {
ranges;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -429,107 +582,6 @@ v2m@0 {
};
};
- pcie_phy: phy@84000 {
- compatible = "qcom,ipq6018-qmp-pcie-phy";
- reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&gcc GCC_PCIE0_AUX_CLK>,
- <&gcc GCC_PCIE0_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
-
- resets = <&gcc GCC_PCIE0_PHY_BCR>,
- <&gcc GCC_PCIE0PHY_PHY_BCR>;
- reset-names = "phy",
- "common";
-
- pcie_phy0: phy@84200 {
- reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
- <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
- <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
- <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "gcc_pcie0_pipe_clk_src";
- #clock-cells = <0>;
- };
- };
-
- pcie0: pci@20000000 {
- compatible = "qcom,pcie-ipq6018";
- reg = <0x0 0x20000000 0x0 0xf1d>,
- <0x0 0x20000f20 0x0 0xa8>,
- <0x0 0x20001000 0x0 0x1000>,
- <0x0 0x80000 0x0 0x4000>,
- <0x0 0x20100000 0x0 0x1000>;
- reg-names = "dbi", "elbi", "atu", "parf", "config";
-
- device_type = "pci";
- linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
- max-link-speed = <3>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- phys = <&pcie_phy0>;
- phy-names = "pciephy";
-
- ranges = <0x81000000 0 0x20200000 0 0x20200000
- 0 0x10000>, /* downstream I/O */
- <0x82000000 0 0x20220000 0 0x20220000
- 0 0xfde0000>; /* non-prefetchable memory */
-
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 75
- IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 78
- IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 79
- IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 83
- IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
- <&gcc GCC_PCIE0_AXI_M_CLK>,
- <&gcc GCC_PCIE0_AXI_S_CLK>,
- <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
- <&gcc PCIE0_RCHNG_CLK>;
- clock-names = "iface",
- "axi_m",
- "axi_s",
- "axi_bridge",
- "rchng";
-
- resets = <&gcc GCC_PCIE0_PIPE_ARES>,
- <&gcc GCC_PCIE0_SLEEP_ARES>,
- <&gcc GCC_PCIE0_CORE_STICKY_ARES>,
- <&gcc GCC_PCIE0_AXI_MASTER_ARES>,
- <&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
- <&gcc GCC_PCIE0_AHB_ARES>,
- <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
- <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
- reset-names = "pipe",
- "sleep",
- "sticky",
- "axi_m",
- "axi_s",
- "ahb",
- "axi_m_sticky",
- "axi_s_sticky";
-
- status = "disabled";
- };
-
watchdog@b017000 {
compatible = "qcom,kpss-wdt";
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
@@ -662,147 +714,74 @@ qrtr_requests {
};
};
- mdio: mdio@90000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
- reg = <0x0 0x00090000 0x0 0x64>;
- clocks = <&gcc GCC_MDIO_AHB_CLK>;
- clock-names = "gcc_mdio_ahb_clk";
- status = "disabled";
- };
-
- qusb_phy_1: qusb@59000 {
- compatible = "qcom,ipq6018-qusb2-phy";
- reg = <0x0 0x00059000 0x0 0x180>;
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
- <&xo>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
- status = "disabled";
- };
-
- usb2: usb@70f8800 {
- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
- reg = <0x0 0x070F8800 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clocks = <&gcc GCC_USB1_MASTER_CLK>,
- <&gcc GCC_USB1_SLEEP_CLK>,
- <&gcc GCC_USB1_MOCK_UTMI_CLK>;
- clock-names = "core",
- "sleep",
- "mock_utmi";
-
- assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
- <&gcc GCC_USB1_MOCK_UTMI_CLK>;
- assigned-clock-rates = <133330000>,
- <24000000>;
- resets = <&gcc GCC_USB1_BCR>;
- status = "disabled";
-
- dwc_1: usb@7000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0x07000000 0x0 0xcd00>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>;
- phy-names = "usb2-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- dr_mode = "host";
- };
- };
+ pcie0: pci@20000000 {
+ compatible = "qcom,pcie-ipq6018";
+ reg = <0x0 0x20000000 0x0 0xf1d>,
+ <0x0 0x20000f20 0x0 0xa8>,
+ <0x0 0x20001000 0x0 0x1000>,
+ <0x0 0x80000 0x0 0x4000>,
+ <0x0 0x20100000 0x0 0x1000>;
+ reg-names = "dbi", "elbi", "atu", "parf", "config";
- ssphy_0: ssphy@78000 {
- compatible = "qcom,ipq6018-qmp-usb3-phy";
- reg = <0x0 0x00078000 0x0 0x1c4>;
- #address-cells = <2>;
+ device_type = "pci";
+ linux,pci-domain = <0>;
+ bus-range = <0x00 0xff>;
+ num-lanes = <1>;
+ max-link-speed = <3>;
+ #address-cells = <3>;
#size-cells = <2>;
- ranges;
-
- clocks = <&gcc GCC_USB0_AUX_CLK>,
- <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
- clock-names = "aux", "cfg_ahb", "ref";
- resets = <&gcc GCC_USB0_PHY_BCR>,
- <&gcc GCC_USB3PHY_0_PHY_BCR>;
- reset-names = "phy","common";
- status = "disabled";
-
- usb0_ssphy: phy@78200 {
- reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
- <0x0 0x00078400 0x0 0x200>, /* Rx */
- <0x0 0x00078800 0x0 0x1f8>, /* PCS */
- <0x0 0x00078600 0x0 0x044>; /* PCS misc */
- #phy-cells = <0>;
- #clock-cells = <0>;
- clocks = <&gcc GCC_USB0_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "gcc_usb0_pipe_clk_src";
- };
- };
-
- qusb_phy_0: qusb@79000 {
- compatible = "qcom,ipq6018-qusb2-phy";
- reg = <0x0 0x00079000 0x0 0x180>;
- #phy-cells = <0>;
+ phys = <&pcie_phy0>;
+ phy-names = "pciephy";
- clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
- <&xo>;
- clock-names = "cfg_ahb", "ref";
+ ranges = <0x81000000 0 0x20200000 0 0x20200000
+ 0 0x10000>, /* downstream I/O */
+ <0x82000000 0 0x20220000 0 0x20220000
+ 0 0xfde0000>; /* non-prefetchable memory */
- resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
- status = "disabled";
- };
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
- usb3: usb@8af8800 {
- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
- reg = <0x0 0x8af8800 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc 0 75
+ IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc 0 78
+ IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc 0 79
+ IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc 0 83
+ IRQ_TYPE_LEVEL_HIGH>; /* int_d */
- clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
+ <&gcc GCC_PCIE0_AXI_M_CLK>,
+ <&gcc GCC_PCIE0_AXI_S_CLK>,
+ <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
+ <&gcc PCIE0_RCHNG_CLK>;
+ clock-names = "iface",
+ "axi_m",
+ "axi_s",
+ "axi_bridge",
+ "rchng";
- assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- assigned-clock-rates = <133330000>,
- <133330000>,
- <20000000>;
+ resets = <&gcc GCC_PCIE0_PIPE_ARES>,
+ <&gcc GCC_PCIE0_SLEEP_ARES>,
+ <&gcc GCC_PCIE0_CORE_STICKY_ARES>,
+ <&gcc GCC_PCIE0_AXI_MASTER_ARES>,
+ <&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
+ <&gcc GCC_PCIE0_AHB_ARES>,
+ <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
+ <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
+ reset-names = "pipe",
+ "sleep",
+ "sticky",
+ "axi_m",
+ "axi_s",
+ "ahb",
+ "axi_m_sticky",
+ "axi_s_sticky";
- resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
-
- dwc_0: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x0 0x8a00000 0x0 0xcd00>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&usb0_ssphy>;
- phy-names = "usb2-phy", "usb3-phy";
- clocks = <&xo>;
- clock-names = "ref";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- dr_mode = "host";
- };
};
};
@@ -837,26 +816,4 @@ wcss_smp2p_in: slave-kernel {
#interrupt-cells = <2>;
};
};
-
- rpm-glink {
- compatible = "qcom,glink-rpm";
- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
- mboxes = <&apcs_glb 0>;
-
- rpm_requests: glink-channel {
- compatible = "qcom,rpm-ipq6018";
- qcom,glink-channels = "rpm_requests";
-
- regulators {
- compatible = "qcom,rpm-mp5496-regulators";
-
- ipq6018_s2: s2 {
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1062500>;
- regulator-always-on;
- };
- };
- };
- };
};
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (2 preceding siblings ...)
2022-12-31 12:58 ` [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly Konrad Dybcio
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 19:04 ` Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Konrad Dybcio
` (13 subsequent siblings)
17 siblings, 1 reply; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some properties were not indented consistently. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 40 +++++++++++++--------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 2026000f3dc7..5452bb85f8e1 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -249,7 +249,7 @@ qusb_phy_0: qusb@79000 {
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
- <&xo>;
+ <&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
@@ -265,11 +265,11 @@ pcie_phy: phy@84000 {
ranges;
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
- <&gcc GCC_PCIE0_AHB_CLK>;
+ <&gcc GCC_PCIE0_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
- <&gcc GCC_PCIE0PHY_PHY_BCR>;
+ <&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
@@ -319,8 +319,8 @@ crypto: crypto@73a000 {
compatible = "qcom,crypto-v5.1";
reg = <0x0 0x0073a000 0x0 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
- <&gcc GCC_CRYPTO_AXI_CLK>,
- <&gcc GCC_CRYPTO_CLK>;
+ <&gcc GCC_CRYPTO_AXI_CLK>,
+ <&gcc GCC_CRYPTO_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 2>, <&cryptobam 3>;
dma-names = "rx", "tx";
@@ -425,7 +425,7 @@ blsp1_uart3: serial@78b1000 {
reg = <0x0 0x078b1000 0x0 0x200>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
@@ -438,7 +438,7 @@ blsp1_spi1: spi@78b5000 {
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 12>, <&blsp_dma 13>;
dma-names = "tx", "rx";
@@ -453,7 +453,7 @@ blsp1_spi2: spi@78b6000 {
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
@@ -511,8 +511,8 @@ qpic_nand: nand-controller@79b0000 {
clock-names = "core", "aon";
dmas = <&qpic_bam 0>,
- <&qpic_bam 1>,
- <&qpic_bam 2>;
+ <&qpic_bam 1>,
+ <&qpic_bam 2>;
dma-names = "tx", "rx", "cmd";
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
@@ -527,13 +527,13 @@ usb3: usb@8af8800 {
ranges;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -568,10 +568,10 @@ intc: interrupt-controller@b000000 {
#size-cells = <2>;
interrupt-controller;
#interrupt-cells = <0x3>;
- reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
- <0x0 0x0b002000 0x0 0x1000>, /*GICC*/
- <0x0 0x0b001000 0x0 0x1000>, /*GICH*/
- <0x0 0x0b004000 0x0 0x1000>; /*GICV*/
+ reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
+ <0x0 0x0b002000 0x0 0x1000>, /*GICC*/
+ <0x0 0x0b001000 0x0 0x1000>, /*GICH*/
+ <0x0 0x0b004000 0x0 0x1000>; /*GICV*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0 0xb00a000 0 0xffd>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (3 preceding siblings ...)
2022-12-31 12:58 ` [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Konrad Dybcio
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 12:58 ` [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex Konrad Dybcio
` (12 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some lines were broken very aggresively, presumably to fit under 80 chars
and some places could have used a newline, particularly between subsequent
nodes. Address all that and remove redundant comments near PCIe ranges
while at it so as not to exceed 100 chars needlessly.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++--------------
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 5452bb85f8e1..6b4f653239ab 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -102,26 +102,31 @@ opp-864000000 {
opp-microvolt = <725000>;
clock-latency-ns = <200000>;
};
+
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <787500>;
clock-latency-ns = <200000>;
};
+
opp-1320000000 {
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt = <862500>;
clock-latency-ns = <200000>;
};
+
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
opp-microvolt = <925000>;
clock-latency-ns = <200000>;
};
+
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <987500>;
clock-latency-ns = <200000>;
};
+
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1062500>;
@@ -131,8 +136,7 @@ opp-1800000000 {
pmuv8: pmu {
compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
- IRQ_TYPE_LEVEL_HIGH)>;
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
psci: psci {
@@ -734,24 +738,18 @@ pcie0: pci@20000000 {
phys = <&pcie_phy0>;
phy-names = "pciephy";
- ranges = <0x81000000 0 0x20200000 0 0x20200000
- 0 0x10000>, /* downstream I/O */
- <0x82000000 0 0x20220000 0 0x20220000
- 0 0xfde0000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>,
+ <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 75
- IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 78
- IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 79
- IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 83
- IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+ interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
<&gcc GCC_PCIE0_AXI_M_CLK>,
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (4 preceding siblings ...)
2022-12-31 12:58 ` [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Konrad Dybcio
@ 2022-12-31 12:58 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits Konrad Dybcio
` (11 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:58 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
One value escaped my previous lowercase hexification. Take care of it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 6b4f653239ab..8e95ed633071 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -381,7 +381,7 @@ tcsr: syscon@1937000 {
usb2: usb@70f8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
- reg = <0x0 0x070F8800 0x0 0x400>;
+ reg = <0x0 0x070f8800 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (5 preceding siblings ...)
2022-12-31 12:58 ` [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 08/18] arm64: dts: qcom: sm8150: " Konrad Dybcio
` (10 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 109c9d2b684d..a359ced4b6b4 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -1765,7 +1765,7 @@ usb_1_ssphy: usb3-phy@8903400 {
pmu@9091000 {
compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
- reg = <0 0x9091000 0 0x1000>;
+ reg = <0 0x09091000 0 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 08/18] arm64: dts: qcom: sm8150: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (6 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 09/18] arm64: dts: qcom: sm6350: " Konrad Dybcio
` (9 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 68 ++++++++++++++--------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 73f39bbeab13..f6b16c31e8b0 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -890,7 +890,7 @@ gcc: clock-controller@100000 {
gpi_dma0: dma-controller@800000 {
compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma";
- reg = <0 0x800000 0 0x60000>;
+ reg = <0 0x00800000 0 0x60000>;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
@@ -979,7 +979,7 @@ i2c0: i2c@880000 {
spi0: spi@880000 {
compatible = "qcom,geni-spi";
- reg = <0 0x880000 0 0x4000>;
+ reg = <0 0x00880000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
@@ -1013,7 +1013,7 @@ i2c1: i2c@884000 {
spi1: spi@884000 {
compatible = "qcom,geni-spi";
- reg = <0 0x884000 0 0x4000>;
+ reg = <0 0x00884000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
@@ -1047,7 +1047,7 @@ i2c2: i2c@888000 {
spi2: spi@888000 {
compatible = "qcom,geni-spi";
- reg = <0 0x888000 0 0x4000>;
+ reg = <0 0x00888000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
@@ -1081,7 +1081,7 @@ i2c3: i2c@88c000 {
spi3: spi@88c000 {
compatible = "qcom,geni-spi";
- reg = <0 0x88c000 0 0x4000>;
+ reg = <0 0x0088c000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
@@ -1115,7 +1115,7 @@ i2c4: i2c@890000 {
spi4: spi@890000 {
compatible = "qcom,geni-spi";
- reg = <0 0x890000 0 0x4000>;
+ reg = <0 0x00890000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
@@ -1149,7 +1149,7 @@ i2c5: i2c@894000 {
spi5: spi@894000 {
compatible = "qcom,geni-spi";
- reg = <0 0x894000 0 0x4000>;
+ reg = <0 0x00894000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
@@ -1183,7 +1183,7 @@ i2c6: i2c@898000 {
spi6: spi@898000 {
compatible = "qcom,geni-spi";
- reg = <0 0x898000 0 0x4000>;
+ reg = <0 0x00898000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
@@ -1217,7 +1217,7 @@ i2c7: i2c@89c000 {
spi7: spi@89c000 {
compatible = "qcom,geni-spi";
- reg = <0 0x89c000 0 0x4000>;
+ reg = <0 0x0089c000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
@@ -1236,7 +1236,7 @@ spi7: spi@89c000 {
gpi_dma1: dma-controller@a00000 {
compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma";
- reg = <0 0xa00000 0 0x60000>;
+ reg = <0 0x00a00000 0 0x60000>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
@@ -1287,7 +1287,7 @@ i2c8: i2c@a80000 {
spi8: spi@a80000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa80000 0 0x4000>;
+ reg = <0 0x00a80000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
@@ -1321,7 +1321,7 @@ i2c9: i2c@a84000 {
spi9: spi@a84000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa84000 0 0x4000>;
+ reg = <0 0x00a84000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
@@ -1355,7 +1355,7 @@ i2c10: i2c@a88000 {
spi10: spi@a88000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa88000 0 0x4000>;
+ reg = <0 0x00a88000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
@@ -1389,7 +1389,7 @@ i2c11: i2c@a8c000 {
spi11: spi@a8c000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa8c000 0 0x4000>;
+ reg = <0 0x00a8c000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
@@ -1432,7 +1432,7 @@ i2c12: i2c@a90000 {
spi12: spi@a90000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa90000 0 0x4000>;
+ reg = <0 0x00a90000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
@@ -1450,7 +1450,7 @@ spi12: spi@a90000 {
i2c16: i2c@94000 {
compatible = "qcom,geni-i2c";
- reg = <0 0x0094000 0 0x4000>;
+ reg = <0 0x00094000 0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
@@ -1466,7 +1466,7 @@ i2c16: i2c@94000 {
spi16: spi@a94000 {
compatible = "qcom,geni-spi";
- reg = <0 0xa94000 0 0x4000>;
+ reg = <0 0x00a94000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
@@ -1485,7 +1485,7 @@ spi16: spi@a94000 {
gpi_dma2: dma-controller@c00000 {
compatible = "qcom,sm8150-gpi-dma", "qcom,sdm845-gpi-dma";
- reg = <0 0xc00000 0 0x60000>;
+ reg = <0 0x00c00000 0 0x60000>;
interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
@@ -1537,7 +1537,7 @@ i2c17: i2c@c80000 {
spi17: spi@c80000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc80000 0 0x4000>;
+ reg = <0 0x00c80000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
@@ -1571,7 +1571,7 @@ i2c18: i2c@c84000 {
spi18: spi@c84000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc84000 0 0x4000>;
+ reg = <0 0x00c84000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
@@ -1605,7 +1605,7 @@ i2c19: i2c@c88000 {
spi19: spi@c88000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc88000 0 0x4000>;
+ reg = <0 0x00c88000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
@@ -1639,7 +1639,7 @@ i2c13: i2c@c8c000 {
spi13: spi@c8c000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc8c000 0 0x4000>;
+ reg = <0 0x00c8c000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
@@ -1673,7 +1673,7 @@ i2c14: i2c@c90000 {
spi14: spi@c90000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc90000 0 0x4000>;
+ reg = <0 0x00c90000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
@@ -1707,7 +1707,7 @@ i2c15: i2c@c94000 {
spi15: spi@c94000 {
compatible = "qcom,geni-spi";
- reg = <0 0xc94000 0 0x4000>;
+ reg = <0 0x00c94000 0 0x4000>;
reg-names = "se";
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
@@ -1864,10 +1864,10 @@ pcie0_phy: phy@1c06000 {
status = "disabled";
pcie0_lane: phy@1c06200 {
- reg = <0 0x1c06200 0 0x170>, /* tx */
- <0 0x1c06400 0 0x200>, /* rx */
- <0 0x1c06800 0 0x1f0>, /* pcs */
- <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */
+ reg = <0 0x01c06200 0 0x170>, /* tx */
+ <0 0x01c06400 0 0x200>, /* rx */
+ <0 0x01c06800 0 0x1f0>, /* pcs */
+ <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
@@ -1963,12 +1963,12 @@ pcie1_phy: phy@1c0e000 {
status = "disabled";
pcie1_lane: phy@1c0e200 {
- reg = <0 0x1c0e200 0 0x170>, /* tx0 */
- <0 0x1c0e400 0 0x200>, /* rx0 */
- <0 0x1c0ea00 0 0x1f0>, /* pcs */
- <0 0x1c0e600 0 0x170>, /* tx1 */
- <0 0x1c0e800 0 0x200>, /* rx1 */
- <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
+ reg = <0 0x01c0e200 0 0x170>, /* tx0 */
+ <0 0x01c0e400 0 0x200>, /* rx0 */
+ <0 0x01c0ea00 0 0x1f0>, /* pcs */
+ <0 0x01c0e600 0 0x170>, /* tx1 */
+ <0 0x01c0e800 0 0x200>, /* rx1 */
+ <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe0";
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 09/18] arm64: dts: qcom: sm6350: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (7 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 08/18] arm64: dts: qcom: sm8150: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 10/18] arm64: dts: qcom: sdm845: " Konrad Dybcio
` (8 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8944dcbbe3a2..e71ffc31d41e 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -557,7 +557,7 @@ gpi_dma0: dma-controller@800000 {
qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
- reg = <0x0 0x8c0000 0x0 0x2000>;
+ reg = <0x0 0x008c0000 0x0 0x2000>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
@@ -630,7 +630,7 @@ gpi_dma1: dma-controller@900000 {
qupv3_id_1: geniqup@9c0000 {
compatible = "qcom,geni-se-qup";
- reg = <0x0 0x9c0000 0x0 0x2000>;
+ reg = <0x0 0x009c0000 0x0 0x2000>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
@@ -702,7 +702,7 @@ i2c8: i2c@988000 {
uart9: serial@98c000 {
compatible = "qcom,geni-debug-uart";
- reg = <0 0x98c000 0 0x4000>;
+ reg = <0 0x0098c000 0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
pinctrl-names = "default";
@@ -1654,11 +1654,11 @@ aoss_qmp: power-controller@c300000 {
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
- reg = <0 0xc440000 0 0x1100>,
- <0 0xc600000 0 0x2000000>,
- <0 0xe600000 0 0x100000>,
- <0 0xe700000 0 0xa0000>,
- <0 0xc40a000 0 0x26000>;
+ reg = <0 0x0c440000 0 0x1100>,
+ <0 0x0c600000 0 0x2000000>,
+ <0 0x0e600000 0 0x100000>,
+ <0 0x0e700000 0 0xa0000>,
+ <0 0x0c40a000 0 0x26000>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 10/18] arm64: dts: qcom: sdm845: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (8 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 09/18] arm64: dts: qcom: sm6350: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 11/18] arm64: dts: qcom: sm8250: " Konrad Dybcio
` (7 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 46 ++++++++++++++--------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 154f5054a200..44bb3509df62 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2585,9 +2585,9 @@ ipa: ipa@1e40000 {
iommus = <&apps_smmu 0x720 0x0>,
<&apps_smmu 0x722 0x0>;
- reg = <0 0x1e40000 0 0x7000>,
- <0 0x1e47000 0 0x2000>,
- <0 0x1e04000 0 0x2c000>;
+ reg = <0 0x01e40000 0 0x7000>,
+ <0 0x01e47000 0 0x2000>,
+ <0 0x01e04000 0 0x2c000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@@ -4237,16 +4237,16 @@ videocc: clock-controller@ab00000 {
camss: camss@a00000 {
compatible = "qcom,sdm845-camss";
- reg = <0 0xacb3000 0 0x1000>,
- <0 0xacba000 0 0x1000>,
- <0 0xacc8000 0 0x1000>,
- <0 0xac65000 0 0x1000>,
- <0 0xac66000 0 0x1000>,
- <0 0xac67000 0 0x1000>,
- <0 0xac68000 0 0x1000>,
- <0 0xacaf000 0 0x4000>,
- <0 0xacb6000 0 0x4000>,
- <0 0xacc4000 0 0x4000>;
+ reg = <0 0x0acb3000 0 0x1000>,
+ <0 0x0acba000 0 0x1000>,
+ <0 0x0acc8000 0 0x1000>,
+ <0 0x0ac65000 0 0x1000>,
+ <0 0x0ac66000 0 0x1000>,
+ <0 0x0ac67000 0 0x1000>,
+ <0 0x0ac68000 0 0x1000>,
+ <0 0x0acaf000 0 0x4000>,
+ <0 0x0acb6000 0 0x4000>,
+ <0 0x0acc4000 0 0x4000>;
reg-names = "csid0",
"csid1",
"csid2",
@@ -4575,11 +4575,11 @@ mdss_dp: displayport-controller@ae90000 {
status = "disabled";
compatible = "qcom,sdm845-dp";
- reg = <0 0xae90000 0 0x200>,
- <0 0xae90200 0 0x200>,
- <0 0xae90400 0 0x600>,
- <0 0xae90a00 0 0x600>,
- <0 0xae91000 0 0x600>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0x600>,
+ <0 0x0ae90a00 0 0x600>,
+ <0 0x0ae91000 0 0x600>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@@ -4788,7 +4788,7 @@ dsi1_phy: phy@ae96400 {
gpu: gpu@5000000 {
compatible = "qcom,adreno-630.2", "qcom,adreno";
- reg = <0 0x5000000 0 0x40000>, <0 0x509e000 0 0x10>;
+ reg = <0 0x05000000 0 0x40000>, <0 0x509e000 0 0x10>;
reg-names = "kgsl_3d0_reg_memory", "cx_mem";
/*
@@ -4858,7 +4858,7 @@ opp-257000000 {
adreno_smmu: iommu@5040000 {
compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";
- reg = <0 0x5040000 0 0x10000>;
+ reg = <0 0x05040000 0 0x10000>;
#iommu-cells = <1>;
#global-interrupts = <2>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
@@ -4881,9 +4881,9 @@ adreno_smmu: iommu@5040000 {
gmu: gmu@506a000 {
compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
- reg = <0 0x506a000 0 0x30000>,
- <0 0xb280000 0 0x10000>,
- <0 0xb480000 0 0x10000>;
+ reg = <0 0x0506a000 0 0x30000>,
+ <0 0x0b280000 0 0x10000>,
+ <0 0x0b480000 0 0x10000>;
reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 11/18] arm64: dts: qcom: sm8250: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (9 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 10/18] arm64: dts: qcom: sdm845: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 12/18] arm64: dts: qcom: sm8350: " Konrad Dybcio
` (6 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 54 ++++++++++++++--------------
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 0b6a6a809503..a642ff1af094 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1899,10 +1899,10 @@ pcie0_phy: phy@1c06000 {
status = "disabled";
pcie0_lane: phy@1c06200 {
- reg = <0 0x1c06200 0 0x170>, /* tx */
- <0 0x1c06400 0 0x200>, /* rx */
- <0 0x1c06800 0 0x1f0>, /* pcs */
- <0 0x1c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */
+ reg = <0 0x01c06200 0 0x170>, /* tx */
+ <0 0x01c06400 0 0x200>, /* rx */
+ <0 0x01c06800 0 0x1f0>, /* pcs */
+ <0 0x01c06c00 0 0xf4>; /* "pcs_lane" same as pcs_misc? */
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
@@ -2005,12 +2005,12 @@ pcie1_phy: phy@1c0e000 {
status = "disabled";
pcie1_lane: phy@1c0e200 {
- reg = <0 0x1c0e200 0 0x170>, /* tx0 */
- <0 0x1c0e400 0 0x200>, /* rx0 */
- <0 0x1c0ea00 0 0x1f0>, /* pcs */
- <0 0x1c0e600 0 0x170>, /* tx1 */
- <0 0x1c0e800 0 0x200>, /* rx1 */
- <0 0x1c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
+ reg = <0 0x01c0e200 0 0x170>, /* tx0 */
+ <0 0x01c0e400 0 0x200>, /* rx0 */
+ <0 0x01c0ea00 0 0x1f0>, /* pcs */
+ <0 0x01c0e600 0 0x170>, /* tx1 */
+ <0 0x01c0e800 0 0x200>, /* rx1 */
+ <0 0x01c0ee00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe0";
@@ -2094,7 +2094,7 @@ pcie2: pci@1c10000 {
pcie2_phy: phy@1c16000 {
compatible = "qcom,sm8250-qmp-modem-pcie-phy";
- reg = <0 0x1c16000 0 0x1c0>;
+ reg = <0 0x01c16000 0 0x1c0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -2113,12 +2113,12 @@ pcie2_phy: phy@1c16000 {
status = "disabled";
pcie2_lane: phy@1c16200 {
- reg = <0 0x1c16200 0 0x170>, /* tx0 */
- <0 0x1c16400 0 0x200>, /* rx0 */
- <0 0x1c16a00 0 0x1f0>, /* pcs */
- <0 0x1c16600 0 0x170>, /* tx1 */
- <0 0x1c16800 0 0x200>, /* rx1 */
- <0 0x1c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
+ reg = <0 0x01c16200 0 0x170>, /* tx0 */
+ <0 0x01c16400 0 0x200>, /* rx0 */
+ <0 0x01c16a00 0 0x1f0>, /* pcs */
+ <0 0x01c16600 0 0x170>, /* tx1 */
+ <0 0x01c16800 0 0x200>, /* rx1 */
+ <0 0x01c16e00 0 0xf4>; /* "pcs_com" same as pcs_misc? */
clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
clock-names = "pipe0";
@@ -3792,16 +3792,16 @@ camss: camss@ac6a000 {
compatible = "qcom,sm8250-camss";
status = "disabled";
- reg = <0 0xac6a000 0 0x2000>,
- <0 0xac6c000 0 0x2000>,
- <0 0xac6e000 0 0x1000>,
- <0 0xac70000 0 0x1000>,
- <0 0xac72000 0 0x1000>,
- <0 0xac74000 0 0x1000>,
- <0 0xacb4000 0 0xd000>,
- <0 0xacc3000 0 0xd000>,
- <0 0xacd9000 0 0x2200>,
- <0 0xacdb200 0 0x2200>;
+ reg = <0 0x0ac6a000 0 0x2000>,
+ <0 0x0ac6c000 0 0x2000>,
+ <0 0x0ac6e000 0 0x1000>,
+ <0 0x0ac70000 0 0x1000>,
+ <0 0x0ac72000 0 0x1000>,
+ <0 0x0ac74000 0 0x1000>,
+ <0 0x0acb4000 0 0xd000>,
+ <0 0x0acc3000 0 0xd000>,
+ <0 0x0acd9000 0 0x2200>,
+ <0 0x0acdb200 0 0x2200>;
reg-names = "csiphy0",
"csiphy1",
"csiphy2",
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 12/18] arm64: dts: qcom: sm8350: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (10 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 11/18] arm64: dts: qcom: sm8250: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 13/18] arm64: dts: qcom: sc7180: " Konrad Dybcio
` (5 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 067613ca9c03..5f191ebbf724 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1598,9 +1598,9 @@ ipa: ipa@1e40000 {
iommus = <&apps_smmu 0x5c0 0x0>,
<&apps_smmu 0x5c2 0x0>;
- reg = <0 0x1e40000 0 0x8000>,
- <0 0x1e50000 0 0x4b20>,
- <0 0x1e04000 0 0x23000>;
+ reg = <0 0x01e40000 0 0x8000>,
+ <0 0x01e50000 0 0x4b20>,
+ <0 0x01e04000 0 0x23000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@@ -1731,11 +1731,11 @@ sram@c3f0000 {
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
- reg = <0x0 0xc440000 0x0 0x1100>,
- <0x0 0xc600000 0x0 0x2000000>,
- <0x0 0xe600000 0x0 0x100000>,
- <0x0 0xe700000 0x0 0xa0000>,
- <0x0 0xc40a000 0x0 0x26000>;
+ reg = <0x0 0x0c440000 0x0 0x1100>,
+ <0x0 0x0c600000 0x0 0x2000000>,
+ <0x0 0x0e600000 0x0 0x100000>,
+ <0x0 0x0e700000 0x0 0xa0000>,
+ <0x0 0x0c40a000 0x0 0x26000>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 13/18] arm64: dts: qcom: sc7180: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (11 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 12/18] arm64: dts: qcom: sm8350: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 14/18] arm64: dts: qcom: sc7280: " Konrad Dybcio
` (4 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index f71cf21a8dd8..67b9ae3eff83 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -690,8 +690,8 @@ gpu_speed_bin: gpu_speed_bin@1d2 {
sdhc_1: mmc@7c4000 {
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
- reg = <0 0x7c4000 0 0x1000>,
- <0 0x07c5000 0 0x1000>;
+ reg = <0 0x007c4000 0 0x1000>,
+ <0 0x007c5000 0 0x1000>;
reg-names = "hc", "cqhci";
iommus = <&apps_smmu 0x60 0x0>;
@@ -1421,9 +1421,9 @@ ipa: ipa@1e40000 {
iommus = <&apps_smmu 0x440 0x0>,
<&apps_smmu 0x442 0x0>;
- reg = <0 0x1e40000 0 0x7000>,
- <0 0x1e47000 0 0x2000>,
- <0 0x1e04000 0 0x2c000>;
+ reg = <0 0x01e40000 0 0x7000>,
+ <0 0x01e47000 0 0x2000>,
+ <0 0x01e04000 0 0x2c000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@@ -3116,11 +3116,11 @@ mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7180-dp";
status = "disabled";
- reg = <0 0xae90000 0 0x200>,
- <0 0xae90200 0 0x200>,
- <0 0xae90400 0 0xc00>,
- <0 0xae91000 0 0x400>,
- <0 0xae91400 0 0x400>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0xc00>,
+ <0 0x0ae91000 0 0x400>,
+ <0 0x0ae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 14/18] arm64: dts: qcom: sc7280: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (12 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 13/18] arm64: dts: qcom: sc7180: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: " Konrad Dybcio
` (3 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 46 ++++++++++++++--------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 0adf13399e64..cbf571baca9b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2171,9 +2171,9 @@ ipa: ipa@1e40000 {
iommus = <&apps_smmu 0x480 0x0>,
<&apps_smmu 0x482 0x0>;
- reg = <0 0x1e40000 0 0x8000>,
- <0 0x1e50000 0 0x4ad0>,
- <0 0x1e04000 0 0x23000>;
+ reg = <0 0x01e40000 0 0x8000>,
+ <0 0x01e50000 0 0x4ad0>,
+ <0 0x01e04000 0 0x23000>;
reg-names = "ipa-reg",
"ipa-shared",
"gsi";
@@ -2455,7 +2455,7 @@ lpass_cpu: audio@3987000 {
lpass_hm: clock-controller@3c00000 {
compatible = "qcom,sc7280-lpasshm";
- reg = <0 0x3c00000 0 0x28>;
+ reg = <0 0x03c00000 0 0x28>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "bi_tcxo";
#clock-cells = <1>;
@@ -3489,7 +3489,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
pmu@9091000 {
compatible = "qcom,sc7280-llcc-bwmon";
- reg = <0 0x9091000 0 0x1000>;
+ reg = <0 0x09091000 0 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@@ -3571,7 +3571,7 @@ dc_noc: interconnect@90e0000 {
};
gem_noc: interconnect@9100000 {
- reg = <0 0x9100000 0 0xe2200>;
+ reg = <0 0x09100000 0 0xe2200>;
compatible = "qcom,sc7280-gem-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
@@ -3586,8 +3586,8 @@ system-cache-controller@9200000 {
eud: eud@88e0000 {
compatible = "qcom,sc7280-eud","qcom,eud";
- reg = <0 0x88e0000 0 0x2000>,
- <0 0x88e2000 0 0x1000>;
+ reg = <0 0x088e0000 0 0x2000>,
+ <0 0x088e2000 0 0x1000>;
interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>;
ports {
port@0 {
@@ -3750,7 +3750,7 @@ opp-460000048 {
videocc: clock-controller@aaf0000 {
compatible = "qcom,sc7280-videocc";
- reg = <0 0xaaf0000 0 0x10000>;
+ reg = <0 0x0aaf0000 0 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>;
clock-names = "bi_tcxo", "bi_tcxo_ao";
@@ -3773,7 +3773,7 @@ camcc: clock-controller@ad00000 {
dispcc: clock-controller@af00000 {
compatible = "qcom,sc7280-dispcc";
- reg = <0 0xaf00000 0 0x20000>;
+ reg = <0 0x0af00000 0 0x20000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&mdss_dsi_phy 0>,
@@ -4001,10 +4001,10 @@ mdss_edp: edp@aea0000 {
pinctrl-names = "default";
pinctrl-0 = <&edp_hot_plug_det>;
- reg = <0 0xaea0000 0 0x200>,
- <0 0xaea0200 0 0x200>,
- <0 0xaea0400 0 0xc00>,
- <0 0xaea1000 0 0x400>;
+ reg = <0 0x0aea0000 0 0x200>,
+ <0 0x0aea0200 0 0x200>,
+ <0 0x0aea0400 0 0xc00>,
+ <0 0x0aea1000 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <14>;
@@ -4076,10 +4076,10 @@ opp-810000000 {
mdss_edp_phy: phy@aec2a00 {
compatible = "qcom,sc7280-edp-phy";
- reg = <0 0xaec2a00 0 0x19c>,
- <0 0xaec2200 0 0xa0>,
- <0 0xaec2600 0 0xa0>,
- <0 0xaec2000 0 0x1c0>;
+ reg = <0 0x0aec2a00 0 0x19c>,
+ <0 0x0aec2200 0 0xa0>,
+ <0 0x0aec2600 0 0xa0>,
+ <0 0x0aec2000 0 0x1c0>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_EDP_CLKREF_EN>;
@@ -4095,11 +4095,11 @@ mdss_edp_phy: phy@aec2a00 {
mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7280-dp";
- reg = <0 0xae90000 0 0x200>,
- <0 0xae90200 0 0x200>,
- <0 0xae90400 0 0xc00>,
- <0 0xae91000 0 0x400>,
- <0 0xae91400 0 0x400>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0xc00>,
+ <0 0x0ae91000 0 0x400>,
+ <0 0x0ae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (13 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 14/18] arm64: dts: qcom: sc7280: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 16/18] arm64: dts: qcom: sm8450: " Konrad Dybcio
` (2 subsequent siblings)
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../dts/qcom/msm8994-msft-lumia-octagon.dtsi | 52 +++++++++----------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
index 9b67f0d3820c..4520a7e86d5b 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
@@ -127,98 +127,98 @@ reserved-memory {
*/
uefi_mem: memory@200000 {
- reg = <0 0x200000 0 0x100000>;
+ reg = <0 0x00200000 0 0x100000>;
no-map;
};
mppark_mem: memory@300000 {
- reg = <0 0x300000 0 0x80000>;
+ reg = <0 0x00300000 0 0x80000>;
no-map;
};
fbpt_mem: memory@380000 {
- reg = <0 0x380000 0 0x1000>;
+ reg = <0 0x00380000 0 0x1000>;
no-map;
};
dbg2_mem: memory@381000 {
- reg = <0 0x381000 0 0x4000>;
+ reg = <0 0x00381000 0 0x4000>;
no-map;
};
capsule_mem: memory@385000 {
- reg = <0 0x385000 0 0x1000>;
+ reg = <0 0x00385000 0 0x1000>;
no-map;
};
tpmctrl_mem: memory@386000 {
- reg = <0 0x386000 0 0x3000>;
+ reg = <0 0x00386000 0 0x3000>;
no-map;
};
uefiinfo_mem: memory@389000 {
- reg = <0 0x389000 0 0x1000>;
+ reg = <0 0x00389000 0 0x1000>;
no-map;
};
reset_mem: memory@389000 {
- reg = <0 0x389000 0 0x1000>;
+ reg = <0 0x00389000 0 0x1000>;
no-map;
};
resuncached_mem: memory@38e000 {
- reg = <0 0x38e000 0 0x72000>;
+ reg = <0 0x0038e000 0 0x72000>;
no-map;
};
disp_mem: memory@400000 {
- reg = <0 0x400000 0 0x800000>;
+ reg = <0 0x00400000 0 0x800000>;
no-map;
};
uefistack_mem: memory@c00000 {
- reg = <0 0xc00000 0 0x40000>;
+ reg = <0 0x00c00000 0 0x40000>;
no-map;
};
cpuvect_mem: memory@c40000 {
- reg = <0 0xc40000 0 0x10000>;
+ reg = <0 0x00c40000 0 0x10000>;
no-map;
};
rescached_mem: memory@400000 {
- reg = <0 0xc50000 0 0xb0000>;
+ reg = <0 0x00c50000 0 0xb0000>;
no-map;
};
tzapps_mem: memory@6500000 {
- reg = <0 0x6500000 0 0x500000>;
+ reg = <0 0x06500000 0 0x500000>;
no-map;
};
smem_mem: memory@6a00000 {
- reg = <0 0x6a00000 0 0x200000>;
+ reg = <0 0x06a00000 0 0x200000>;
no-map;
};
hyp_mem: memory@6c00000 {
- reg = <0 0x6c00000 0 0x100000>;
+ reg = <0 0x06c00000 0 0x100000>;
no-map;
};
tz_mem: memory@6d00000 {
- reg = <0 0x6d00000 0 0x160000>;
+ reg = <0 0x06d00000 0 0x160000>;
no-map;
};
rfsa_adsp_mem: memory@6e60000 {
- reg = <0 0x6e60000 0 0x10000>;
+ reg = <0 0x06e60000 0 0x10000>;
no-map;
};
rfsa_mpss_mem: memory@6e70000 {
compatible = "qcom,rmtfs-mem";
- reg = <0 0x6e70000 0 0x10000>;
+ reg = <0 0x06e70000 0 0x10000>;
no-map;
qcom,client-id = <1>;
@@ -229,7 +229,7 @@ rfsa_mpss_mem: memory@6e70000 {
* MPSS_EFS / SBL
*/
mba_mem: memory@6e80000 {
- reg = <0 0x6e80000 0 0x180000>;
+ reg = <0 0x06e80000 0 0x180000>;
no-map;
};
@@ -239,33 +239,33 @@ mba_mem: memory@6e80000 {
*/
mpss_mem: memory@7000000 {
- reg = <0 0x7000000 0 0x5a00000>;
+ reg = <0 0x07000000 0 0x5a00000>;
no-map;
};
adsp_mem: memory@ca00000 {
- reg = <0 0xca00000 0 0x1800000>;
+ reg = <0 0x0ca00000 0 0x1800000>;
no-map;
};
venus_mem: memory@e200000 {
- reg = <0 0xe200000 0 0x500000>;
+ reg = <0 0x0e200000 0 0x500000>;
no-map;
};
pil_metadata_mem: memory@e700000 {
- reg = <0 0xe700000 0 0x4000>;
+ reg = <0 0x0e700000 0 0x4000>;
no-map;
};
memory@e704000 {
- reg = <0 0xe704000 0 0x7fc000>;
+ reg = <0 0x0e704000 0 0x7fc000>;
no-map;
};
/* Peripheral Image loader region end */
cnss_mem: memory@ef00000 {
- reg = <0 0xef00000 0 0x300000>;
+ reg = <0 0x0ef00000 0 0x300000>;
no-map;
};
};
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 16/18] arm64: dts: qcom: sm8450: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (14 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 18/18] arm64: dts: qcom: sm6115: " Konrad Dybcio
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 48 ++++++++++++++--------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 2194bbac8ee0..bca859cde31c 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -743,7 +743,7 @@ gcc: clock-controller@100000 {
gpi_dma2: dma-controller@800000 {
compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma";
#dma-cells = <3>;
- reg = <0 0x800000 0 0x60000>;
+ reg = <0 0x00800000 0 0x60000>;
interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
@@ -1064,7 +1064,7 @@ spi21: spi@898000 {
gpi_dma0: dma-controller@900000 {
compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma";
#dma-cells = <3>;
- reg = <0 0x900000 0 0x60000>;
+ reg = <0 0x00900000 0 0x60000>;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
@@ -1345,7 +1345,7 @@ spi5: spi@994000 {
i2c6: i2c@998000 {
compatible = "qcom,geni-i2c";
- reg = <0x0 0x998000 0x0 0x4000>;
+ reg = <0x0 0x00998000 0x0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
pinctrl-names = "default";
@@ -1365,7 +1365,7 @@ i2c6: i2c@998000 {
spi6: spi@998000 {
compatible = "qcom,geni-spi";
- reg = <0x0 0x998000 0x0 0x4000>;
+ reg = <0x0 0x00998000 0x0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
@@ -1400,7 +1400,7 @@ uart7: serial@99c000 {
gpi_dma1: dma-controller@a00000 {
compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma";
#dma-cells = <3>;
- reg = <0 0xa00000 0 0x60000>;
+ reg = <0 0x00a00000 0 0x60000>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
@@ -1810,10 +1810,10 @@ pcie0_phy: phy@1c06000 {
status = "disabled";
pcie0_lane: phy@1c06200 {
- reg = <0 0x1c06e00 0 0x200>, /* tx */
- <0 0x1c07000 0 0x200>, /* rx */
- <0 0x1c06200 0 0x200>, /* pcs */
- <0 0x1c06600 0 0x200>; /* pcs_pcie */
+ reg = <0 0x01c06e00 0 0x200>, /* tx */
+ <0 0x01c07000 0 0x200>, /* rx */
+ <0 0x01c06200 0 0x200>, /* pcs */
+ <0 0x01c06600 0 0x200>; /* pcs_pcie */
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
@@ -1917,12 +1917,12 @@ pcie1_phy: phy@1c0f000 {
status = "disabled";
pcie1_lane: phy@1c0e000 {
- reg = <0 0x1c0e000 0 0x200>, /* tx */
- <0 0x1c0e200 0 0x300>, /* rx */
- <0 0x1c0f200 0 0x200>, /* pcs */
- <0 0x1c0e800 0 0x200>, /* tx */
- <0 0x1c0ea00 0 0x300>, /* rx */
- <0 0x1c0f400 0 0xc00>; /* pcs_pcie */
+ reg = <0 0x01c0e000 0 0x200>, /* tx */
+ <0 0x01c0e200 0 0x300>, /* rx */
+ <0 0x01c0f200 0 0x200>, /* pcs */
+ <0 0x01c0e800 0 0x200>, /* tx */
+ <0 0x01c0ea00 0 0x300>, /* rx */
+ <0 0x01c0f400 0 0xc00>; /* pcs_pcie */
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe0";
@@ -2147,7 +2147,7 @@ swr4: soundwire-controller@31f0000 {
rxmacro: codec@3200000 {
compatible = "qcom,sm8450-lpass-rx-macro";
- reg = <0 0x3200000 0 0x1000>;
+ reg = <0 0x03200000 0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
@@ -2168,7 +2168,7 @@ rxmacro: codec@3200000 {
swr1: soundwire-controller@3210000 {
compatible = "qcom,soundwire-v1.7.0";
- reg = <0 0x3210000 0 0x2000>;
+ reg = <0 0x03210000 0 0x2000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rxmacro>;
clock-names = "iface";
@@ -2193,7 +2193,7 @@ swr1: soundwire-controller@3210000 {
txmacro: codec@3220000 {
compatible = "qcom,sm8450-lpass-tx-macro";
- reg = <0 0x3220000 0 0x1000>;
+ reg = <0 0x03220000 0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
@@ -2260,7 +2260,7 @@ swr0: soundwire-controller@3250000 {
swr2: soundwire-controller@33b0000 {
compatible = "qcom,soundwire-v1.7.0";
- reg = <0 0x33b0000 0 0x2000>;
+ reg = <0 0x033b0000 0 0x2000>;
interrupts-extended = <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "core", "wake";
@@ -2555,7 +2555,7 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
cci0: cci@ac15000 {
compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
- reg = <0 0xac15000 0 0x1000>;
+ reg = <0 0x0ac15000 0 0x1000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
power-domains = <&camcc TITAN_TOP_GDSC>;
@@ -2594,7 +2594,7 @@ cci0_i2c1: i2c-bus@1 {
cci1: cci@ac16000 {
compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
- reg = <0 0xac16000 0 0x1000>;
+ reg = <0 0x0ac16000 0 0x1000>;
interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
power-domains = <&camcc TITAN_TOP_GDSC>;
@@ -3259,8 +3259,8 @@ qup_uart20_default: qup-uart20-default-state {
lpass_tlmm: pinctrl@3440000{
compatible = "qcom,sm8450-lpass-lpi-pinctrl";
- reg = <0 0x3440000 0x0 0x20000>,
- <0 0x34d0000 0x0 0x10000>;
+ reg = <0 0x03440000 0x0 0x20000>,
+ <0 0x034d0000 0x0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 23>;
@@ -3847,7 +3847,7 @@ nsp_noc: interconnect@320c0000 {
lpass_ag_noc: interconnect@3c40000 {
compatible = "qcom,sm8450-lpass-ag-noc";
- reg = <0 0x3c40000 0 0x17200>;
+ reg = <0 0x03c40000 0 0x17200>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (15 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 16/18] arm64: dts: qcom: sm8450: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
2022-12-31 12:59 ` [PATCH 18/18] arm64: dts: qcom: sm6115: " Konrad Dybcio
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
index f3d153c34918..3ceb86b06209 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
@@ -163,7 +163,7 @@ &blsp2_uart2 {
* mainline Linux.
*/
&cont_splash_mem {
- reg = <0 0x3401000 0 0x2200000>;
+ reg = <0 0x03401000 0 0x2200000>;
};
&pmi8994_spmi_regulators {
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 18/18] arm64: dts: qcom: sm6115: Pad addresses to 8 hex digits
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
` (16 preceding siblings ...)
2022-12-31 12:59 ` [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: " Konrad Dybcio
@ 2022-12-31 12:59 ` Konrad Dybcio
17 siblings, 0 replies; 20+ messages in thread
From: Konrad Dybcio @ 2022-12-31 12:59 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
Some addresses were 7-hex-digits long, or less. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index b3ed6ec16205..76dab4c2e8ed 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -831,9 +831,9 @@ ufs_mem_phy: phy@4807000 {
status = "disabled";
ufs_mem_phy_lanes: phy@4807400 {
- reg = <0 0x4807400 0 0x098>,
- <0 0x4807600 0 0x130>,
- <0 0x4807c00 0 0x16c>;
+ reg = <0 0x04807400 0 0x098>,
+ <0 0x04807600 0 0x130>,
+ <0 0x04807c00 0 0x16c>;
#phy-cells = <0>;
};
};
--
2.39.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits
2022-12-31 12:58 ` [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Konrad Dybcio
@ 2022-12-31 19:03 ` Krzysztof Kozlowski
0 siblings, 0 replies; 20+ messages in thread
From: Krzysztof Kozlowski @ 2022-12-31 19:03 UTC (permalink / raw)
To: Konrad Dybcio, linux-arm-msm, andersson, agross
Cc: marijn.suijten, Rob Herring, Krzysztof Kozlowski, devicetree,
linux-kernel
On 31/12/2022 13:58, Konrad Dybcio wrote:
> Some addresses were 7-hex-digits long, or less. Fix that.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 67 ++++++++++++++++++++++-----
> 1 file changed, 55 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 2ceae73a6069..17e15a06254f 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -146,7 +146,7 @@ reserved-memory {
> ranges;
>
> rpm_msg_ram: memory@60000 {
> - reg = <0x0 0x60000 0x0 0x6000>;
> + reg = <0x0 0x00060000 0x0 0x6000>;
> no-map;
> };
>
> @@ -181,7 +181,7 @@ soc: soc {
>
> prng: qrng@e1000 {
> compatible = "qcom,prng-ee";
> - reg = <0x0 0xe3000 0x0 0x1000>;
> + reg = <0x0 0x000e3000 0x0 0x1000>;
> clocks = <&gcc GCC_PRNG_AHB_CLK>;
> clock-names = "core";
> };
> @@ -366,6 +366,49 @@ qpic_nand: nand-controller@79b0000 {
> status = "disabled";
> };
>
> + usb3: usb@8af8800 {
> + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
This hunk seems unrelated.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation
2022-12-31 12:58 ` [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Konrad Dybcio
@ 2022-12-31 19:04 ` Krzysztof Kozlowski
0 siblings, 0 replies; 20+ messages in thread
From: Krzysztof Kozlowski @ 2022-12-31 19:04 UTC (permalink / raw)
To: Konrad Dybcio, linux-arm-msm, andersson, agross
Cc: marijn.suijten, Rob Herring, Krzysztof Kozlowski, devicetree,
linux-kernel
On 31/12/2022 13:58, Konrad Dybcio wrote:
> Some properties were not indented consistently. Fix that.
I don't think it is worth to split indentation patches, so this should
be just merged with your patch #2.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2022-12-31 19:04 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
2022-12-31 12:58 ` [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Konrad Dybcio
2022-12-31 19:03 ` Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces Konrad Dybcio
2022-12-31 12:58 ` [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly Konrad Dybcio
2022-12-31 12:58 ` [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Konrad Dybcio
2022-12-31 19:04 ` Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Konrad Dybcio
2022-12-31 12:58 ` [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex Konrad Dybcio
2022-12-31 12:59 ` [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits Konrad Dybcio
2022-12-31 12:59 ` [PATCH 08/18] arm64: dts: qcom: sm8150: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 09/18] arm64: dts: qcom: sm6350: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 10/18] arm64: dts: qcom: sdm845: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 11/18] arm64: dts: qcom: sm8250: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 12/18] arm64: dts: qcom: sm8350: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 13/18] arm64: dts: qcom: sc7180: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 14/18] arm64: dts: qcom: sc7280: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 16/18] arm64: dts: qcom: sm8450: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 18/18] arm64: dts: qcom: sm6115: " Konrad Dybcio
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